1 /* $NetBSD: pci_machdep.c,v 1.44 2020/11/21 15:59:53 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
5 * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Charles M. Hannum.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Machine-specific functions for PCI autoconfiguration.
35 *
36 * On PCs, there are two methods of generating PCI configuration cycles.
37 * We try to detect the appropriate mechanism for this machine and set
38 * up a few function pointers to access the correct method directly.
39 */
40
41 #include <sys/cdefs.h>
42 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.44 2020/11/21 15:59:53 thorpej Exp $");
43
44 #include <sys/types.h>
45 #include <sys/param.h>
46 #include <sys/time.h>
47 #include <sys/systm.h>
48 #include <sys/errno.h>
49 #include <sys/extent.h>
50 #include <sys/device.h>
51 #include <sys/kmem.h>
52
53 #include <uvm/uvm_extern.h>
54
55 #define _POWERPC_BUS_DMA_PRIVATE
56 #include <sys/bus.h>
57 #include <machine/intr.h>
58 #include <machine/platform.h>
59 #include <machine/pnp.h>
60
61 #include <dev/isa/isavar.h>
62
63 #include <dev/pci/pcivar.h>
64 #include <dev/pci/pcireg.h>
65 #include <dev/pci/pcidevs.h>
66 #include <dev/pci/pciconf.h>
67
68 /* 0 == direct 1 == indirect */
69 int prep_pci_config_mode = 1;
70 extern struct genppc_pci_chipset *genppc_pct;
71 extern u_int32_t prep_pci_baseaddr;
72 extern u_int32_t prep_pci_basedata;
73
74 static void
prep_pci_get_chipset_tag_indirect(pci_chipset_tag_t pc)75 prep_pci_get_chipset_tag_indirect(pci_chipset_tag_t pc)
76 {
77
78 pc->pc_conf_v = (void *)pc;
79
80 pc->pc_attach_hook = genppc_pci_indirect_attach_hook;
81 pc->pc_bus_maxdevs = prep_pci_bus_maxdevs;
82 pc->pc_make_tag = genppc_pci_indirect_make_tag;
83 pc->pc_conf_read = genppc_pci_indirect_conf_read;
84 pc->pc_conf_write = genppc_pci_indirect_conf_write;
85
86 pc->pc_intr_v = (void *)pc;
87
88 pc->pc_intr_map = prep_pci_intr_map;
89 pc->pc_intr_string = genppc_pci_intr_string;
90 pc->pc_intr_evcnt = genppc_pci_intr_evcnt;
91 pc->pc_intr_establish = genppc_pci_intr_establish;
92 pc->pc_intr_disestablish = genppc_pci_intr_disestablish;
93 pc->pc_intr_setattr = genppc_pci_intr_setattr;
94 pc->pc_intr_type = genppc_pci_intr_type;
95 pc->pc_intr_alloc = genppc_pci_intr_alloc;
96 pc->pc_intr_release = genppc_pci_intr_release;
97 pc->pc_intx_alloc = genppc_pci_intx_alloc;
98
99 pc->pc_msi_v = (void *)pc;
100 genppc_pci_chipset_msi_init(pc);
101
102 pc->pc_msix_v = (void *)pc;
103 genppc_pci_chipset_msix_init(pc);
104
105 pc->pc_conf_interrupt = genppc_pci_conf_interrupt;
106 pc->pc_decompose_tag = genppc_pci_indirect_decompose_tag;
107 pc->pc_conf_hook = prep_pci_conf_hook;
108
109 pc->pc_addr = mapiodev(prep_pci_baseaddr, 4, false);
110 pc->pc_data = mapiodev(prep_pci_basedata, 4, false);
111 pc->pc_bus = 0;
112 pc->pc_node = 0;
113 pc->pc_memt = 0;
114 pc->pc_iot = 0;
115 }
116
117 void
prep_pci_get_chipset_tag(pci_chipset_tag_t pc)118 prep_pci_get_chipset_tag(pci_chipset_tag_t pc)
119 {
120 int i;
121
122 i = pci_chipset_tag_type();
123
124 if (i == PCIBridgeIndirect || i == PCIBridgeRS6K) {
125 prep_pci_config_mode = 1;
126 prep_pci_get_chipset_tag_indirect(pc);
127 } else if (i == PCIBridgeDirect) {
128 prep_pci_get_chipset_tag_direct(pc);
129 prep_pci_config_mode = 0;
130 } else
131 panic("Unknown PCI chipset tag configuration method");
132 }
133
134 int
prep_pci_bus_maxdevs(void * v,int busno)135 prep_pci_bus_maxdevs(void *v, int busno)
136 {
137 struct genppc_pci_chipset_businfo *pbi;
138 prop_object_t busmax;
139
140 pbi = SIMPLEQ_FIRST(&genppc_pct->pc_pbi);
141 while (busno--)
142 pbi = SIMPLEQ_NEXT(pbi, next);
143 if (pbi == NULL)
144 return 32;
145
146 busmax = prop_dictionary_get(pbi->pbi_properties,
147 "prep-pcibus-maxdevices");
148 if (busmax == NULL)
149 return 32;
150 else
151 return prop_number_integer_value(busmax);
152
153 return 32;
154 }
155
156 int
prep_pci_intr_map(const struct pci_attach_args * pa,pci_intr_handle_t * ihp)157 prep_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
158 {
159 struct genppc_pci_chipset_businfo *pbi;
160 prop_dictionary_t dict, devsub;
161 prop_object_t pinsub;
162 prop_number_t pbus;
163 int busno, pin, line, dev, origdev, i;
164 char key[20];
165
166 pin = pa->pa_intrpin;
167 line = pa->pa_intrline;
168 busno = pa->pa_bus;
169 origdev = dev = pa->pa_device;
170 i = 0;
171
172 pbi = SIMPLEQ_FIRST(&genppc_pct->pc_pbi);
173 while (busno--)
174 pbi = SIMPLEQ_NEXT(pbi, next);
175 KASSERT(pbi != NULL);
176
177 dict = prop_dictionary_get(pbi->pbi_properties, "prep-pci-intrmap");
178
179 if (dict != NULL)
180 i = prop_dictionary_count(dict);
181
182 if (dict == NULL || i == 0) {
183 /* We have a non-PReP bus. now it gets hard */
184 pbus = prop_dictionary_get(pbi->pbi_properties,
185 "prep-pcibus-parent");
186 if (pbus == NULL)
187 goto bad;
188 busno = prop_number_integer_value(pbus);
189 pbus = prop_dictionary_get(pbi->pbi_properties,
190 "prep-pcibus-rawdevnum");
191 dev = prop_number_integer_value(pbus);
192
193 /* now that we know the parent bus, we need to find its pbi */
194 pbi = SIMPLEQ_FIRST(&genppc_pct->pc_pbi);
195 while (busno--)
196 pbi = SIMPLEQ_NEXT(pbi, next);
197 KASSERT(pbi != NULL);
198
199 /* swizzle the pin */
200 pin = ((pin + origdev - 1) & 3) + 1;
201
202 /* now we have the pbi, ask for dict again */
203 dict = prop_dictionary_get(pbi->pbi_properties,
204 "prep-pci-intrmap");
205 if (dict == NULL)
206 goto bad;
207 }
208
209 /* No IRQ used. */
210 if (pin == 0)
211 goto bad;
212 if (pin > 4) {
213 aprint_error("pci_intr_map: bad interrupt pin %d\n", pin);
214 goto bad;
215 }
216
217 snprintf(key, sizeof(key), "devfunc-%d", dev);
218 devsub = prop_dictionary_get(dict, key);
219 if (devsub == NULL)
220 goto bad;
221 snprintf(key, sizeof(key), "pin-%c", 'A' + (pin-1));
222 pinsub = prop_dictionary_get(devsub, key);
223 if (pinsub == NULL)
224 goto bad;
225 line = prop_number_integer_value(pinsub);
226
227 /*
228 * Section 6.2.4, `Miscellaneous Functions', says that 255 means
229 * `unknown' or `no connection' on a PC. We assume that a device with
230 * `no connection' either doesn't have an interrupt (in which case the
231 * pin number should be 0, and would have been noticed above), or
232 * wasn't configured by the BIOS (in which case we punt, since there's
233 * no real way we can know how the interrupt lines are mapped in the
234 * hardware).
235 *
236 * XXX
237 * Since IRQ 0 is only used by the clock, and we can't actually be sure
238 * that the BIOS did its job, we also recognize that as meaning that
239 * the BIOS has not configured the device.
240 */
241 if (line == 0 || line == 255) {
242 aprint_error("pci_intr_map: no mapping for pin %c\n",
243 '@' + pin);
244 goto bad;
245 } else {
246 if (line >= ICU_LEN) {
247 aprint_error("pci_intr_map: bad interrupt line %d\n",
248 line);
249 goto bad;
250 }
251 if (line == IRQ_SLAVE) {
252 aprint_verbose("pci_intr_map: changed line 2 to line 9\n");
253 line = 9;
254 }
255 }
256
257 *ihp = line;
258 return 0;
259
260 bad:
261 *ihp = -1;
262 return 1;
263 }
264
265 extern pcitag_t prep_pci_direct_make_tag(void *, int, int, int);
266 extern pcitag_t genppc_pci_indirect_make_tag(void *, int, int, int);
267 extern pcireg_t prep_pci_direct_conf_read(void *, pcitag_t, int);
268 extern pcireg_t genppc_pci_indirect_conf_read(void *, pcitag_t, int);
269
270 int
prep_pci_conf_hook(void * v,int bus,int dev,int func,pcireg_t id)271 prep_pci_conf_hook(void *v, int bus, int dev, int func, pcireg_t id)
272 {
273 pci_chipset_tag_t pc = v;
274 struct genppc_pci_chipset_businfo *pbi;
275 prop_number_t bmax, pbus;
276 pcitag_t tag;
277 pcireg_t class;
278
279 /*
280 * The P9100 board found in some IBM machines cannot be
281 * over-configured.
282 */
283 if (PCI_VENDOR(id) == PCI_VENDOR_WEITEK &&
284 PCI_PRODUCT(id) == PCI_PRODUCT_WEITEK_P9100)
285 return 0;
286
287 /* We have already mapped the MPIC2 if we have one, so leave it
288 alone */
289 if (PCI_VENDOR(id) == PCI_VENDOR_IBM &&
290 PCI_PRODUCT(id) == PCI_PRODUCT_IBM_MPIC2)
291 return 0;
292
293 if (PCI_VENDOR(id) == PCI_VENDOR_IBM &&
294 PCI_PRODUCT(id) == PCI_PRODUCT_IBM_MPIC)
295 return 0;
296
297 if (PCI_VENDOR(id) == PCI_VENDOR_INTEL &&
298 PCI_PRODUCT(id) == PCI_PRODUCT_INTEL_PCEB)
299 return 0;
300
301 if (PCI_VENDOR(id) == PCI_VENDOR_MOT &&
302 PCI_PRODUCT(id) == PCI_PRODUCT_MOT_RAVEN)
303 return (PCI_CONF_ALL & ~PCI_CONF_MAP_MEM);
304
305 /* NOTE, all device specific stuff must be above this line */
306 /* don't do this on the primary host bridge */
307 if (bus == 0 && dev == 0 && func == 0)
308 return PCI_CONF_DEFAULT;
309
310 if (prep_pci_config_mode) {
311 tag = genppc_pci_indirect_make_tag(pc, bus, dev, func);
312 class = genppc_pci_indirect_conf_read(pc, tag,
313 PCI_CLASS_REG);
314 } else {
315 tag = prep_pci_direct_make_tag(pc, bus, dev, func);
316 class = prep_pci_direct_conf_read(pc, tag,
317 PCI_CLASS_REG);
318 }
319
320 /*
321 * PCI bridges have special needs. We need to discover where they
322 * came from, and wire them appropriately.
323 */
324 if (PCI_CLASS(class) == PCI_CLASS_BRIDGE &&
325 PCI_SUBCLASS(class) == PCI_SUBCLASS_BRIDGE_PCI) {
326 pbi = kmem_alloc(sizeof(struct genppc_pci_chipset_businfo),
327 KM_SLEEP);
328 pbi->pbi_properties = prop_dictionary_create();
329 KASSERT(pbi->pbi_properties != NULL);
330 setup_pciintr_map(pbi, bus, dev, func);
331
332 /* record the parent bus, and the parent device number */
333 pbus = prop_number_create_integer(bus);
334 prop_dictionary_set(pbi->pbi_properties, "prep-pcibus-parent",
335 pbus);
336 prop_object_release(pbus);
337 pbus = prop_number_create_integer(dev);
338 prop_dictionary_set(pbi->pbi_properties,
339 "prep-pcibus-rawdevnum", pbus);
340 prop_object_release(pbus);
341
342 /* now look for bus quirks */
343
344 if (PCI_VENDOR(id) == PCI_VENDOR_DEC &&
345 PCI_PRODUCT(id) == PCI_PRODUCT_DEC_21154) {
346 bmax = prop_number_create_integer(8);
347 KASSERT(bmax != NULL);
348 prop_dictionary_set(pbi->pbi_properties,
349 "prep-pcibus-maxdevices", bmax);
350 prop_object_release(bmax);
351 }
352
353 SIMPLEQ_INSERT_TAIL(&genppc_pct->pc_pbi, pbi, next);
354 }
355
356 return (PCI_CONF_DEFAULT);
357 }
358