1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (C) 2016 Intel Corporation.
3 * All rights reserved.
4 */
5
6 #include "nvme_internal.h"
7
8 struct nvme_quirk {
9 struct spdk_pci_id id;
10 uint64_t flags;
11 };
12
13 static const struct nvme_quirk nvme_quirks[] = {
14 { {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_INTEL, 0x0953, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
15 NVME_INTEL_QUIRK_READ_LATENCY |
16 NVME_INTEL_QUIRK_WRITE_LATENCY |
17 NVME_INTEL_QUIRK_STRIPING |
18 NVME_QUIRK_READ_ZERO_AFTER_DEALLOCATE |
19 NVME_QUIRK_DELAY_BEFORE_INIT |
20 NVME_QUIRK_MINIMUM_IO_QUEUE_SIZE
21 },
22 { {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_INTEL, 0x0A53, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
23 NVME_INTEL_QUIRK_READ_LATENCY |
24 NVME_INTEL_QUIRK_WRITE_LATENCY |
25 NVME_INTEL_QUIRK_STRIPING |
26 NVME_QUIRK_READ_ZERO_AFTER_DEALLOCATE |
27 NVME_QUIRK_DELAY_BEFORE_INIT |
28 NVME_QUIRK_MINIMUM_IO_QUEUE_SIZE
29 },
30 { {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_INTEL, 0x0A54, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
31 NVME_INTEL_QUIRK_READ_LATENCY |
32 NVME_INTEL_QUIRK_WRITE_LATENCY |
33 NVME_INTEL_QUIRK_STRIPING |
34 NVME_QUIRK_READ_ZERO_AFTER_DEALLOCATE |
35 NVME_QUIRK_DELAY_BEFORE_INIT |
36 NVME_QUIRK_MINIMUM_IO_QUEUE_SIZE
37 },
38 { {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_INTEL, 0x0A55, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
39 NVME_INTEL_QUIRK_READ_LATENCY |
40 NVME_INTEL_QUIRK_WRITE_LATENCY |
41 NVME_INTEL_QUIRK_STRIPING |
42 NVME_QUIRK_READ_ZERO_AFTER_DEALLOCATE |
43 NVME_QUIRK_MINIMUM_IO_QUEUE_SIZE
44 },
45 { {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_INTEL, 0x0B60, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
46 NVME_INTEL_QUIRK_READ_LATENCY |
47 NVME_INTEL_QUIRK_WRITE_LATENCY |
48 NVME_INTEL_QUIRK_STRIPING |
49 NVME_QUIRK_MINIMUM_IO_QUEUE_SIZE |
50 NVME_QUIRK_NO_SGL_FOR_DSM
51 },
52 { {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_MEMBLAZE, 0x0540, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
53 NVME_QUIRK_DELAY_BEFORE_CHK_RDY
54 },
55 { {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_SAMSUNG, 0xa821, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
56 NVME_QUIRK_DELAY_BEFORE_CHK_RDY
57 },
58 { {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_SAMSUNG, 0xa822, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
59 NVME_QUIRK_DELAY_BEFORE_CHK_RDY
60 },
61 { {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_SAMSUNG, 0xa826, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
62 NVME_QUIRK_DELAY_BEFORE_CHK_RDY
63 },
64 { {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_VIRTUALBOX, 0x4e56, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
65 NVME_QUIRK_DELAY_AFTER_QUEUE_ALLOC
66 },
67 { {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_INTEL, 0x5845, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
68 NVME_INTEL_QUIRK_NO_LOG_PAGES |
69 NVME_QUIRK_MAXIMUM_PCI_ACCESS_WIDTH
70 },
71 { {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_REDHAT, 0x0010, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
72 NVME_QUIRK_MAXIMUM_PCI_ACCESS_WIDTH
73 },
74 { {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_CNEXLABS, 0x1f1f, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
75 NVME_QUIRK_IDENTIFY_CNS |
76 NVME_QUIRK_OCSSD
77 },
78 { {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_VMWARE, 0x07f0, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
79 NVME_QUIRK_SHST_COMPLETE
80 },
81 { {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_INTEL, 0x2700, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
82 NVME_QUIRK_OACS_SECURITY
83 },
84 { {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_INTEL, 0x4140, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
85 NVME_QUIRK_MDTS_EXCLUDE_MD
86 },
87 { {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_HUAWEI, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
88 NVME_QUIRK_NOT_USE_SGL
89 },
90 { {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_MICROSOFT, 0xb111, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
91 NVME_QUIRK_MINIMUM_ADMIN_QUEUE_SIZE
92 },
93 { {0x000000, 0x0000, 0x0000, 0x0000, 0x0000}, 0}
94 };
95
96 /* Compare each field. SPDK_PCI_ANY_ID in s1 matches everything */
97 static bool
pci_id_match(const struct spdk_pci_id * s1,const struct spdk_pci_id * s2)98 pci_id_match(const struct spdk_pci_id *s1, const struct spdk_pci_id *s2)
99 {
100 if ((s1->class_id == SPDK_PCI_CLASS_ANY_ID || s1->class_id == s2->class_id) &&
101 (s1->vendor_id == SPDK_PCI_ANY_ID || s1->vendor_id == s2->vendor_id) &&
102 (s1->device_id == SPDK_PCI_ANY_ID || s1->device_id == s2->device_id) &&
103 (s1->subvendor_id == SPDK_PCI_ANY_ID || s1->subvendor_id == s2->subvendor_id) &&
104 (s1->subdevice_id == SPDK_PCI_ANY_ID || s1->subdevice_id == s2->subdevice_id)) {
105 return true;
106 }
107 return false;
108 }
109
110 uint64_t
nvme_get_quirks(const struct spdk_pci_id * id)111 nvme_get_quirks(const struct spdk_pci_id *id)
112 {
113 const struct nvme_quirk *quirk = nvme_quirks;
114
115 SPDK_DEBUGLOG(nvme, "Searching for %04x:%04x [%04x:%04x]...\n",
116 id->vendor_id, id->device_id,
117 id->subvendor_id, id->subdevice_id);
118
119 while (quirk->id.vendor_id) {
120 if (pci_id_match(&quirk->id, id)) {
121 SPDK_DEBUGLOG(nvme, "Matched quirk %04x:%04x [%04x:%04x]:\n",
122 quirk->id.vendor_id, quirk->id.device_id,
123 quirk->id.subvendor_id, quirk->id.subdevice_id);
124
125 #define PRINT_QUIRK(quirk_flag) \
126 do { \
127 if (quirk->flags & (quirk_flag)) { \
128 SPDK_DEBUGLOG(nvme, "Quirk enabled: %s\n", #quirk_flag); \
129 } \
130 } while (0)
131
132 PRINT_QUIRK(NVME_INTEL_QUIRK_READ_LATENCY);
133 PRINT_QUIRK(NVME_INTEL_QUIRK_WRITE_LATENCY);
134 PRINT_QUIRK(NVME_QUIRK_DELAY_BEFORE_CHK_RDY);
135 PRINT_QUIRK(NVME_INTEL_QUIRK_STRIPING);
136 PRINT_QUIRK(NVME_QUIRK_DELAY_AFTER_QUEUE_ALLOC);
137 PRINT_QUIRK(NVME_QUIRK_READ_ZERO_AFTER_DEALLOCATE);
138 PRINT_QUIRK(NVME_QUIRK_IDENTIFY_CNS);
139 PRINT_QUIRK(NVME_QUIRK_OCSSD);
140
141 return quirk->flags;
142 }
143 quirk++;
144 }
145
146 SPDK_DEBUGLOG(nvme, "No quirks found.\n");
147
148 return 0;
149 }
150