xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/bios/nouveau_nvkm_subdev_bios_M0205.c (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: nouveau_nvkm_subdev_bios_M0205.c,v 1.3 2021/12/18 23:45:38 riastradh Exp $	*/
2 
3 /*
4  * Copyright 2013 Red Hat Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors: Ben Skeggs
25  */
26 #include <sys/cdefs.h>
27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_subdev_bios_M0205.c,v 1.3 2021/12/18 23:45:38 riastradh Exp $");
28 
29 #include <subdev/bios.h>
30 #include <subdev/bios/bit.h>
31 #include <subdev/bios/M0205.h>
32 
33 u32
nvbios_M0205Te(struct nvkm_bios * bios,u8 * ver,u8 * hdr,u8 * cnt,u8 * len,u8 * snr,u8 * ssz)34 nvbios_M0205Te(struct nvkm_bios *bios,
35 	       u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz)
36 {
37 	struct bit_entry bit_M;
38 	u32 data = 0x00000000;
39 
40 	if (!bit_entry(bios, 'M', &bit_M)) {
41 		if (bit_M.version == 2 && bit_M.length > 0x08)
42 			data = nvbios_rd32(bios, bit_M.offset + 0x05);
43 		if (data) {
44 			*ver = nvbios_rd08(bios, data + 0x00);
45 			switch (*ver) {
46 			case 0x10:
47 				*hdr = nvbios_rd08(bios, data + 0x01);
48 				*len = nvbios_rd08(bios, data + 0x02);
49 				*ssz = nvbios_rd08(bios, data + 0x03);
50 				*snr = nvbios_rd08(bios, data + 0x04);
51 				*cnt = nvbios_rd08(bios, data + 0x05);
52 				return data;
53 			default:
54 				break;
55 			}
56 		}
57 	}
58 
59 	return 0x00000000;
60 }
61 
62 u32
nvbios_M0205Tp(struct nvkm_bios * bios,u8 * ver,u8 * hdr,u8 * cnt,u8 * len,u8 * snr,u8 * ssz,struct nvbios_M0205T * info)63 nvbios_M0205Tp(struct nvkm_bios *bios,
64 	       u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz,
65 	       struct nvbios_M0205T *info)
66 {
67 	u32 data = nvbios_M0205Te(bios, ver, hdr, cnt, len, snr, ssz);
68 	memset(info, 0x00, sizeof(*info));
69 	switch (!!data * *ver) {
70 	case 0x10:
71 		info->freq = nvbios_rd16(bios, data + 0x06);
72 		break;
73 	default:
74 		break;
75 	}
76 	return data;
77 }
78 
79 u32
nvbios_M0205Ee(struct nvkm_bios * bios,int idx,u8 * ver,u8 * hdr,u8 * cnt,u8 * len)80 nvbios_M0205Ee(struct nvkm_bios *bios, int idx,
81 	       u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
82 {
83 	u8  snr, ssz;
84 	u32 data = nvbios_M0205Te(bios, ver, hdr, cnt, len, &snr, &ssz);
85 	if (data && idx < *cnt) {
86 		data = data + *hdr + idx * (*len + (snr * ssz));
87 		*hdr = *len;
88 		*cnt = snr;
89 		*len = ssz;
90 		return data;
91 	}
92 	return 0x00000000;
93 }
94 
95 u32
nvbios_M0205Ep(struct nvkm_bios * bios,int idx,u8 * ver,u8 * hdr,u8 * cnt,u8 * len,struct nvbios_M0205E * info)96 nvbios_M0205Ep(struct nvkm_bios *bios, int idx,
97 	       u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
98 	       struct nvbios_M0205E *info)
99 {
100 	u32 data = nvbios_M0205Ee(bios, idx, ver, hdr, cnt, len);
101 	memset(info, 0x00, sizeof(*info));
102 	switch (!!data * *ver) {
103 	case 0x10:
104 		info->type = nvbios_rd08(bios, data + 0x00) & 0x0f;
105 		return data;
106 	default:
107 		break;
108 	}
109 	return 0x00000000;
110 }
111 
112 u32
nvbios_M0205Se(struct nvkm_bios * bios,int ent,int idx,u8 * ver,u8 * hdr)113 nvbios_M0205Se(struct nvkm_bios *bios, int ent, int idx, u8 *ver, u8 *hdr)
114 {
115 
116 	u8  cnt, len;
117 	u32 data = nvbios_M0205Ee(bios, ent, ver, hdr, &cnt, &len);
118 	if (data && idx < cnt) {
119 		data = data + *hdr + idx * len;
120 		*hdr = len;
121 		return data;
122 	}
123 	return 0x00000000;
124 }
125 
126 u32
nvbios_M0205Sp(struct nvkm_bios * bios,int ent,int idx,u8 * ver,u8 * hdr,struct nvbios_M0205S * info)127 nvbios_M0205Sp(struct nvkm_bios *bios, int ent, int idx, u8 *ver, u8 *hdr,
128 	       struct nvbios_M0205S *info)
129 {
130 	u32 data = nvbios_M0205Se(bios, ent, idx, ver, hdr);
131 	memset(info, 0x00, sizeof(*info));
132 	switch (!!data * *ver) {
133 	case 0x10:
134 		info->data = nvbios_rd08(bios, data + 0x00);
135 		return data;
136 	default:
137 		break;
138 	}
139 	return 0x00000000;
140 }
141