xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv04/tvnv17.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: tvnv17.h,v 1.4 2021/12/18 23:45:32 riastradh Exp $	*/
2 
3 /*
4  * Copyright (C) 2009 Francisco Jerez.
5  * All Rights Reserved.
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining
8  * a copy of this software and associated documentation files (the
9  * "Software"), to deal in the Software without restriction, including
10  * without limitation the rights to use, copy, modify, merge, publish,
11  * distribute, sublicense, and/or sell copies of the Software, and to
12  * permit persons to whom the Software is furnished to do so, subject to
13  * the following conditions:
14  *
15  * The above copyright notice and this permission notice (including the
16  * next paragraph) shall be included in all copies or substantial
17  * portions of the Software.
18  *
19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26  *
27  */
28 
29 #ifndef __NV17_TV_H__
30 #define __NV17_TV_H__
31 
32 struct nv17_tv_state {
33 	uint8_t tv_enc[0x40];
34 
35 	uint32_t hfilter[4][7];
36 	uint32_t hfilter2[4][7];
37 	uint32_t vfilter[4][7];
38 
39 	uint32_t ptv_200;
40 	uint32_t ptv_204;
41 	uint32_t ptv_208;
42 	uint32_t ptv_20c;
43 	uint32_t ptv_304;
44 	uint32_t ptv_500;
45 	uint32_t ptv_504;
46 	uint32_t ptv_508;
47 	uint32_t ptv_600;
48 	uint32_t ptv_604;
49 	uint32_t ptv_608;
50 	uint32_t ptv_60c;
51 	uint32_t ptv_610;
52 	uint32_t ptv_614;
53 };
54 
55 enum nv17_tv_norm{
56 	TV_NORM_PAL,
57 	TV_NORM_PAL_M,
58 	TV_NORM_PAL_N,
59 	TV_NORM_PAL_NC,
60 	TV_NORM_NTSC_M,
61 	TV_NORM_NTSC_J,
62 	NUM_LD_TV_NORMS,
63 	TV_NORM_HD480I = NUM_LD_TV_NORMS,
64 	TV_NORM_HD480P,
65 	TV_NORM_HD576I,
66 	TV_NORM_HD576P,
67 	TV_NORM_HD720P,
68 	TV_NORM_HD1080I,
69 	NUM_TV_NORMS
70 };
71 
72 struct nv17_tv_encoder {
73 	struct nouveau_encoder base;
74 
75 	struct nv17_tv_state state;
76 	struct nv17_tv_state saved_state;
77 
78 	int overscan;
79 	int flicker;
80 	int saturation;
81 	int hue;
82 	enum nv17_tv_norm tv_norm;
83 	int subconnector;
84 	int select_subconnector;
85 	uint32_t pin_mask;
86 };
87 #define to_tv_enc(x) container_of(nouveau_encoder(x),		\
88 				  struct nv17_tv_encoder, base)
89 
90 extern const char * const nv17_tv_norm_names[NUM_TV_NORMS];
91 
92 extern const struct nv17_tv_norm_params {
93 	enum {
94 		TV_ENC_MODE,
95 		CTV_ENC_MODE,
96 	} kind;
97 
98 	union {
99 		struct {
100 			int hdisplay;
101 			int vdisplay;
102 			int vrefresh; /* mHz */
103 
104 			uint8_t tv_enc[0x40];
105 		} tv_enc_mode;
106 
107 		struct {
108 			struct drm_display_mode mode;
109 
110 			uint32_t ctv_regs[38];
111 		} ctv_enc_mode;
112 	};
113 
114 } nv17_tv_norms[NUM_TV_NORMS];
115 #define get_tv_norm(enc) (&nv17_tv_norms[to_tv_enc(enc)->tv_norm])
116 
117 extern const struct drm_display_mode nv17_tv_modes[];
118 
interpolate(int y0,int y1,int y2,int x)119 static inline int interpolate(int y0, int y1, int y2, int x)
120 {
121 	return y1 + (x < 50 ? y1 - y0 : y2 - y1) * (x - 50) / 50;
122 }
123 
124 void nv17_tv_state_save(struct drm_device *dev, struct nv17_tv_state *state);
125 void nv17_tv_state_load(struct drm_device *dev, struct nv17_tv_state *state);
126 void nv17_tv_update_properties(struct drm_encoder *encoder);
127 void nv17_tv_update_rescaler(struct drm_encoder *encoder);
128 void nv17_ctv_update_rescaler(struct drm_encoder *encoder);
129 
130 /* TV hardware access functions */
131 
nv_write_ptv(struct drm_device * dev,uint32_t reg,uint32_t val)132 static inline void nv_write_ptv(struct drm_device *dev, uint32_t reg,
133 				uint32_t val)
134 {
135 	struct nvif_device *device = &nouveau_drm(dev)->client.device;
136 	nvif_wr32(&device->object, reg, val);
137 }
138 
nv_read_ptv(struct drm_device * dev,uint32_t reg)139 static inline uint32_t nv_read_ptv(struct drm_device *dev, uint32_t reg)
140 {
141 	struct nvif_device *device = &nouveau_drm(dev)->client.device;
142 	return nvif_rd32(&device->object, reg);
143 }
144 
nv_write_tv_enc(struct drm_device * dev,uint8_t reg,uint8_t val)145 static inline void nv_write_tv_enc(struct drm_device *dev, uint8_t reg,
146 				   uint8_t val)
147 {
148 	nv_write_ptv(dev, NV_PTV_TV_INDEX, reg);
149 	nv_write_ptv(dev, NV_PTV_TV_DATA, val);
150 }
151 
nv_read_tv_enc(struct drm_device * dev,uint8_t reg)152 static inline uint8_t nv_read_tv_enc(struct drm_device *dev, uint8_t reg)
153 {
154 	nv_write_ptv(dev, NV_PTV_TV_INDEX, reg);
155 	return nv_read_ptv(dev, NV_PTV_TV_DATA);
156 }
157 
158 #define nv_load_ptv(dev, state, reg) \
159 	nv_write_ptv(dev, NV_PTV_OFFSET + 0x##reg, state->ptv_##reg)
160 #define nv_save_ptv(dev, state, reg) \
161 	state->ptv_##reg = nv_read_ptv(dev, NV_PTV_OFFSET + 0x##reg)
162 #define nv_load_tv_enc(dev, state, reg) \
163 	nv_write_tv_enc(dev, 0x##reg, state->tv_enc[0x##reg])
164 
165 #endif
166