1 /* $NetBSD: nouveau_nvkm_subdev_mmu_nv44.c,v 1.5 2021/12/18 23:45:41 riastradh Exp $ */
2
3 /*
4 * Copyright 2012 Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Ben Skeggs
25 */
26 #include <sys/cdefs.h>
27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_subdev_mmu_nv44.c,v 1.5 2021/12/18 23:45:41 riastradh Exp $");
28
29 #include "mem.h"
30 #include "vmm.h"
31
32 #include <core/option.h>
33
34 #include <nvif/class.h>
35
36 static void
nv44_mmu_init(struct nvkm_mmu * mmu)37 nv44_mmu_init(struct nvkm_mmu *mmu)
38 {
39 struct nvkm_device *device = mmu->subdev.device;
40 struct nvkm_memory *pt = mmu->vmm->pd->pt[0]->memory;
41 u32 addr;
42
43 /* calculate vram address of this PRAMIN block, object must be
44 * allocated on 512KiB alignment, and not exceed a total size
45 * of 512KiB for this to work correctly
46 */
47 addr = nvkm_rd32(device, 0x10020c);
48 addr -= ((nvkm_memory_addr(pt) >> 19) + 1) << 19;
49
50 nvkm_wr32(device, 0x100850, 0x80000000);
51 nvkm_wr32(device, 0x100818, mmu->vmm->null);
52 nvkm_wr32(device, 0x100804, (nvkm_memory_size(pt) / 4) * 4096);
53 nvkm_wr32(device, 0x100850, 0x00008000);
54 nvkm_mask(device, 0x10008c, 0x00000200, 0x00000200);
55 nvkm_wr32(device, 0x100820, 0x00000000);
56 nvkm_wr32(device, 0x10082c, 0x00000001);
57 nvkm_wr32(device, 0x100800, addr | 0x00000010);
58 }
59
60 static const struct nvkm_mmu_func
61 nv44_mmu = {
62 .init = nv44_mmu_init,
63 .dma_bits = 39,
64 .mmu = {{ -1, -1, NVIF_CLASS_MMU_NV04}},
65 .mem = {{ -1, -1, NVIF_CLASS_MEM_NV04}, nv04_mem_new, nv04_mem_map },
66 .vmm = {{ -1, -1, NVIF_CLASS_VMM_NV04}, nv44_vmm_new, true },
67 };
68
69 int
nv44_mmu_new(struct nvkm_device * device,int index,struct nvkm_mmu ** pmmu)70 nv44_mmu_new(struct nvkm_device *device, int index, struct nvkm_mmu **pmmu)
71 {
72 if (device->type == NVKM_DEVICE_AGP ||
73 !nvkm_boolopt(device->cfgopt, "NvPCIE", true))
74 return nv04_mmu_new(device, index, pmmu);
75
76 return nvkm_mmu_new_(&nv44_mmu, device, index, pmmu);
77 }
78