1 /* $NetBSD: ncr5380sbc.c,v 1.74 2024/10/29 15:58:14 nat Exp $ */ 2 3 /* 4 * Copyright (c) 1995 David Jones, Gordon W. Ross 5 * Copyright (c) 1994 Jarle Greipsland 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the authors may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 4. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by 21 * David Jones and Gordon Ross 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 /* 36 * This is a machine-independent driver for the NCR5380 37 * SCSI Bus Controller (SBC), also known as the Am5380. 38 * 39 * This code should work with any memory-mapped 5380, 40 * and can be shared by multiple adapters that address 41 * the 5380 with different register offset spacings. 42 * (This can happen on the atari, for example.) 43 * For porting/design info. see: ncr5380.doc 44 * 45 * Credits, history: 46 * 47 * David Jones is the author of most of the code that now 48 * appears in this file, and was the architect of the 49 * current overall structure (MI/MD code separation, etc.) 50 * 51 * Gordon Ross integrated the message phase code, added lots of 52 * comments about what happens when and why (re. SCSI spec.), 53 * debugged some reentrance problems, and added several new 54 * "hooks" needed for the Sun3 "si" adapters. 55 * 56 * The message in/out code was taken nearly verbatim from 57 * the aic6360 driver by Jarle Greipsland. 58 * 59 * Several other NCR5380 drivers were used for reference 60 * while developing this driver, including work by: 61 * The Alice Group (mac68k port) namely: 62 * Allen K. Briggs, Chris P. Caputo, Michael L. Finch, 63 * Bradley A. Grantham, and Lawrence A. Kesteloot 64 * Michael L. Hitch (amiga drivers: sci.c) 65 * Leo Weppelman (atari driver: ncr5380.c) 66 * There are others too. Thanks, everyone. 67 * 68 * Transliteration to bus_space() performed 9/17/98 by 69 * John Ruschmeyer (jruschme@exit109.com) for i386 'nca' driver. 70 * Thank you all. 71 */ 72 73 #include <sys/cdefs.h> 74 __KERNEL_RCSID(0, "$NetBSD: ncr5380sbc.c,v 1.74 2024/10/29 15:58:14 nat Exp $"); 75 76 #include "opt_ddb.h" 77 78 #include <sys/param.h> 79 #include <sys/systm.h> 80 #include <sys/kernel.h> 81 #include <sys/errno.h> 82 #include <sys/device.h> 83 #include <sys/buf.h> 84 #include <sys/proc.h> 85 86 #include <dev/scsipi/scsi_all.h> 87 #include <dev/scsipi/scsipi_all.h> 88 #include <dev/scsipi/scsipi_debug.h> 89 #include <dev/scsipi/scsi_message.h> 90 #include <dev/scsipi/scsiconf.h> 91 92 #ifdef DDB 93 #include <ddb/db_output.h> 94 #endif 95 96 #include <dev/ic/ncr5380reg.h> 97 #include <dev/ic/ncr5380var.h> 98 #include <dev/ic/ncr53c400reg.h> 99 100 static void ncr5380_reset_scsibus(struct ncr5380_softc *); 101 static void ncr5380_sched(struct ncr5380_softc *); 102 static void ncr5380_done(struct ncr5380_softc *); 103 104 static int ncr5380_select(struct ncr5380_softc *, struct sci_req *); 105 static void ncr5380_reselect(struct ncr5380_softc *); 106 107 static int ncr5380_msg_in(struct ncr5380_softc *); 108 static int ncr5380_msg_out(struct ncr5380_softc *); 109 static int ncr5380_data_xfer(struct ncr5380_softc *, int); 110 static int ncr5380_command(struct ncr5380_softc *); 111 static int ncr5380_status(struct ncr5380_softc *); 112 static void ncr5380_machine(struct ncr5380_softc *); 113 114 void ncr5380_abort(struct ncr5380_softc *); 115 void ncr5380_cmd_timeout(void *); 116 /* 117 * Action flags returned by the info_transfer functions: 118 * (These determine what happens next.) 119 */ 120 #define ACT_CONTINUE 0x00 /* No flags: expect another phase */ 121 #define ACT_DISCONNECT 0x01 /* Target is disconnecting */ 122 #define ACT_CMD_DONE 0x02 /* Need to call scsipi_done() */ 123 #define ACT_RESET_BUS 0x04 /* Need bus reset (cmd timeout) */ 124 #define ACT_WAIT_DMA 0x10 /* Wait for DMA to complete */ 125 126 /***************************************************************** 127 * Debugging stuff 128 *****************************************************************/ 129 130 #ifndef DDB 131 /* This is used only in recoverable places. */ 132 #ifndef Debugger 133 #define Debugger() printf("Debug: ncr5380.c:%d\n", __LINE__) 134 #endif 135 #endif 136 137 #ifdef NCR5380_DEBUG 138 struct ncr5380_softc *ncr5380_debug_sc; 139 140 #define NCR_DBG_BREAK 1 141 #define NCR_DBG_CMDS 2 142 int ncr5380_debug = 0; 143 #define NCR_BREAK() \ 144 do { if (ncr5380_debug & NCR_DBG_BREAK) Debugger(); } while (0) 145 static void ncr5380_show_scsi_cmd(struct scsipi_xfer *); 146 #ifdef DDB 147 void ncr5380_clear_trace(void); 148 void ncr5380_show_trace(void); 149 void ncr5380_show_req(struct sci_req *); 150 void ncr5380_show_state(void); 151 #endif /* DDB */ 152 #else /* NCR5380_DEBUG */ 153 154 #define NCR_BREAK() /* nada */ 155 #define ncr5380_show_scsi_cmd(xs) /* nada */ 156 157 #endif /* NCR5380_DEBUG */ 158 159 static const char * 160 phase_names[8] = { 161 "DATA_OUT", 162 "DATA_IN", 163 "COMMAND", 164 "STATUS", 165 "UNSPEC1", 166 "UNSPEC2", 167 "MSG_OUT", 168 "MSG_IN", 169 }; 170 171 /***************************************************************** 172 * Actual chip control 173 *****************************************************************/ 174 175 /* 176 * XXX: These timeouts might need to be tuned... 177 */ 178 179 /* This one is used when waiting for a phase change. (X100uS.) */ 180 int ncr5380_wait_phase_timo = 1000 * 10 * 300; /* 5 min. */ 181 182 /* These are used in the following inline functions. */ 183 int ncr5380_wait_req_timo = 1000 * 50; /* X2 = 100 mS. */ 184 int ncr5380_wait_nrq_timo = 1000 * 25; /* X2 = 50 mS. */ 185 186 static inline int ncr5380_wait_req(struct ncr5380_softc *); 187 static inline int ncr5380_wait_not_req(struct ncr5380_softc *); 188 static inline void ncr_sched_msgout(struct ncr5380_softc *, int); 189 190 /* Return zero on success. */ 191 static inline int 192 ncr5380_wait_req(struct ncr5380_softc *sc) 193 { 194 int timo = ncr5380_wait_req_timo; 195 196 for (;;) { 197 if (NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_REQ) { 198 timo = 0; /* return 0 */ 199 break; 200 } 201 if (--timo < 0) 202 break; /* return -1 */ 203 delay(2); 204 } 205 return timo; 206 } 207 208 /* Return zero on success. */ 209 static inline int 210 ncr5380_wait_not_req(struct ncr5380_softc *sc) 211 { 212 int timo = ncr5380_wait_nrq_timo; 213 214 for (;;) { 215 if ((NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_REQ) == 0) { 216 timo = 0; /* return 0 */ 217 break; 218 } 219 if (--timo < 0) 220 break; /* return -1 */ 221 delay(2); 222 } 223 return timo; 224 } 225 226 /* Ask the target for a MSG_OUT phase. */ 227 static inline void 228 ncr_sched_msgout(struct ncr5380_softc *sc, int msg_code) 229 { 230 231 /* First time, raise ATN line. */ 232 if (sc->sc_msgpriq == 0) { 233 uint8_t icmd; 234 icmd = NCR5380_READ(sc, sci_icmd) & SCI_ICMD_RMASK; 235 NCR5380_WRITE(sc, sci_icmd, (icmd | SCI_ICMD_ATN)); 236 delay(2); 237 } 238 sc->sc_msgpriq |= msg_code; 239 } 240 241 242 int 243 ncr5380_pio_out(struct ncr5380_softc *sc, int phase, int count, uint8_t *data) 244 { 245 uint8_t icmd; 246 int resid; 247 int error; 248 249 icmd = NCR5380_READ(sc, sci_icmd) & SCI_ICMD_RMASK; 250 251 icmd |= SCI_ICMD_DATA; 252 NCR5380_WRITE(sc, sci_icmd, icmd); 253 254 resid = count; 255 while (resid > 0) { 256 if (!SCI_BUSY(sc)) { 257 NCR_TRACE("pio_out: lost BSY, resid=%d\n", resid); 258 break; 259 } 260 if (ncr5380_wait_req(sc)) { 261 NCR_TRACE("pio_out: no REQ, resid=%d\n", resid); 262 break; 263 } 264 if (SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr)) != phase) 265 break; 266 267 /* Put the data on the bus. */ 268 if (data) 269 NCR5380_WRITE(sc, sci_odata, *data++); 270 else 271 NCR5380_WRITE(sc, sci_odata, 0); 272 273 /* Tell the target it's there. */ 274 icmd |= SCI_ICMD_ACK; 275 NCR5380_WRITE(sc, sci_icmd, icmd); 276 277 /* Wait for target to get it. */ 278 error = ncr5380_wait_not_req(sc); 279 280 /* OK, it's got it (or we gave up waiting). */ 281 icmd &= ~SCI_ICMD_ACK; 282 NCR5380_WRITE(sc, sci_icmd, icmd); 283 284 if (error) { 285 NCR_TRACE("pio_out: stuck REQ, resid=%d\n", resid); 286 break; 287 } 288 289 --resid; 290 } 291 292 /* Stop driving the data bus. */ 293 icmd &= ~SCI_ICMD_DATA; 294 NCR5380_WRITE(sc, sci_icmd, icmd); 295 296 return count - resid; 297 } 298 299 300 int 301 ncr5380_pio_in(struct ncr5380_softc *sc, int phase, int count, uint8_t *data) 302 { 303 uint8_t icmd; 304 int resid; 305 int error; 306 307 icmd = NCR5380_READ(sc, sci_icmd) & SCI_ICMD_RMASK; 308 309 resid = count; 310 while (resid > 0) { 311 if (!SCI_BUSY(sc)) { 312 NCR_TRACE("pio_in: lost BSY, resid=%d\n", resid); 313 break; 314 } 315 if (ncr5380_wait_req(sc)) { 316 NCR_TRACE("pio_in: no REQ, resid=%d\n", resid); 317 break; 318 } 319 /* A phase change is not valid until AFTER REQ rises! */ 320 if (SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr)) != phase) 321 break; 322 323 /* Read the data bus. */ 324 if (data) 325 *data++ = NCR5380_READ(sc, sci_data); 326 else 327 (void) NCR5380_READ(sc, sci_data); 328 329 /* Tell target we got it. */ 330 icmd |= SCI_ICMD_ACK; 331 NCR5380_WRITE(sc, sci_icmd, icmd); 332 333 /* Wait for target to drop REQ... */ 334 error = ncr5380_wait_not_req(sc); 335 336 /* OK, we can drop ACK. */ 337 icmd &= ~SCI_ICMD_ACK; 338 NCR5380_WRITE(sc, sci_icmd, icmd); 339 340 if (error) { 341 NCR_TRACE("pio_in: stuck REQ, resid=%d\n", resid); 342 break; 343 } 344 345 --resid; 346 } 347 348 return count - resid; 349 } 350 351 352 void 353 ncr5380_init(struct ncr5380_softc *sc) 354 { 355 int i, j; 356 357 #ifdef NCR5380_DEBUG 358 ncr5380_debug_sc = sc; 359 #endif 360 361 for (i = 0; i < SCI_OPENINGS; i++) 362 sc->sc_ring[i].sr_xs = NULL; 363 for (i = 0; i < 8; i++) 364 for (j = 0; j < 8; j++) 365 sc->sc_matrix[i][j] = NULL; 366 367 sc->sc_prevphase = PHASE_INVALID; 368 sc->sc_state = NCR_IDLE; 369 370 #ifdef NCR5380_USE_BUS_SPACE 371 if (sc->sc_rev == NCR_VARIANT_NCR53C400) 372 bus_space_write_1(sc->sc_regt, sc->sc_regh, C400_CSR, 373 C400_CSR_5380_ENABLE); 374 #endif 375 376 NCR5380_WRITE(sc, sci_tcmd, PHASE_INVALID); 377 NCR5380_WRITE(sc, sci_icmd, 0); 378 NCR5380_WRITE(sc, sci_mode, 0); 379 NCR5380_WRITE(sc, sci_sel_enb, 0); 380 SCI_CLR_INTR(sc); 381 382 /* XXX: Enable reselect interrupts... */ 383 NCR5380_WRITE(sc, sci_sel_enb, 0x80); 384 385 /* Another hack (Er.. hook!) for the sun3 si: */ 386 if (sc->sc_intr_on) { 387 NCR_TRACE("init: intr ON\n", 0); 388 sc->sc_intr_on(sc); 389 } 390 } 391 392 393 static void 394 ncr5380_reset_scsibus(struct ncr5380_softc *sc) 395 { 396 struct sci_req *sr; 397 398 NCR_TRACE("reset_scsibus, cur=0x%x\n", 399 (long) sc->sc_current); 400 401 NCR5380_WRITE(sc, sci_icmd, SCI_ICMD_RST); 402 delay(500); 403 NCR5380_WRITE(sc, sci_icmd, 0); 404 405 NCR5380_WRITE(sc, sci_mode, 0); 406 NCR5380_WRITE(sc, sci_tcmd, PHASE_INVALID); 407 408 SCI_CLR_INTR(sc); 409 /* XXX - Need long delay here! */ 410 delay(100000); 411 412 /* XXX - Need to cancel disconnected requests. */ 413 sr = sc->sc_current; 414 if (sr && (sc->sc_state & NCR_ABORTING) == 0) 415 ncr5380_abort(sc); 416 } 417 418 419 /* 420 * Interrupt handler for the SCSI Bus Controller (SBC) 421 * This may also called for a DMA timeout (at splbio). 422 */ 423 int 424 ncr5380_intr(void *arg) 425 { 426 struct ncr5380_softc *sc = arg; 427 int claimed = 0; 428 429 /* 430 * Do not touch SBC regs here unless sc_current == NULL 431 * or it will complain about "register conflict" errors. 432 * Instead, just let ncr5380_machine() deal with it. 433 */ 434 NCR_TRACE("intr: top, state=%d\n", sc->sc_state); 435 436 if (sc->sc_state == NCR_IDLE) { 437 /* 438 * Might be reselect. ncr5380_reselect() will check, 439 * and set up the connection if so. This will verify 440 * that sc_current == NULL at the beginning... 441 */ 442 443 /* Another hack (Er.. hook!) for the sun3 si: */ 444 if (sc->sc_intr_off) { 445 NCR_TRACE("intr: for reselect, intr off\n", 0); 446 sc->sc_intr_off(sc); 447 } 448 449 ncr5380_reselect(sc); 450 } 451 452 /* 453 * The remaining documented interrupt causes are phase mismatch and 454 * disconnect. In addition, the sunsi controller may produce a state 455 * where SCI_CSR_DONE is false, yet DMA is complete. 456 * 457 * The procedure in all these cases is to let ncr5380_machine() 458 * figure out what to do next. 459 */ 460 if (sc->sc_state & NCR_WORKING) { 461 NCR_TRACE("intr: call machine, cur=0x%x\n", 462 (long) sc->sc_current); 463 /* This will usually free-up the nexus. */ 464 ncr5380_machine(sc); 465 NCR_TRACE("intr: machine done, cur=0x%x\n", 466 (long) sc->sc_current); 467 claimed = 1; 468 } 469 470 /* Maybe we can run some commands now... */ 471 if (sc->sc_state == NCR_IDLE) { 472 NCR_TRACE("intr: call sched, cur=0x%x\n", 473 (long) sc->sc_current); 474 ncr5380_sched(sc); 475 NCR_TRACE("intr: sched done, cur=0x%x\n", 476 (long) sc->sc_current); 477 } 478 479 return claimed; 480 } 481 482 483 /* 484 * Abort the current command (i.e. due to timeout) 485 */ 486 void 487 ncr5380_abort(struct ncr5380_softc *sc) 488 { 489 490 /* 491 * Finish it now. If DMA is in progress, we 492 * can not call ncr_sched_msgout() because 493 * that hits the SBC (avoid DMA conflict). 494 */ 495 496 /* Another hack (Er.. hook!) for the sun3 si: */ 497 if (sc->sc_intr_off) { 498 NCR_TRACE("abort: intr off\n", 0); 499 sc->sc_intr_off(sc); 500 } 501 502 sc->sc_state |= NCR_ABORTING; 503 if ((sc->sc_state & NCR_DOINGDMA) == 0) { 504 ncr_sched_msgout(sc, SEND_ABORT); 505 } 506 NCR_TRACE("abort: call machine, cur=0x%x\n", 507 (long) sc->sc_current); 508 ncr5380_machine(sc); 509 NCR_TRACE("abort: machine done, cur=0x%x\n", 510 (long) sc->sc_current); 511 512 /* Another hack (Er.. hook!) for the sun3 si: */ 513 if (sc->sc_intr_on) { 514 NCR_TRACE("abort: intr ON\n", 0); 515 sc->sc_intr_on(sc); 516 } 517 } 518 519 /* 520 * Timeout handler, scheduled for each SCSI command. 521 */ 522 void 523 ncr5380_cmd_timeout(void *arg) 524 { 525 struct sci_req *sr = arg; 526 struct scsipi_xfer *xs; 527 struct scsipi_periph *periph; 528 struct ncr5380_softc *sc; 529 int s; 530 531 s = splbio(); 532 533 /* Get all our variables... */ 534 xs = sr->sr_xs; 535 if (xs == NULL) { 536 printf("ncr5380_cmd_timeout: no scsipi_xfer\n"); 537 goto out; 538 } 539 periph = xs->xs_periph; 540 sc = device_private(periph->periph_channel->chan_adapter->adapt_dev); 541 542 printf("%s: cmd timeout, targ=%d, lun=%d\n", 543 device_xname(sc->sc_dev), 544 sr->sr_target, sr->sr_lun); 545 546 /* 547 * Mark the overdue job as failed, and arrange for 548 * ncr5380_machine to terminate it. If the victim 549 * is the current job, call ncr5380_machine() now. 550 * Otherwise arrange for ncr5380_sched() to do it. 551 */ 552 sr->sr_flags |= SR_OVERDUE; 553 if (sc->sc_current == sr) { 554 NCR_TRACE("cmd_tmo: call abort, sr=0x%x\n", (long) sr); 555 ncr5380_abort(sc); 556 } else { 557 /* 558 * The driver may be idle, or busy with another job. 559 * Arrange for ncr5380_sched() to do the deed. 560 */ 561 NCR_TRACE("cmd_tmo: clear matrix, t/l=0x%02x\n", 562 (sr->sr_target << 4) | sr->sr_lun); 563 sc->sc_matrix[sr->sr_target][sr->sr_lun] = NULL; 564 } 565 566 /* 567 * We may have aborted the current job, or may have 568 * already been idle. In either case, we should now 569 * be idle, so try to start another job. 570 */ 571 if (sc->sc_state == NCR_IDLE) { 572 NCR_TRACE("cmd_tmo: call sched, cur=0x%lx\n", 573 (long)sc->sc_current); 574 ncr5380_sched(sc); 575 NCR_TRACE("cmd_tmo: sched done, cur=0x%lx\n", 576 (long)sc->sc_current); 577 } 578 579 out: 580 splx(s); 581 } 582 583 584 /***************************************************************** 585 * Interface to higher level 586 *****************************************************************/ 587 588 589 /* 590 * Enter a new SCSI command into the "issue" queue, and 591 * if there is work to do, start it going. 592 * 593 * WARNING: This can be called recursively! 594 * (see comment in ncr5380_done) 595 */ 596 597 void 598 ncr5380_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 599 void *arg) 600 { 601 struct scsipi_xfer *xs; 602 struct scsipi_periph *periph; 603 struct ncr5380_softc *sc; 604 struct sci_req *sr; 605 int s, i, flags; 606 607 sc = device_private(chan->chan_adapter->adapt_dev); 608 609 switch (req) { 610 case ADAPTER_REQ_RUN_XFER: 611 xs = arg; 612 periph = xs->xs_periph; 613 flags = xs->xs_control; 614 615 if (flags & XS_CTL_DATA_UIO) 616 panic("%s: scsi data uio requested", __func__); 617 618 s = splbio(); 619 620 if (flags & XS_CTL_POLL) { 621 /* Terminate any current command. */ 622 sr = sc->sc_current; 623 if (sr) { 624 #ifdef NCR5380_DEBUG 625 printf("%s: polled request aborting %d/%d\n", 626 device_xname(sc->sc_dev), 627 sr->sr_target, sr->sr_lun); 628 #endif 629 ncr5380_abort(sc); 630 } 631 if (sc->sc_state != NCR_IDLE) { 632 panic("%s: polled request, abort failed", 633 __func__); 634 } 635 } 636 637 /* 638 * Find lowest empty slot in ring buffer. 639 * XXX: What about "fairness" and cmd order? 640 */ 641 for (i = 0; i < SCI_OPENINGS; i++) 642 if (sc->sc_ring[i].sr_xs == NULL) 643 goto new; 644 645 /* 646 * This should never happen as we track the resources 647 * in the mid-layer. 648 */ 649 scsipi_printaddr(periph); 650 printf("unable to allocate ring slot\n"); 651 panic("%s", __func__); 652 653 new: 654 /* Create queue entry */ 655 sr = &sc->sc_ring[i]; 656 sr->sr_xs = xs; 657 sr->sr_target = periph->periph_target; 658 sr->sr_lun = periph->periph_lun; 659 sr->sr_dma_hand = NULL; 660 sr->sr_dataptr = xs->data; 661 sr->sr_datalen = xs->datalen; 662 sr->sr_flags = (flags & XS_CTL_POLL) ? SR_IMMED : 0; 663 if (xs->xs_control & XS_CTL_REQSENSE) 664 sr->sr_flags |= SR_IMMED; /* no disconnect */ 665 sr->sr_status = -1; /* no value */ 666 sc->sc_ncmds++; 667 668 NCR_TRACE("scsipi_cmd: new sr=0x0\n", (long)sr); 669 670 if (flags & XS_CTL_POLL) { 671 /* Force this new command to be next. */ 672 sc->sc_rr = i; 673 } 674 675 /* 676 * If we were idle, run some commands... 677 */ 678 if (sc->sc_state == NCR_IDLE) { 679 NCR_TRACE("scsipi_cmd: call sched, cur=0x%x\n", 680 (long) sc->sc_current); 681 ncr5380_sched(sc); 682 NCR_TRACE("scsipi_cmd: sched done, cur=0x%x\n", 683 (long) sc->sc_current); 684 } 685 686 if (flags & XS_CTL_POLL) { 687 /* Make sure ncr5380_sched() finished it. */ 688 if ((xs->xs_status & XS_STS_DONE) == 0) 689 panic("%s: poll didn't finish", __func__); 690 } 691 splx(s); 692 return; 693 694 case ADAPTER_REQ_GROW_RESOURCES: 695 /* XXX Not supported. */ 696 return; 697 698 case ADAPTER_REQ_SET_XFER_MODE: 699 { 700 /* 701 * We don't support Sync, Wide, or Tagged Queueing. 702 * Just callback now, to report this. 703 */ 704 struct scsipi_xfer_mode *xm = arg; 705 706 xm->xm_mode = 0; 707 xm->xm_period = 0; 708 xm->xm_offset = 0; 709 scsipi_async_event(chan, ASYNC_EVENT_XFER_MODE, xm); 710 return; 711 } 712 } 713 } 714 715 /* 716 * POST PROCESSING OF SCSI_CMD (usually current) 717 * Called by ncr5380_sched(), ncr5380_machine() 718 */ 719 static void 720 ncr5380_done(struct ncr5380_softc *sc) 721 { 722 struct sci_req *sr; 723 struct scsipi_xfer *xs; 724 725 #ifdef DIAGNOSTIC 726 if (sc->sc_state == NCR_IDLE) 727 panic("%s: state=idle", __func__); 728 if (sc->sc_current == NULL) 729 panic("%s: current=0", __func__); 730 #endif 731 732 sr = sc->sc_current; 733 xs = sr->sr_xs; 734 735 NCR_TRACE("done: top, cur=0x%x\n", (long) sc->sc_current); 736 737 /* 738 * Clean up DMA resources for this command. 739 */ 740 if (sr->sr_dma_hand) { 741 NCR_TRACE("done: dma_free, dh=0x%x\n", 742 (long) sr->sr_dma_hand); 743 (*sc->sc_dma_free)(sc); 744 } 745 #ifdef DIAGNOSTIC 746 if (sr->sr_dma_hand) 747 panic("%s: DMA free did not", __func__); 748 #endif 749 750 if (sc->sc_state & NCR_ABORTING) { 751 NCR_TRACE("done: aborting, error=%d\n", xs->error); 752 if (xs->error == XS_NOERROR) 753 xs->error = XS_TIMEOUT; 754 } 755 756 NCR_TRACE("done: check error=%d\n", (long) xs->error); 757 758 /* If error is already set, ignore sr_status value. */ 759 if (xs->error != XS_NOERROR) 760 goto finish; 761 762 NCR_TRACE("done: check status=%d\n", sr->sr_status); 763 764 xs->status = sr->sr_status; 765 switch (sr->sr_status) { 766 case SCSI_OK: /* 0 */ 767 xs->error = XS_NOERROR; 768 break; 769 770 case SCSI_CHECK: 771 case SCSI_BUSY: 772 xs->error = XS_BUSY; 773 break; 774 775 case -1: 776 /* This is our "impossible" initial value. */ 777 /* fallthrough */ 778 default: 779 printf("%s: target %d, bad status=%d\n", 780 device_xname(sc->sc_dev), sr->sr_target, sr->sr_status); 781 xs->error = XS_DRIVER_STUFFUP; 782 break; 783 } 784 785 finish: 786 787 NCR_TRACE("done: finish, error=%d\n", xs->error); 788 789 /* 790 * Dequeue the finished command, but don't clear sc_state until 791 * after the call to scsipi_done(), because that may call back to 792 * ncr5380_scsi_cmd() - unwanted recursion! 793 * 794 * Keeping sc->sc_state != idle terminates the recursion. 795 */ 796 #ifdef DIAGNOSTIC 797 if ((sc->sc_state & NCR_WORKING) == 0) 798 panic("%s: bad state", __func__); 799 #endif 800 801 /* Clear our pointers to the request. */ 802 sc->sc_current = NULL; 803 sc->sc_matrix[sr->sr_target][sr->sr_lun] = NULL; 804 callout_stop(&sr->sr_xs->xs_callout); 805 806 /* Make the request free. */ 807 sr->sr_xs = NULL; 808 sc->sc_ncmds--; 809 810 const bool aborting = sc->sc_state & NCR_ABORTING; 811 if (aborting) 812 scsipi_channel_freeze(&sc->sc_channel, 1); 813 814 /* Tell common SCSI code it is done. */ 815 scsipi_done(xs); 816 817 sc->sc_state = NCR_IDLE; 818 /* Now ncr5380_sched() may be called again. */ 819 820 if (aborting) 821 scsipi_channel_thaw(&sc->sc_channel, 1); 822 } 823 824 825 /* 826 * Schedule a SCSI operation. This routine should return 827 * only after it achieves one of the following conditions: 828 * Busy (sc->sc_state != NCR_IDLE) 829 * No more work can be started. 830 */ 831 static void 832 ncr5380_sched(struct ncr5380_softc *sc) 833 { 834 struct sci_req *sr; 835 struct scsipi_xfer *xs; 836 int target = 0, lun = 0; 837 int error, i; 838 839 /* Another hack (Er.. hook!) for the sun3 si: */ 840 if (sc->sc_intr_off) { 841 NCR_TRACE("sched: top, intr off\n", 0); 842 sc->sc_intr_off(sc); 843 } 844 845 next_job: 846 /* 847 * Grab the next job from queue. Must be idle. 848 */ 849 #ifdef DIAGNOSTIC 850 if (sc->sc_state != NCR_IDLE) 851 panic("%s: not idle", __func__); 852 if (sc->sc_current) 853 panic("%s: current set", __func__); 854 #endif 855 856 /* 857 * Always start the search where we last looked. 858 * The REQUEST_SENSE logic depends on this to 859 * choose the same job as was last picked, so it 860 * can just clear sc_current and reschedule. 861 * (Avoids loss of "contingent allegiance".) 862 */ 863 i = sc->sc_rr; 864 sr = NULL; 865 do { 866 if (sc->sc_ring[i].sr_xs) { 867 target = sc->sc_ring[i].sr_target; 868 lun = sc->sc_ring[i].sr_lun; 869 if (sc->sc_matrix[target][lun] == NULL) { 870 /* 871 * Do not mark the target/LUN busy yet, 872 * because reselect may cause some other 873 * job to become the current one, so we 874 * might not actually start this job. 875 * Instead, set sc_matrix later on. 876 */ 877 sc->sc_rr = i; 878 sr = &sc->sc_ring[i]; 879 break; 880 } 881 } 882 i++; 883 if (i == SCI_OPENINGS) 884 i = 0; 885 } while (i != sc->sc_rr); 886 887 if (sr == NULL) { 888 NCR_TRACE("sched: no work, cur=0x%x\n", 889 (long) sc->sc_current); 890 891 /* Another hack (Er.. hook!) for the sun3 si: */ 892 if (sc->sc_intr_on) { 893 NCR_TRACE("sched: ret, intr ON\n", 0); 894 sc->sc_intr_on(sc); 895 } 896 897 return; /* No more work to do. */ 898 } 899 900 NCR_TRACE("sched: select for t/l=0x%02x\n", 901 (sr->sr_target << 4) | sr->sr_lun); 902 903 sc->sc_state = NCR_WORKING; 904 error = ncr5380_select(sc, sr); 905 if (sc->sc_current) { 906 /* Lost the race! reselected out from under us! */ 907 /* Work with the reselected job. */ 908 if (sr->sr_flags & SR_IMMED) { 909 printf("%s: reselected while polling (abort)\n", 910 device_xname(sc->sc_dev)); 911 /* Abort the reselected job. */ 912 sc->sc_state |= NCR_ABORTING; 913 sc->sc_msgpriq |= SEND_ABORT; 914 } 915 sr = sc->sc_current; 916 xs = sr->sr_xs; 917 NCR_TRACE("sched: reselect, new sr=0x%x\n", (long)sr); 918 goto have_nexus; 919 } 920 921 /* Normal selection result. Target/LUN is now busy. */ 922 sc->sc_matrix[target][lun] = sr; 923 sc->sc_current = sr; /* connected */ 924 xs = sr->sr_xs; 925 926 /* 927 * Initialize pointers, etc. for this job 928 */ 929 sc->sc_dataptr = sr->sr_dataptr; 930 sc->sc_datalen = sr->sr_datalen; 931 sc->sc_prevphase = PHASE_INVALID; 932 sc->sc_msgpriq = SEND_IDENTIFY; 933 sc->sc_msgoutq = 0; 934 sc->sc_msgout = 0; 935 936 NCR_TRACE("sched: select rv=%d\n", error); 937 938 switch (error) { 939 case XS_NOERROR: 940 break; 941 942 case XS_BUSY: 943 /* XXX - Reset and try again. */ 944 printf("%s: select found SCSI bus busy, resetting...\n", 945 device_xname(sc->sc_dev)); 946 ncr5380_reset_scsibus(sc); 947 /* fallthrough */ 948 case XS_SELTIMEOUT: 949 default: 950 xs->error = error; /* from select */ 951 NCR_TRACE("sched: call done, sr=0x%x\n", (long)sr); 952 ncr5380_done(sc); 953 954 /* Paranoia: clear everything. */ 955 sc->sc_dataptr = NULL; 956 sc->sc_datalen = 0; 957 sc->sc_prevphase = PHASE_INVALID; 958 sc->sc_msgpriq = 0; 959 sc->sc_msgoutq = 0; 960 sc->sc_msgout = 0; 961 962 goto next_job; 963 } 964 965 /* 966 * Selection was successful. Normally, this means 967 * we are starting a new command. However, this 968 * might be the termination of an overdue job. 969 */ 970 if (sr->sr_flags & SR_OVERDUE) { 971 NCR_TRACE("sched: overdue, sr=0x%x\n", (long)sr); 972 sc->sc_state |= NCR_ABORTING; 973 sc->sc_msgpriq |= SEND_ABORT; 974 goto have_nexus; 975 } 976 977 /* 978 * OK, we are starting a new command. 979 * Initialize and allocate resources for the new command. 980 * Device reset is special (only uses MSG_OUT phase). 981 * Normal commands start in MSG_OUT phase where we will 982 * send and IDENDIFY message, and then expect CMD phase. 983 */ 984 #ifdef NCR5380_DEBUG 985 if (ncr5380_debug & NCR_DBG_CMDS) { 986 printf("ncr5380_sched: begin, target=%d, LUN=%d\n", 987 xs->xs_periph->periph_target, xs->xs_periph->periph_lun); 988 ncr5380_show_scsi_cmd(xs); 989 } 990 #endif 991 if (xs->xs_control & XS_CTL_RESET) { 992 NCR_TRACE("sched: cmd=reset, sr=0x%x\n", (long)sr); 993 /* Not an error, so do not set NCR_ABORTING */ 994 sc->sc_msgpriq |= SEND_DEV_RESET; 995 goto have_nexus; 996 } 997 998 #ifdef DIAGNOSTIC 999 if ((xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) == 0) { 1000 if (sc->sc_dataptr) { 1001 printf("%s: ptr but no data in/out flags?\n", 1002 device_xname(sc->sc_dev)); 1003 NCR_BREAK(); 1004 sc->sc_dataptr = NULL; 1005 } 1006 } 1007 #endif 1008 1009 /* Allocate DMA space (maybe) */ 1010 if (sc->sc_dataptr && sc->sc_dma_alloc && 1011 (sc->sc_datalen >= sc->sc_min_dma_len)) 1012 { 1013 NCR_TRACE("sched: dma_alloc, len=%d\n", sc->sc_datalen); 1014 (*sc->sc_dma_alloc)(sc); 1015 } 1016 1017 /* 1018 * Initialization hook called just after select, 1019 * at the beginning of COMMAND phase. 1020 * (but AFTER the DMA allocation is done) 1021 * 1022 * The evil Sun "si" adapter (OBIO variant) needs some 1023 * setup done to the DMA engine BEFORE the target puts 1024 * the SCSI bus into any DATA phase. 1025 */ 1026 if (sr->sr_dma_hand && sc->sc_dma_setup) { 1027 NCR_TRACE("sched: dma_setup, dh=0x%x\n", 1028 (long) sr->sr_dma_hand); 1029 sc->sc_dma_setup(sc); 1030 } 1031 1032 /* 1033 * Schedule a timeout for the job we are starting. 1034 */ 1035 if ((sr->sr_flags & SR_IMMED) == 0) { 1036 i = mstohz(xs->timeout); 1037 NCR_TRACE("sched: set timeout=%d\n", i); 1038 callout_reset(&sr->sr_xs->xs_callout, i, 1039 ncr5380_cmd_timeout, sr); 1040 } 1041 1042 have_nexus: 1043 NCR_TRACE("sched: call machine, cur=0x%x\n", 1044 (long) sc->sc_current); 1045 ncr5380_machine(sc); 1046 NCR_TRACE("sched: machine done, cur=0x%x\n", 1047 (long) sc->sc_current); 1048 1049 /* 1050 * What state did ncr5380_machine() leave us in? 1051 * Hopefully it sometimes completes a job... 1052 */ 1053 if (sc->sc_state == NCR_IDLE) 1054 goto next_job; 1055 1056 return; /* Have work in progress. */ 1057 } 1058 1059 1060 /* 1061 * Reselect handler: checks for reselection, and if we are being 1062 * reselected, it sets up sc->sc_current. 1063 * 1064 * We are reselected when: 1065 * SEL is TRUE 1066 * IO is TRUE 1067 * BSY is FALSE 1068 */ 1069 void 1070 ncr5380_reselect(struct ncr5380_softc *sc) 1071 { 1072 struct sci_req *sr; 1073 int target, lun, phase, timo; 1074 int target_mask = 0; /* XXX gcc (on ns32k) */ 1075 uint8_t bus, data, icmd, mode, msg; 1076 1077 #ifdef DIAGNOSTIC 1078 /* 1079 * Note: sc_state will be "idle" when ncr5380_intr() 1080 * calls, or "working" when ncr5380_select() calls. 1081 * (So don't test that in this DIAGNOSTIC) 1082 */ 1083 if (sc->sc_current) 1084 panic("%s: current set", __func__); 1085 #endif 1086 1087 /* 1088 * First, check the select line. 1089 * (That has to be set first.) 1090 */ 1091 bus = NCR5380_READ(sc, sci_bus_csr); 1092 if ((bus & SCI_BUS_SEL) == 0) { 1093 /* Not a selection or reselection. */ 1094 return; 1095 } 1096 1097 /* 1098 * The target will assert BSY first (for bus arbitration), 1099 * then raise SEL, and finally drop BSY. Only then is the 1100 * data bus required to have valid selection ID bits set. 1101 * Wait for: SEL==1, BSY==0 before reading the data bus. 1102 * While this theoretically can happen, we are apparently 1103 * never fast enough to get here before BSY drops. 1104 */ 1105 timo = ncr5380_wait_nrq_timo; 1106 for (;;) { 1107 if ((bus & SCI_BUS_BSY) == 0) 1108 break; 1109 /* Probably never get here... */ 1110 if (--timo <= 0) { 1111 printf("%s: reselect, BSY stuck, bus=0x%x\n", 1112 device_xname(sc->sc_dev), bus); 1113 /* Not much we can do. Reset the bus. */ 1114 ncr5380_reset_scsibus(sc); 1115 return; 1116 } 1117 delay(2); 1118 bus = NCR5380_READ(sc, sci_bus_csr); 1119 /* If SEL went away, forget it. */ 1120 if ((bus & SCI_BUS_SEL) == 0) 1121 return; 1122 /* Still have SEL, check BSY. */ 1123 } 1124 NCR_TRACE("reselect, valid data after %d loops\n", 1125 ncr5380_wait_nrq_timo - timo); 1126 1127 /* 1128 * Good. We have SEL=1 and BSY=0. Now wait for a 1129 * "bus settle delay" before we sample the data bus 1130 */ 1131 delay(2); 1132 data = NCR5380_READ(sc, sci_data) & 0xFF; 1133 /* Parity check is implicit in data validation below. */ 1134 1135 /* 1136 * Is this a reselect (I/O == 1) or have we been 1137 * selected as a target? (I/O == 0) 1138 */ 1139 if ((bus & SCI_BUS_IO) == 0) { 1140 printf("%s: selected as target, data=0x%x\n", 1141 device_xname(sc->sc_dev), data); 1142 /* Not much we can do. Reset the bus. */ 1143 /* XXX: send some sort of message? */ 1144 ncr5380_reset_scsibus(sc); 1145 return; 1146 } 1147 1148 /* 1149 * OK, this is a reselection. 1150 */ 1151 for (target = 0; target < 7; target++) { 1152 target_mask = (1 << target); 1153 if (data & target_mask) 1154 break; 1155 } 1156 if ((data & 0x7F) != target_mask) { 1157 /* No selecting ID? or >2 IDs on bus? */ 1158 printf("%s: bad reselect, data=0x%x\n", 1159 device_xname(sc->sc_dev), data); 1160 return; 1161 } 1162 1163 NCR_TRACE("reselect: target=0x%x\n", target); 1164 1165 /* Raise BSY to acknowledge target reselection. */ 1166 NCR5380_WRITE(sc, sci_icmd, SCI_ICMD_BSY); 1167 1168 /* Wait for target to drop SEL. */ 1169 timo = ncr5380_wait_nrq_timo; 1170 for (;;) { 1171 bus = NCR5380_READ(sc, sci_bus_csr); 1172 if ((bus & SCI_BUS_SEL) == 0) 1173 break; /* success */ 1174 if (--timo <= 0) { 1175 printf("%s: reselect, SEL stuck, bus=0x%x\n", 1176 device_xname(sc->sc_dev), bus); 1177 NCR_BREAK(); 1178 /* assume connected (fail later if not) */ 1179 break; 1180 } 1181 delay(2); 1182 } 1183 1184 /* Now we drop BSY, and we are connected. */ 1185 NCR5380_WRITE(sc, sci_icmd, 0); 1186 NCR5380_WRITE(sc, sci_sel_enb, 0); 1187 SCI_CLR_INTR(sc); 1188 1189 /* 1190 * At this point the target should send an IDENTIFY message, 1191 * which will permit us to determine the reselecting LUN. 1192 * If not, we assume LUN 0. 1193 */ 1194 lun = 0; 1195 /* Wait for REQ before reading bus phase. */ 1196 if (ncr5380_wait_req(sc)) { 1197 printf("%s: reselect, no REQ\n", 1198 device_xname(sc->sc_dev)); 1199 /* Try to send an ABORT message. */ 1200 goto abort; 1201 } 1202 phase = SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr)); 1203 if (phase != PHASE_MSG_IN) { 1204 printf("%s: reselect, phase=%d\n", 1205 device_xname(sc->sc_dev), phase); 1206 goto abort; 1207 } 1208 1209 /* Ack. the change to PHASE_MSG_IN */ 1210 NCR5380_WRITE(sc, sci_tcmd, PHASE_MSG_IN); 1211 1212 /* Peek at the message byte without consuming it! */ 1213 msg = NCR5380_READ(sc, sci_data); 1214 if ((msg & 0x80) == 0) { 1215 printf("%s: reselect, not identify, msg=%d\n", 1216 device_xname(sc->sc_dev), msg); 1217 goto abort; 1218 } 1219 lun = msg & 7; 1220 1221 /* We now know target/LUN. Do we have the request? */ 1222 sr = sc->sc_matrix[target][lun]; 1223 if (sr) { 1224 /* We now have a nexus. */ 1225 sc->sc_state |= NCR_WORKING; 1226 sc->sc_current = sr; 1227 NCR_TRACE("reselect: resume sr=0x%x\n", (long)sr); 1228 1229 /* Implicit restore pointers message */ 1230 sc->sc_dataptr = sr->sr_dataptr; 1231 sc->sc_datalen = sr->sr_datalen; 1232 1233 sc->sc_prevphase = PHASE_INVALID; 1234 sc->sc_msgpriq = 0; 1235 sc->sc_msgoutq = 0; 1236 sc->sc_msgout = 0; 1237 1238 /* XXX: Restore the normal mode register. */ 1239 /* If this target's bit is set, do NOT check parity. */ 1240 if (sc->sc_parity_disable & target_mask) 1241 mode = SCI_MODE_MONBSY; 1242 else 1243 mode = SCI_MODE_MONBSY | SCI_MODE_PAR_CHK; 1244 /* XXX CXD1180 asserts MONBSY before disconnect */ 1245 if (sc->sc_rev == NCR_VARIANT_CXD1180) 1246 mode &= ~SCI_MODE_MONBSY; 1247 1248 NCR5380_WRITE(sc, sci_mode, mode); 1249 1250 /* 1251 * Another hack for the Sun3 "si", which needs 1252 * some setup done to its DMA engine before the 1253 * target puts the SCSI bus into any DATA phase. 1254 */ 1255 if (sr->sr_dma_hand && sc->sc_dma_setup) { 1256 NCR_TRACE("reselect: call DMA setup, dh=0x%x\n", 1257 (long) sr->sr_dma_hand); 1258 sc->sc_dma_setup(sc); 1259 } 1260 1261 /* Now consume the IDENTIFY message. */ 1262 ncr5380_pio_in(sc, PHASE_MSG_IN, 1, &msg); 1263 return; 1264 } 1265 1266 printf("%s: phantom reselect: target=%d, LUN=%d\n", 1267 device_xname(sc->sc_dev), target, lun); 1268 abort: 1269 /* 1270 * Try to send an ABORT message. This makes us 1271 * temporarily busy, but no current command... 1272 */ 1273 sc->sc_state |= NCR_ABORTING; 1274 1275 /* Raise ATN, delay, raise ACK... */ 1276 icmd = SCI_ICMD_ATN; 1277 NCR5380_WRITE(sc, sci_icmd, icmd); 1278 delay(2); 1279 1280 /* Now consume the IDENTIFY message. */ 1281 ncr5380_pio_in(sc, PHASE_MSG_IN, 1, &msg); 1282 1283 /* Finally try to send the ABORT. */ 1284 sc->sc_prevphase = PHASE_INVALID; 1285 sc->sc_msgpriq = SEND_ABORT; 1286 ncr5380_msg_out(sc); 1287 1288 NCR5380_WRITE(sc, sci_tcmd, PHASE_INVALID); 1289 NCR5380_WRITE(sc, sci_sel_enb, 0); 1290 SCI_CLR_INTR(sc); 1291 NCR5380_WRITE(sc, sci_sel_enb, 0x80); 1292 1293 sc->sc_state &= ~NCR_ABORTING; 1294 } 1295 1296 1297 /* 1298 * Select target: xs is the transfer that we are selecting for. 1299 * sc->sc_current should be NULL. 1300 * 1301 * Returns: 1302 * sc->sc_current != NULL ==> we were reselected (race!) 1303 * XS_NOERROR ==> selection worked 1304 * XS_BUSY ==> lost arbitration 1305 * XS_SELTIMEOUT ==> no response to selection 1306 */ 1307 static int 1308 ncr5380_select(struct ncr5380_softc *sc, struct sci_req *sr) 1309 { 1310 int timo, s, target_mask; 1311 uint8_t data, icmd, mode; 1312 1313 /* Check for reselect */ 1314 ncr5380_reselect(sc); 1315 if (sc->sc_current) { 1316 NCR_TRACE("select: reselect, cur=0x%x\n", 1317 (long) sc->sc_current); 1318 return XS_BUSY; /* reselected */ 1319 } 1320 1321 /* 1322 * Set phase bits to 0, otherwise the 5380 won't drive the bus during 1323 * selection. 1324 */ 1325 NCR5380_WRITE(sc, sci_tcmd, PHASE_DATA_OUT); 1326 NCR5380_WRITE(sc, sci_icmd, 0); 1327 icmd = 0; 1328 NCR5380_WRITE(sc, sci_mode, 0); 1329 1330 /* 1331 * Arbitrate for the bus. The 5380 takes care of the 1332 * time-critical bus interactions. We set our ID bit 1333 * in the output data register and set MODE_ARB. The 1334 * 5380 watches for the required "bus free" period. 1335 * If and when the "bus free" period is detected, the 1336 * 5380 drives BSY, drives the data bus, and sets the 1337 * "arbitration in progress" (AIP) bit to let us know 1338 * arbitration has started (and that it asserts BSY). 1339 * We then wait for one arbitration delay (2.2uS) and 1340 * check the ICMD_LST bit, which will be set if some 1341 * other target drives SEL during arbitration. 1342 * 1343 * There is a time-critical section during the period 1344 * after we enter arbitration up until we assert SEL. 1345 * Avoid long interrupts during this period. 1346 */ 1347 s = splvm(); /* XXX: Begin time-critical section */ 1348 1349 NCR5380_WRITE(sc, sci_odata, 0x80); /* OUR_ID */ 1350 NCR5380_WRITE(sc, sci_mode, SCI_MODE_ARB); 1351 1352 #define WAIT_AIP_USEC 20 /* pleanty of time */ 1353 /* Wait for the AIP bit to turn on. */ 1354 timo = WAIT_AIP_USEC; 1355 for (;;) { 1356 if (NCR5380_READ(sc, sci_icmd) & SCI_ICMD_AIP) 1357 break; 1358 if (timo <= 0) { 1359 /* 1360 * Did not see any "bus free" period. 1361 * The usual reason is a reselection, 1362 * so treat this as arbitration loss. 1363 */ 1364 NCR_TRACE("select: bus busy, rc=%d\n", XS_BUSY); 1365 goto lost_arb; 1366 } 1367 timo -= 2; 1368 delay(2); 1369 } 1370 NCR_TRACE("select: have AIP after %d uSec.\n", 1371 WAIT_AIP_USEC - timo); 1372 1373 /* Got AIP. Wait one arbitration delay (2.2 uS.) */ 1374 delay(3); 1375 1376 /* Check for ICMD_LST */ 1377 if (NCR5380_READ(sc, sci_icmd) & SCI_ICMD_LST) { 1378 /* Some other target asserted SEL. */ 1379 NCR_TRACE("select: lost one, rc=%d\n", XS_BUSY); 1380 goto lost_arb; 1381 } 1382 1383 /* 1384 * No other device has declared itself the winner. 1385 * The spec. says to check for higher IDs, but we 1386 * are always the highest (ID=7) so don't bother. 1387 * We can now declare victory by asserting SEL. 1388 * 1389 * Note that the 5380 is asserting BSY because we 1390 * have entered arbitration mode. We will now hold 1391 * BSY directly so we can turn off ARB mode. 1392 */ 1393 icmd = (SCI_ICMD_BSY | SCI_ICMD_SEL); 1394 NCR5380_WRITE(sc, sci_icmd, icmd); 1395 1396 /* 1397 * "The SCSI device that wins arbitration shall wait 1398 * at least a bus clear delay plus a bus settle delay 1399 * after asserting the SEL signal before changing 1400 * any [other] signal." (1.2uS. total) 1401 */ 1402 delay(2); 1403 1404 /* 1405 * Check one last time to see if we really did 1406 * win arbitration. This might only happen if 1407 * there can be a higher selection ID than ours. 1408 * Keep this code for reference anyway... 1409 */ 1410 /* XXX CXD1180 asserts LST here */ 1411 if ((sc->sc_rev != NCR_VARIANT_CXD1180) && 1412 (NCR5380_READ(sc, sci_icmd) & SCI_ICMD_LST)) { 1413 /* Some other target asserted SEL. */ 1414 NCR_TRACE("select: lost two, rc=%d\n", XS_BUSY); 1415 1416 lost_arb: 1417 NCR5380_WRITE(sc, sci_icmd, 0); 1418 NCR5380_WRITE(sc, sci_mode, 0); 1419 1420 splx(s); /* XXX: End of time-critical section. */ 1421 1422 /* 1423 * When we lose arbitration, it usually means 1424 * there is a target trying to reselect us. 1425 */ 1426 ncr5380_reselect(sc); 1427 return XS_BUSY; 1428 } 1429 1430 /* Leave ARB mode Now that we drive BSY+SEL */ 1431 NCR5380_WRITE(sc, sci_mode, 0); 1432 NCR5380_WRITE(sc, sci_sel_enb, 0); 1433 1434 splx(s); /* XXX: End of time-critical section. */ 1435 1436 /* 1437 * Arbitration is complete. Now do selection: 1438 * Drive the data bus with the ID bits for both 1439 * the host and target. Also set ATN now, to 1440 * ask the target for a message out phase. 1441 */ 1442 target_mask = (1 << sr->sr_target); 1443 data = 0x80 | target_mask; 1444 NCR5380_WRITE(sc, sci_odata, data); 1445 icmd |= (SCI_ICMD_DATA | SCI_ICMD_ATN); 1446 NCR5380_WRITE(sc, sci_icmd, icmd); 1447 delay(2); /* two deskew delays. */ 1448 1449 /* De-assert BSY (targets sample the data now). */ 1450 icmd &= ~SCI_ICMD_BSY; 1451 NCR5380_WRITE(sc, sci_icmd, icmd); 1452 delay(3); /* Bus settle delay. */ 1453 1454 /* 1455 * Wait for the target to assert BSY. 1456 * SCSI spec. says wait for 250 mS. 1457 */ 1458 for (timo = 25000;;) { 1459 if (NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_BSY) 1460 goto success; 1461 if (--timo <= 0) 1462 break; 1463 delay(10); 1464 } 1465 1466 /* 1467 * There is no reaction from the target. Start the selection 1468 * timeout procedure. We release the databus but keep SEL+ATN 1469 * asserted. After that we wait a 'selection abort time' (200 1470 * usecs) and 2 deskew delays (90 ns) and check BSY again. 1471 * When BSY is asserted, we assume the selection succeeded, 1472 * otherwise we release the bus. 1473 */ 1474 icmd &= ~SCI_ICMD_DATA; 1475 NCR5380_WRITE(sc, sci_icmd, icmd); 1476 delay(201); 1477 if ((NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_BSY) == 0) { 1478 /* Really no device on bus */ 1479 NCR5380_WRITE(sc, sci_tcmd, PHASE_INVALID); 1480 NCR5380_WRITE(sc, sci_icmd, 0); 1481 NCR5380_WRITE(sc, sci_mode, 0); 1482 NCR5380_WRITE(sc, sci_sel_enb, 0); 1483 SCI_CLR_INTR(sc); 1484 NCR5380_WRITE(sc, sci_sel_enb, 0x80); 1485 NCR_TRACE("select: device down, rc=%d\n", XS_SELTIMEOUT); 1486 return XS_SELTIMEOUT; 1487 } 1488 1489 success: 1490 /* 1491 * The target is now driving BSY, so we can stop 1492 * driving SEL and the data bus (keep ATN true). 1493 * Configure the ncr5380 to monitor BSY, parity. 1494 */ 1495 icmd &= ~(SCI_ICMD_DATA | SCI_ICMD_SEL); 1496 NCR5380_WRITE(sc, sci_icmd, icmd); 1497 1498 /* If this target's bit is set, do NOT check parity. */ 1499 if (sc->sc_parity_disable & target_mask) 1500 mode = SCI_MODE_MONBSY; 1501 else 1502 mode = SCI_MODE_MONBSY | SCI_MODE_PAR_CHK; 1503 /* XXX CXD1180 asserts MONBSY before disconnect */ 1504 if (sc->sc_rev == NCR_VARIANT_CXD1180) 1505 mode &= ~SCI_MODE_MONBSY; 1506 1507 NCR5380_WRITE(sc, sci_mode, mode); 1508 1509 return XS_NOERROR; 1510 } 1511 1512 1513 /***************************************************************** 1514 * Functions to handle each info. transfer phase: 1515 *****************************************************************/ 1516 1517 /* 1518 * The message system: 1519 * 1520 * This is a revamped message system that now should easier accommodate 1521 * new messages, if necessary. 1522 * 1523 * Currently we accept these messages: 1524 * IDENTIFY (when reselecting) 1525 * COMMAND COMPLETE # (expect bus free after messages marked #) 1526 * NOOP 1527 * MESSAGE REJECT 1528 * SYNCHRONOUS DATA TRANSFER REQUEST 1529 * SAVE DATA POINTER 1530 * RESTORE POINTERS 1531 * DISCONNECT # 1532 * 1533 * We may send these messages in prioritized order: 1534 * BUS DEVICE RESET # if XS_CTL_RESET & xs->xs_control (or in 1535 * weird sits.) 1536 * MESSAGE PARITY ERROR par. err. during MSGI 1537 * MESSAGE REJECT If we get a message we don't know how to handle 1538 * ABORT # send on errors 1539 * INITIATOR DETECTED ERROR also on errors (SCSI2) (during info xfer) 1540 * IDENTIFY At the start of each transfer 1541 * SYNCHRONOUS DATA TRANSFER REQUEST if appropriate 1542 * NOOP if nothing else fits the bill ... 1543 */ 1544 1545 /* 1546 * Precondition: 1547 * The SCSI bus is already in the MSGI phase and there is a message byte 1548 * on the bus, along with an asserted REQ signal. 1549 * 1550 * Our return value determines whether our caller, ncr5380_machine() 1551 * will expect to see another REQ (and possibly phase change). 1552 */ 1553 static int 1554 ncr5380_msg_in(struct ncr5380_softc *sc) 1555 { 1556 struct sci_req *sr = sc->sc_current; 1557 struct scsipi_xfer *xs = sr->sr_xs; 1558 int n, phase; 1559 int act_flags; 1560 uint8_t icmd; 1561 1562 /* acknowledge phase change */ 1563 NCR5380_WRITE(sc, sci_tcmd, PHASE_MSG_IN); 1564 1565 act_flags = ACT_CONTINUE; 1566 icmd = NCR5380_READ(sc, sci_icmd) & SCI_ICMD_RMASK; 1567 1568 if (sc->sc_prevphase == PHASE_MSG_IN) { 1569 /* This is a continuation of the previous message. */ 1570 n = sc->sc_imp - sc->sc_imess; 1571 NCR_TRACE("msg_in: continuation, n=%d\n", n); 1572 goto nextbyte; 1573 } 1574 1575 /* This is a new MESSAGE IN phase. Clean up our state. */ 1576 sc->sc_state &= ~NCR_DROP_MSGIN; 1577 1578 nextmsg: 1579 n = 0; 1580 sc->sc_imp = &sc->sc_imess[n]; 1581 1582 nextbyte: 1583 /* 1584 * Read a whole message, but don't ack the last byte. If we reject the 1585 * message, we have to assert ATN during the message transfer phase 1586 * itself. 1587 */ 1588 for (;;) { 1589 /* 1590 * Read a message byte. 1591 * First, check BSY, REQ, phase... 1592 */ 1593 if (!SCI_BUSY(sc)) { 1594 NCR_TRACE("msg_in: lost BSY, n=%d\n", n); 1595 /* XXX - Assume the command completed? */ 1596 act_flags |= (ACT_DISCONNECT | ACT_CMD_DONE); 1597 return act_flags; 1598 } 1599 if (ncr5380_wait_req(sc)) { 1600 NCR_TRACE("msg_in: BSY but no REQ, n=%d\n", n); 1601 /* Just let ncr5380_machine() handle it... */ 1602 return act_flags; 1603 } 1604 phase = SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr)); 1605 if (phase != PHASE_MSG_IN) { 1606 /* 1607 * Target left MESSAGE IN, probably because it 1608 * a) noticed our ATN signal, or 1609 * b) ran out of messages. 1610 */ 1611 return act_flags; 1612 } 1613 /* Still in MESSAGE IN phase, and REQ is asserted. */ 1614 if (NCR5380_READ(sc, sci_csr) & SCI_CSR_PERR) { 1615 ncr_sched_msgout(sc, SEND_PARITY_ERROR); 1616 sc->sc_state |= NCR_DROP_MSGIN; 1617 } 1618 1619 /* Gather incoming message bytes if needed. */ 1620 if ((sc->sc_state & NCR_DROP_MSGIN) == 0) { 1621 if (n >= NCR_MAX_MSG_LEN) { 1622 ncr_sched_msgout(sc, SEND_REJECT); 1623 sc->sc_state |= NCR_DROP_MSGIN; 1624 } else { 1625 *sc->sc_imp++ = NCR5380_READ(sc, sci_data); 1626 n++; 1627 /* 1628 * This testing is suboptimal, but most 1629 * messages will be of the one byte variety, so 1630 * it should not affect performance 1631 * significantly. 1632 */ 1633 if (n == 1 && MSG_IS1BYTE(sc->sc_imess[0])) 1634 goto have_msg; 1635 if (n == 2 && MSG_IS2BYTE(sc->sc_imess[0])) 1636 goto have_msg; 1637 if (n >= 3 && MSG_ISEXTENDED(sc->sc_imess[0]) && 1638 n == sc->sc_imess[1] + 2) 1639 goto have_msg; 1640 } 1641 } 1642 1643 /* 1644 * If we reach this spot we're either: 1645 * a) in the middle of a multi-byte message, or 1646 * b) dropping bytes. 1647 */ 1648 1649 /* Ack the last byte read. */ 1650 icmd |= SCI_ICMD_ACK; 1651 NCR5380_WRITE(sc, sci_icmd, icmd); 1652 1653 if (ncr5380_wait_not_req(sc)) { 1654 NCR_TRACE("msg_in: drop, stuck REQ, n=%d\n", n); 1655 act_flags |= ACT_RESET_BUS; 1656 } 1657 1658 icmd &= ~SCI_ICMD_ACK; 1659 NCR5380_WRITE(sc, sci_icmd, icmd); 1660 1661 if (act_flags != ACT_CONTINUE) 1662 return act_flags; 1663 1664 /* back to nextbyte */ 1665 } 1666 1667 have_msg: 1668 /* We now have a complete message. Parse it. */ 1669 1670 switch (sc->sc_imess[0]) { 1671 case MSG_CMDCOMPLETE: 1672 NCR_TRACE("msg_in: CMDCOMPLETE\n", 0); 1673 /* Target is about to disconnect. */ 1674 act_flags |= (ACT_DISCONNECT | ACT_CMD_DONE); 1675 break; 1676 1677 case MSG_PARITY_ERROR: 1678 NCR_TRACE("msg_in: PARITY_ERROR\n", 0); 1679 /* Resend the last message. */ 1680 ncr_sched_msgout(sc, sc->sc_msgout); 1681 /* Reset icmd after scheduling the REJECT cmd - jwg */ 1682 icmd = NCR5380_READ(sc, sci_icmd) & SCI_ICMD_RMASK; 1683 break; 1684 1685 case MSG_MESSAGE_REJECT: 1686 /* The target rejects the last message we sent. */ 1687 NCR_TRACE("msg_in: got reject for 0x%x\n", sc->sc_msgout); 1688 switch (sc->sc_msgout) { 1689 case SEND_IDENTIFY: 1690 /* Really old target controller? */ 1691 /* XXX ... */ 1692 break; 1693 case SEND_INIT_DET_ERR: 1694 goto abort; 1695 } 1696 break; 1697 1698 case MSG_NOOP: 1699 NCR_TRACE("msg_in: NOOP\n", 0); 1700 break; 1701 1702 case MSG_DISCONNECT: 1703 NCR_TRACE("msg_in: DISCONNECT\n", 0); 1704 /* Target is about to disconnect. */ 1705 act_flags |= ACT_DISCONNECT; 1706 if ((xs->xs_periph->periph_quirks & PQUIRK_AUTOSAVE) == 0) 1707 break; 1708 /*FALLTHROUGH*/ 1709 1710 case MSG_SAVEDATAPOINTER: 1711 NCR_TRACE("msg_in: SAVE_PTRS\n", 0); 1712 sr->sr_dataptr = sc->sc_dataptr; 1713 sr->sr_datalen = sc->sc_datalen; 1714 break; 1715 1716 case MSG_RESTOREPOINTERS: 1717 NCR_TRACE("msg_in: RESTORE_PTRS\n", 0); 1718 sc->sc_dataptr = sr->sr_dataptr; 1719 sc->sc_datalen = sr->sr_datalen; 1720 break; 1721 1722 case MSG_EXTENDED: 1723 switch (sc->sc_imess[2]) { 1724 case MSG_EXT_SDTR: 1725 case MSG_EXT_WDTR: 1726 /* The ncr5380 can not do synchronous mode. */ 1727 goto reject; 1728 default: 1729 printf("%s: unrecognized MESSAGE EXTENDED; " 1730 "sending REJECT\n", 1731 device_xname(sc->sc_dev)); 1732 NCR_BREAK(); 1733 goto reject; 1734 } 1735 break; 1736 1737 default: 1738 NCR_TRACE("msg_in: eh? imsg=0x%x\n", sc->sc_imess[0]); 1739 printf("%s: unrecognized MESSAGE; sending REJECT\n", 1740 device_xname(sc->sc_dev)); 1741 NCR_BREAK(); 1742 /* fallthrough */ 1743 reject: 1744 ncr_sched_msgout(sc, SEND_REJECT); 1745 /* Reset icmd after scheduling the REJECT cmd - jwg */ 1746 icmd = NCR5380_READ(sc, sci_icmd) & SCI_ICMD_RMASK; 1747 break; 1748 1749 abort: 1750 sc->sc_state |= NCR_ABORTING; 1751 ncr_sched_msgout(sc, SEND_ABORT); 1752 break; 1753 } 1754 1755 /* Ack the last byte read. */ 1756 icmd |= SCI_ICMD_ACK; 1757 NCR5380_WRITE(sc, sci_icmd, icmd); 1758 1759 if (ncr5380_wait_not_req(sc)) { 1760 NCR_TRACE("msg_in: last, stuck REQ, n=%d\n", n); 1761 act_flags |= ACT_RESET_BUS; 1762 } 1763 1764 icmd &= ~SCI_ICMD_ACK; 1765 NCR5380_WRITE(sc, sci_icmd, icmd); 1766 1767 /* Go get the next message, if any. */ 1768 if (act_flags == ACT_CONTINUE) 1769 goto nextmsg; 1770 1771 return act_flags; 1772 } 1773 1774 1775 /* 1776 * The message out (and in) stuff is a bit complicated: 1777 * If the target requests another message (sequence) without 1778 * having changed phase in between it really asks for a 1779 * retransmit, probably due to parity error(s). 1780 * The following messages can be sent: 1781 * IDENTIFY @ These 4 stem from SCSI command activity 1782 * SDTR @ 1783 * WDTR @ 1784 * DEV_RESET @ 1785 * REJECT if MSGI doesn't make sense 1786 * PARITY_ERROR if parity error while in MSGI 1787 * INIT_DET_ERR if parity error while not in MSGI 1788 * ABORT if INIT_DET_ERR rejected 1789 * NOOP if asked for a message and there's nothing to send 1790 * 1791 * Note that we call this one with (sc_current == NULL) 1792 * when sending ABORT for unwanted reselections. 1793 */ 1794 static int 1795 ncr5380_msg_out(struct ncr5380_softc *sc) 1796 { 1797 struct sci_req *sr = sc->sc_current; 1798 int act_flags, n, phase, progress; 1799 uint8_t icmd, msg; 1800 1801 /* acknowledge phase change */ 1802 NCR5380_WRITE(sc, sci_tcmd, PHASE_MSG_OUT); 1803 1804 progress = 0; /* did we send any messages? */ 1805 act_flags = ACT_CONTINUE; 1806 1807 /* 1808 * Set ATN. If we're just sending a trivial 1-byte message, 1809 * we'll clear ATN later on anyway. Also drive the data bus. 1810 */ 1811 icmd = NCR5380_READ(sc, sci_icmd) & SCI_ICMD_RMASK; 1812 icmd |= (SCI_ICMD_ATN | SCI_ICMD_DATA); 1813 NCR5380_WRITE(sc, sci_icmd, icmd); 1814 1815 if (sc->sc_prevphase == PHASE_MSG_OUT) { 1816 if (sc->sc_omp == sc->sc_omess) { 1817 /* 1818 * This is a retransmission. 1819 * 1820 * We get here if the target stayed in MESSAGE OUT 1821 * phase. Section 5.1.9.2 of the SCSI 2 spec indicates 1822 * that all of the previously transmitted messages must 1823 * be sent again, in the same order. Therefore, we 1824 * requeue all the previously transmitted messages, and 1825 * start again from the top. Our simple priority 1826 * scheme keeps the messages in the right order. 1827 */ 1828 sc->sc_msgpriq |= sc->sc_msgoutq; 1829 NCR_TRACE("msg_out: retrans priq=0x%x\n", 1830 sc->sc_msgpriq); 1831 } else { 1832 /* This is a continuation of the previous message. */ 1833 n = sc->sc_omp - sc->sc_omess; 1834 NCR_TRACE("msg_out: continuation, n=%d\n", n); 1835 goto nextbyte; 1836 } 1837 } 1838 1839 /* No messages transmitted so far. */ 1840 sc->sc_msgoutq = 0; 1841 1842 nextmsg: 1843 /* Pick up highest priority message. */ 1844 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq; 1845 sc->sc_msgpriq &= ~sc->sc_msgout; 1846 sc->sc_msgoutq |= sc->sc_msgout; 1847 1848 /* Build the outgoing message data. */ 1849 switch (sc->sc_msgout) { 1850 case SEND_IDENTIFY: 1851 NCR_TRACE("msg_out: SEND_IDENTIFY\n", 0); 1852 if (sr == NULL) { 1853 printf("%s: SEND_IDENTIFY while not connected; " 1854 "sending NOOP\n", 1855 device_xname(sc->sc_dev)); 1856 NCR_BREAK(); 1857 goto noop; 1858 } 1859 /* 1860 * The identify message we send determines whether 1861 * disconnect/reselect is allowed for this command. 1862 * 0xC0+LUN: allows it, 0x80+LUN disallows it. 1863 */ 1864 msg = 0xc0; /* MSG_IDENTIFY(0,1) */ 1865 if (sc->sc_no_disconnect & (1 << sr->sr_target)) 1866 msg = 0x80; 1867 if (sr->sr_flags & (SR_IMMED)) 1868 msg = 0x80; 1869 sc->sc_omess[0] = msg | sr->sr_lun; 1870 n = 1; 1871 break; 1872 1873 case SEND_DEV_RESET: 1874 NCR_TRACE("msg_out: SEND_DEV_RESET\n", 0); 1875 /* Expect disconnect after this! */ 1876 /* XXX: Kill jobs for this target? */ 1877 act_flags |= (ACT_DISCONNECT | ACT_CMD_DONE); 1878 sc->sc_omess[0] = MSG_BUS_DEV_RESET; 1879 n = 1; 1880 break; 1881 1882 case SEND_REJECT: 1883 NCR_TRACE("msg_out: SEND_REJECT\n", 0); 1884 sc->sc_omess[0] = MSG_MESSAGE_REJECT; 1885 n = 1; 1886 break; 1887 1888 case SEND_PARITY_ERROR: 1889 NCR_TRACE("msg_out: SEND_PARITY_ERROR\n", 0); 1890 sc->sc_omess[0] = MSG_PARITY_ERROR; 1891 n = 1; 1892 break; 1893 1894 case SEND_INIT_DET_ERR: 1895 NCR_TRACE("msg_out: SEND_INIT_DET_ERR\n", 0); 1896 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; 1897 n = 1; 1898 break; 1899 1900 case SEND_ABORT: 1901 NCR_TRACE("msg_out: SEND_ABORT\n", 0); 1902 /* Expect disconnect after this! */ 1903 /* XXX: Set error flag? */ 1904 act_flags |= (ACT_DISCONNECT | ACT_CMD_DONE); 1905 sc->sc_omess[0] = MSG_ABORT; 1906 n = 1; 1907 break; 1908 1909 case 0: 1910 printf("%s: unexpected MESSAGE OUT; sending NOOP\n", 1911 device_xname(sc->sc_dev)); 1912 NCR_BREAK(); 1913 noop: 1914 NCR_TRACE("msg_out: send NOOP\n", 0); 1915 sc->sc_omess[0] = MSG_NOOP; 1916 n = 1; 1917 break; 1918 1919 default: 1920 printf("%s: weird MESSAGE OUT; sending NOOP\n", 1921 device_xname(sc->sc_dev)); 1922 NCR_BREAK(); 1923 goto noop; 1924 } 1925 sc->sc_omp = &sc->sc_omess[n]; 1926 1927 nextbyte: 1928 /* Send message bytes. */ 1929 while (n > 0) { 1930 /* 1931 * Send a message byte. 1932 * First check BSY, REQ, phase... 1933 */ 1934 if (!SCI_BUSY(sc)) { 1935 NCR_TRACE("msg_out: lost BSY, n=%d\n", n); 1936 goto out; 1937 } 1938 if (ncr5380_wait_req(sc)) { 1939 NCR_TRACE("msg_out: no REQ, n=%d\n", n); 1940 goto out; 1941 } 1942 phase = SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr)); 1943 if (phase != PHASE_MSG_OUT) { 1944 /* 1945 * Target left MESSAGE OUT, possibly to reject 1946 * our message. 1947 */ 1948 NCR_TRACE("msg_out: new phase=%d\n", phase); 1949 goto out; 1950 } 1951 1952 /* Yes, we can send this message byte. */ 1953 --n; 1954 1955 /* Clear ATN before last byte if this is the last message. */ 1956 if (n == 0 && sc->sc_msgpriq == 0) { 1957 icmd &= ~SCI_ICMD_ATN; 1958 NCR5380_WRITE(sc, sci_icmd, icmd); 1959 /* 2 deskew delays */ 1960 delay(2); /* XXX */ 1961 } 1962 1963 /* Put data on the bus. */ 1964 NCR5380_WRITE(sc, sci_odata, *--sc->sc_omp); 1965 1966 /* Raise ACK to tell target data is on the bus. */ 1967 icmd |= SCI_ICMD_ACK; 1968 NCR5380_WRITE(sc, sci_icmd, icmd); 1969 1970 /* Wait for REQ to be negated. */ 1971 if (ncr5380_wait_not_req(sc)) { 1972 NCR_TRACE("msg_out: stuck REQ, n=%d\n", n); 1973 act_flags |= ACT_RESET_BUS; 1974 } 1975 1976 /* Finally, drop ACK. */ 1977 icmd &= ~SCI_ICMD_ACK; 1978 NCR5380_WRITE(sc, sci_icmd, icmd); 1979 1980 /* Stuck bus or something... */ 1981 if (act_flags & ACT_RESET_BUS) 1982 goto out; 1983 1984 } 1985 progress++; 1986 1987 /* We get here only if the entire message has been transmitted. */ 1988 if (sc->sc_msgpriq != 0) { 1989 /* There are more outgoing messages. */ 1990 goto nextmsg; 1991 } 1992 1993 /* 1994 * The last message has been transmitted. We need to remember the last 1995 * message transmitted (in case the target switches to MESSAGE IN phase 1996 * and sends a MESSAGE REJECT), and the list of messages transmitted 1997 * this time around (in case the target stays in MESSAGE OUT phase to 1998 * request a retransmit). 1999 */ 2000 2001 out: 2002 /* Stop driving the data bus. */ 2003 icmd &= ~SCI_ICMD_DATA; 2004 NCR5380_WRITE(sc, sci_icmd, icmd); 2005 2006 if (!progress) 2007 act_flags |= ACT_RESET_BUS; 2008 2009 return act_flags; 2010 } 2011 2012 2013 /* 2014 * Handle command phase. 2015 */ 2016 static int 2017 ncr5380_command(struct ncr5380_softc *sc) 2018 { 2019 struct sci_req *sr = sc->sc_current; 2020 struct scsipi_xfer *xs = sr->sr_xs; 2021 int len; 2022 2023 /* acknowledge phase change */ 2024 NCR5380_WRITE(sc, sci_tcmd, PHASE_COMMAND); 2025 2026 /* Assume command can be sent in one go. */ 2027 /* XXX: Do this using DMA, and get a phase change intr? */ 2028 len = ncr5380_pio_out(sc, PHASE_COMMAND, xs->cmdlen, 2029 (uint8_t *)xs->cmd); 2030 2031 if (len != xs->cmdlen) { 2032 #ifdef NCR5380_DEBUG 2033 printf("%s: short transfer: wanted %d got %d.\n", 2034 __func__, xs->cmdlen, len); 2035 ncr5380_show_scsi_cmd(xs); 2036 NCR_BREAK(); 2037 #endif 2038 if (len < 6) { 2039 xs->error = XS_DRIVER_STUFFUP; 2040 sc->sc_state |= NCR_ABORTING; 2041 ncr_sched_msgout(sc, SEND_ABORT); 2042 } 2043 2044 } 2045 2046 return ACT_CONTINUE; 2047 } 2048 2049 2050 /* 2051 * Handle either data_in or data_out 2052 */ 2053 static int 2054 ncr5380_data_xfer(struct ncr5380_softc *sc, int phase) 2055 { 2056 struct sci_req *sr = sc->sc_current; 2057 struct scsipi_xfer *xs = sr->sr_xs; 2058 int expected_phase; 2059 int len; 2060 2061 /* 2062 * When aborting a command, disallow any data phase. 2063 */ 2064 if (sc->sc_state & NCR_ABORTING) { 2065 printf("%s: aborting, but phase=%s (reset)\n", 2066 device_xname(sc->sc_dev), phase_names[phase & 7]); 2067 return ACT_RESET_BUS; /* XXX */ 2068 } 2069 2070 /* Validate expected phase (data_in or data_out) */ 2071 expected_phase = (xs->xs_control & XS_CTL_DATA_OUT) ? 2072 PHASE_DATA_OUT : PHASE_DATA_IN; 2073 if (phase != expected_phase) { 2074 printf("%s: data phase error\n", device_xname(sc->sc_dev)); 2075 goto abort; 2076 } 2077 2078 /* Make sure we have some data to move. */ 2079 if (sc->sc_datalen <= 0) { 2080 /* Device needs padding. */ 2081 if (phase == PHASE_DATA_IN) 2082 ncr5380_pio_in(sc, phase, 4096, NULL); 2083 else 2084 ncr5380_pio_out(sc, phase, 4096, NULL); 2085 /* Make sure that caused a phase change. */ 2086 if (SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr)) == phase) { 2087 /* More than 4k is just too much! */ 2088 printf("%s: too much data padding\n", 2089 device_xname(sc->sc_dev)); 2090 goto abort; 2091 } 2092 return ACT_CONTINUE; 2093 } 2094 2095 /* 2096 * Attempt DMA only if dma_alloc gave us a DMA handle AND 2097 * there is enough left to transfer so DMA is worth while. 2098 */ 2099 if (sr->sr_dma_hand && 2100 (sc->sc_datalen >= sc->sc_min_dma_len)) 2101 { 2102 /* 2103 * OK, really start DMA. Note, the MD start function 2104 * is responsible for setting the TCMD register, etc. 2105 * (Acknowledge the phase change there, not here.) 2106 */ 2107 NCR_TRACE("data_xfer: dma_start, dh=0x%x\n", 2108 (long) sr->sr_dma_hand); 2109 (*sc->sc_dma_start)(sc); 2110 return ACT_WAIT_DMA; 2111 } 2112 2113 /* 2114 * Doing PIO for data transfer. (Possibly "Pseudo DMA") 2115 * XXX: Do PDMA functions need to set tcmd later? 2116 */ 2117 NCR_TRACE("data_xfer: doing PIO, len=%d\n", sc->sc_datalen); 2118 /* acknowledge phase change */ 2119 NCR5380_WRITE(sc, sci_tcmd, phase); /* XXX: OK for PDMA? */ 2120 if (phase == PHASE_DATA_OUT) { 2121 len = (*sc->sc_pio_out)(sc, phase, sc->sc_datalen, 2122 sc->sc_dataptr); 2123 } else { 2124 len = (*sc->sc_pio_in)(sc, phase, sc->sc_datalen, 2125 sc->sc_dataptr); 2126 } 2127 sc->sc_dataptr += len; 2128 sc->sc_datalen -= len; 2129 2130 NCR_TRACE("data_xfer: did PIO, resid=%d\n", sc->sc_datalen); 2131 return ACT_CONTINUE; 2132 2133 abort: 2134 sc->sc_state |= NCR_ABORTING; 2135 ncr_sched_msgout(sc, SEND_ABORT); 2136 return ACT_CONTINUE; 2137 } 2138 2139 2140 static int 2141 ncr5380_status(struct ncr5380_softc *sc) 2142 { 2143 int len; 2144 uint8_t status; 2145 struct sci_req *sr = sc->sc_current; 2146 2147 /* acknowledge phase change */ 2148 NCR5380_WRITE(sc, sci_tcmd, PHASE_STATUS); 2149 2150 len = ncr5380_pio_in(sc, PHASE_STATUS, 1, &status); 2151 if (len) { 2152 sr->sr_status = status; 2153 } else { 2154 printf("%s: none?\n", __func__); 2155 } 2156 2157 return ACT_CONTINUE; 2158 } 2159 2160 2161 /* 2162 * This is the big state machine that follows SCSI phase changes. 2163 * This is somewhat like a co-routine. It will do a SCSI command, 2164 * and exit if the command is complete, or if it must wait, i.e. 2165 * for DMA to complete or for reselect to resume the job. 2166 * 2167 * The bus must be selected, and we need to know which command is 2168 * being undertaken. 2169 */ 2170 static void 2171 ncr5380_machine(struct ncr5380_softc *sc) 2172 { 2173 struct sci_req *sr; 2174 struct scsipi_xfer *xs; 2175 int act_flags, phase, timo; 2176 2177 #ifdef DIAGNOSTIC 2178 if (sc->sc_state == NCR_IDLE) 2179 panic("%s: state=idle", __func__); 2180 if (sc->sc_current == NULL) 2181 panic("%s: no current cmd", __func__); 2182 #endif 2183 2184 sr = sc->sc_current; 2185 xs = sr->sr_xs; 2186 act_flags = ACT_CONTINUE; 2187 2188 /* 2189 * This will be called by ncr5380_intr() when DMA is 2190 * complete. Must stop DMA before touching the 5380 or 2191 * there will be "register conflict" errors. 2192 */ 2193 if (sc->sc_state & NCR_DOINGDMA) { 2194 /* Pick-up where where we left off... */ 2195 goto dma_done; 2196 } 2197 2198 next_phase: 2199 2200 if (!SCI_BUSY(sc)) { 2201 /* Unexpected disconnect */ 2202 printf("%s: unexpected disconnect.\n", __func__); 2203 xs->error = XS_DRIVER_STUFFUP; 2204 act_flags |= (ACT_DISCONNECT | ACT_CMD_DONE); 2205 goto do_actions; 2206 } 2207 2208 /* 2209 * Wait for REQ before reading the phase. 2210 * Need to wait longer than usual here, because 2211 * some devices are just plain slow... 2212 */ 2213 timo = ncr5380_wait_phase_timo; 2214 for (;;) { 2215 if (NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_REQ) 2216 break; 2217 if (--timo <= 0) { 2218 if (sc->sc_state & NCR_ABORTING) { 2219 printf("%s: no REQ while aborting, reset\n", 2220 device_xname(sc->sc_dev)); 2221 act_flags |= ACT_RESET_BUS; 2222 goto do_actions; 2223 } 2224 printf("%s: no REQ for next phase, abort\n", 2225 device_xname(sc->sc_dev)); 2226 sc->sc_state |= NCR_ABORTING; 2227 ncr_sched_msgout(sc, SEND_ABORT); 2228 goto next_phase; 2229 } 2230 delay(100); 2231 } 2232 2233 phase = SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr)); 2234 NCR_TRACE("machine: phase=%s\n", 2235 (long) phase_names[phase & 7]); 2236 2237 /* 2238 * We assume that the device knows what it's doing, 2239 * so any phase is good. 2240 */ 2241 2242 #if 0 2243 /* 2244 * XXX: Do not ACK the phase yet! do it later... 2245 * XXX: ... each phase routine does that itself. 2246 * In particular, DMA needs it done LATER. 2247 */ 2248 NCR5380_WRITE(sc, sci_tcmd, phase); /* acknowledge phase change */ 2249 #endif 2250 2251 switch (phase) { 2252 2253 case PHASE_DATA_OUT: 2254 case PHASE_DATA_IN: 2255 act_flags = ncr5380_data_xfer(sc, phase); 2256 break; 2257 2258 case PHASE_COMMAND: 2259 act_flags = ncr5380_command(sc); 2260 break; 2261 2262 case PHASE_STATUS: 2263 act_flags = ncr5380_status(sc); 2264 break; 2265 2266 case PHASE_MSG_OUT: 2267 act_flags = ncr5380_msg_out(sc); 2268 break; 2269 2270 case PHASE_MSG_IN: 2271 act_flags = ncr5380_msg_in(sc); 2272 break; 2273 2274 default: 2275 printf("%s: Unexpected phase 0x%x\n", __func__, phase); 2276 sc->sc_state |= NCR_ABORTING; 2277 ncr_sched_msgout(sc, SEND_ABORT); 2278 goto next_phase; 2279 2280 } /* switch */ 2281 sc->sc_prevphase = phase; 2282 2283 do_actions: 2284 2285 if (act_flags & ACT_WAIT_DMA) { 2286 act_flags &= ~ACT_WAIT_DMA; 2287 /* Wait for DMA to complete (polling, or interrupt). */ 2288 if ((sr->sr_flags & SR_IMMED) == 0) { 2289 NCR_TRACE("machine: wait for DMA intr.\n", 0); 2290 return; /* will resume at dma_done */ 2291 } 2292 /* Busy-wait for it to finish. */ 2293 NCR_TRACE("machine: dma_poll, dh=0x%x\n", 2294 (long) sr->sr_dma_hand); 2295 (*sc->sc_dma_poll)(sc); 2296 dma_done: 2297 /* Return here after interrupt. */ 2298 if (sr->sr_flags & SR_OVERDUE) 2299 sc->sc_state |= NCR_ABORTING; 2300 NCR_TRACE("machine: dma_stop, dh=0x%x\n", 2301 (long) sr->sr_dma_hand); 2302 (*sc->sc_dma_stop)(sc); 2303 SCI_CLR_INTR(sc); /* XXX */ 2304 /* 2305 * While DMA is running we can not touch the SBC, 2306 * so various places just set NCR_ABORTING and 2307 * expect us the "kick it" when DMA is done. 2308 */ 2309 if (sc->sc_state & NCR_ABORTING) { 2310 ncr_sched_msgout(sc, SEND_ABORT); 2311 } 2312 } 2313 2314 /* 2315 * Check for parity error. 2316 * XXX - better place to check? 2317 */ 2318 if (NCR5380_READ(sc, sci_csr) & SCI_CSR_PERR) { 2319 printf("%s: parity error!\n", device_xname(sc->sc_dev)); 2320 /* XXX: sc->sc_state |= NCR_ABORTING; */ 2321 ncr_sched_msgout(sc, SEND_PARITY_ERROR); 2322 } 2323 2324 if (act_flags == ACT_CONTINUE) 2325 goto next_phase; 2326 /* All other actions "break" from the loop. */ 2327 2328 NCR_TRACE("machine: act_flags=0x%x\n", act_flags); 2329 2330 if (act_flags & ACT_RESET_BUS) { 2331 act_flags |= ACT_CMD_DONE; 2332 /* 2333 * Reset the SCSI bus, usually due to a timeout. 2334 * The error code XS_TIMEOUT allows retries. 2335 */ 2336 sc->sc_state |= NCR_ABORTING; 2337 printf("%s: reset SCSI bus for TID=%d LUN=%d\n", 2338 device_xname(sc->sc_dev), sr->sr_target, sr->sr_lun); 2339 ncr5380_reset_scsibus(sc); 2340 } 2341 2342 if (act_flags & ACT_CMD_DONE) { 2343 act_flags |= ACT_DISCONNECT; 2344 /* Need to call scsipi_done() */ 2345 /* XXX: from the aic6360 driver, but why? */ 2346 if (sc->sc_datalen < 0) { 2347 printf("%s: %d extra bytes from %d:%d\n", 2348 device_xname(sc->sc_dev), -sc->sc_datalen, 2349 sr->sr_target, sr->sr_lun); 2350 sc->sc_datalen = 0; 2351 } 2352 xs->resid = sc->sc_datalen; 2353 /* Note: this will clear sc_current */ 2354 NCR_TRACE("machine: call done, cur=0x%x\n", (long)sr); 2355 ncr5380_done(sc); 2356 } 2357 2358 if (act_flags & ACT_DISCONNECT) { 2359 /* 2360 * The device has dropped BSY (or will soon). 2361 * We have to wait here for BSY to drop, otherwise 2362 * the next command may decide we need a bus reset. 2363 */ 2364 timo = ncr5380_wait_req_timo; /* XXX */ 2365 for (;;) { 2366 if (!SCI_BUSY(sc)) 2367 goto busfree; 2368 if (--timo <= 0) 2369 break; 2370 delay(2); 2371 } 2372 /* Device is sitting on the bus! */ 2373 printf("%s: Target %d LUN %d stuck busy, resetting...\n", 2374 device_xname(sc->sc_dev), sr->sr_target, sr->sr_lun); 2375 ncr5380_reset_scsibus(sc); 2376 busfree: 2377 NCR_TRACE("machine: discon, waited %d\n", 2378 ncr5380_wait_req_timo - timo); 2379 2380 NCR5380_WRITE(sc, sci_icmd, 0); 2381 NCR5380_WRITE(sc, sci_mode, 0); 2382 NCR5380_WRITE(sc, sci_tcmd, PHASE_INVALID); 2383 NCR5380_WRITE(sc, sci_sel_enb, 0); 2384 SCI_CLR_INTR(sc); 2385 NCR5380_WRITE(sc, sci_sel_enb, 0x80); 2386 2387 if ((act_flags & ACT_CMD_DONE) == 0) { 2388 NCR_TRACE("machine: discon, cur=0x%x\n", (long)sr); 2389 } 2390 2391 /* 2392 * We may be here due to a disconnect message, 2393 * in which case we did NOT call ncr5380_done, 2394 * and we need to clear sc_current. 2395 */ 2396 sc->sc_state = NCR_IDLE; 2397 sc->sc_current = NULL; 2398 2399 /* Paranoia: clear everything. */ 2400 sc->sc_dataptr = NULL; 2401 sc->sc_datalen = 0; 2402 sc->sc_prevphase = PHASE_INVALID; 2403 sc->sc_msgpriq = 0; 2404 sc->sc_msgoutq = 0; 2405 sc->sc_msgout = 0; 2406 2407 /* Our caller will re-enable interrupts. */ 2408 } 2409 } 2410 2411 2412 #ifdef NCR5380_DEBUG 2413 2414 static void 2415 ncr5380_show_scsi_cmd(struct scsipi_xfer *xs) 2416 { 2417 uint8_t *b = (uint8_t *)xs->cmd; 2418 int i = 0; 2419 2420 scsipi_printaddr(xs->xs_periph); 2421 if ((xs->xs_control & XS_CTL_RESET) == 0) { 2422 while (i < xs->cmdlen) { 2423 if (i) 2424 printf(","); 2425 printf("%x",b[i++]); 2426 } 2427 printf("\n"); 2428 } else { 2429 printf("RESET\n"); 2430 } 2431 } 2432 2433 2434 int ncr5380_traceidx = 0; 2435 2436 #define TRACE_MAX 1024 2437 struct trace_ent { 2438 const char *msg; 2439 long val; 2440 } ncr5380_tracebuf[TRACE_MAX]; 2441 2442 void 2443 ncr5380_trace(const char *msg, long val) 2444 { 2445 struct trace_ent *tr; 2446 int s; 2447 2448 s = splbio(); 2449 2450 tr = &ncr5380_tracebuf[ncr5380_traceidx]; 2451 2452 ncr5380_traceidx++; 2453 if (ncr5380_traceidx >= TRACE_MAX) 2454 ncr5380_traceidx = 0; 2455 2456 tr->msg = msg; 2457 tr->val = val; 2458 2459 splx(s); 2460 } 2461 2462 #ifdef DDB 2463 void 2464 ncr5380_clear_trace(void) 2465 { 2466 2467 ncr5380_traceidx = 0; 2468 memset((char *)ncr5380_tracebuf, 0, sizeof(ncr5380_tracebuf)); 2469 } 2470 2471 void 2472 ncr5380_show_trace(void) 2473 { 2474 struct trace_ent *tr; 2475 int idx; 2476 2477 idx = ncr5380_traceidx; 2478 do { 2479 tr = &ncr5380_tracebuf[idx]; 2480 idx++; 2481 if (idx >= TRACE_MAX) 2482 idx = 0; 2483 if (tr->msg) 2484 db_printf(tr->msg, tr->val); 2485 } while (idx != ncr5380_traceidx); 2486 } 2487 2488 void 2489 ncr5380_show_req(struct sci_req *sr) 2490 { 2491 struct scsipi_xfer *xs = sr->sr_xs; 2492 2493 db_printf("TID=%d ", sr->sr_target); 2494 db_printf("LUN=%d ", sr->sr_lun); 2495 db_printf("dh=%p ", sr->sr_dma_hand); 2496 db_printf("dptr=%p ", sr->sr_dataptr); 2497 db_printf("dlen=0x%x ", sr->sr_datalen); 2498 db_printf("flags=%d ", sr->sr_flags); 2499 db_printf("stat=%d ", sr->sr_status); 2500 2501 if (xs == NULL) { 2502 db_printf("(xs=NULL)\n"); 2503 return; 2504 } 2505 db_printf("\n"); 2506 #ifdef SCSIPI_DEBUG 2507 show_scsipi_xs(xs); 2508 #else 2509 db_printf("xs=%p\n", xs); 2510 #endif 2511 } 2512 2513 void 2514 ncr5380_show_state(void) 2515 { 2516 struct ncr5380_softc *sc; 2517 struct sci_req *sr; 2518 int i, j, k; 2519 2520 sc = ncr5380_debug_sc; 2521 2522 if (sc == NULL) { 2523 db_printf("ncr5380_debug_sc == NULL\n"); 2524 return; 2525 } 2526 2527 db_printf("sc_ncmds=%d\n", sc->sc_ncmds); 2528 k = -1; /* which is current? */ 2529 for (i = 0; i < SCI_OPENINGS; i++) { 2530 sr = &sc->sc_ring[i]; 2531 if (sr->sr_xs) { 2532 if (sr == sc->sc_current) 2533 k = i; 2534 db_printf("req %d: (sr=%p)", i, sr); 2535 ncr5380_show_req(sr); 2536 } 2537 } 2538 db_printf("sc_rr=%d, current=%d\n", sc->sc_rr, k); 2539 2540 db_printf("Active request matrix:\n"); 2541 for(i = 0; i < 8; i++) { /* targets */ 2542 for (j = 0; j < 8; j++) { /* LUN */ 2543 sr = sc->sc_matrix[i][j]; 2544 if (sr) { 2545 db_printf("TID=%d LUN=%d sr=%p\n", i, j, sr); 2546 } 2547 } 2548 } 2549 2550 db_printf("sc_state=0x%x\n", sc->sc_state); 2551 db_printf("sc_current=%p\n", sc->sc_current); 2552 db_printf("sc_dataptr=%p\n", sc->sc_dataptr); 2553 db_printf("sc_datalen=0x%x\n", sc->sc_datalen); 2554 2555 db_printf("sc_prevphase=%d\n", sc->sc_prevphase); 2556 db_printf("sc_msgpriq=0x%x\n", sc->sc_msgpriq); 2557 } 2558 #endif /* DDB */ 2559 #endif /* NCR5380_DEBUG */ 2560 2561 void 2562 ncr5380_attach(struct ncr5380_softc *sc) 2563 { 2564 struct scsipi_adapter *adapt = &sc->sc_adapter; 2565 struct scsipi_channel *chan = &sc->sc_channel; 2566 2567 /* 2568 * Fill in the scsipi_adapter. 2569 */ 2570 adapt->adapt_request = ncr5380_scsipi_request; 2571 adapt->adapt_dev = sc->sc_dev; 2572 adapt->adapt_nchannels = 1; 2573 adapt->adapt_openings = SCI_OPENINGS; 2574 adapt->adapt_max_periph = 1; 2575 if (sc->sc_flags & NCR5380_FORCE_POLLING) 2576 adapt->adapt_flags |= SCSIPI_ADAPT_POLL_ONLY; 2577 /* adapt_minphys filled in by front-end */ 2578 2579 /* 2580 * Fill in the scsipi_channel. 2581 */ 2582 chan->chan_adapter = adapt; 2583 chan->chan_bustype = &scsi_bustype; 2584 chan->chan_channel = 0; 2585 chan->chan_ntargets = 8; 2586 chan->chan_nluns = 8; 2587 /* chan_id filled in by front-end */ 2588 2589 /* 2590 * Add reference to adapter so that we drop the reference after 2591 * config_found() to make sure the adapter is disabled. 2592 */ 2593 if (scsipi_adapter_addref(adapt) != 0) { 2594 aprint_error_dev(sc->sc_dev, "unable to enable controller\n"); 2595 return; 2596 } 2597 2598 ncr5380_init(sc); /* Init chip and driver */ 2599 ncr5380_reset_scsibus(sc); 2600 2601 /* 2602 * Ask the adapter what subunits are present 2603 */ 2604 (void)config_found(sc->sc_dev, chan, scsiprint, CFARGS_NONE); 2605 scsipi_adapter_delref(adapt); 2606 } 2607 2608 int 2609 ncr5380_detach(struct ncr5380_softc *sc, int flags) 2610 { 2611 2612 return EOPNOTSUPP; 2613 } 2614