| /llvm-project/llvm/test/MC/AArch64/SVE/ |
| H A D | msb.s | 12 msb z0.b, p7/m, z1.b, z31.b label
18 msb z0.h, p7/m, z1.h, z31.h label
24 msb z0.s, p7/m, z1.s, z31.s label
30 msb z0.d, p7/m, z1.d, z31.d label
46 msb z0.d, p7/m, z1.d, z31.d label
58 msb z0.d, p7/m, z1.d, z31.d label
|
| H A D | msb-diagnostics.s | 7 msb z0.h, p8/m, z1.h, z2.h label
16 msb z0.s, p7/m, z1.h, z2.h label
|
| /llvm-project/clang/test/CodeGenCXX/ |
| H A D | std-byte.cpp | 29 extern "C" void test1(::byte *b, ::my::byte *mb, ::my::std::byte *msb) { in test1()
|
| /llvm-project/flang/include/flang/Evaluate/ |
| H A D | real.h | 466 NextQuotientBit(Fraction & top,bool & msb,const Fraction & divisor) NextQuotientBit() argument
|
| /llvm-project/libc/src/math/generic/ |
| H A D | powf.cpp | 577 int msb = global() variable
|
| /llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelDAGToDAG.cpp | 263 uint64_t msb = N.getConstantOperandVal(1), lsb = N.getConstantOperandVal(2); selectShiftMask() local
|
| H A D | LoongArchISelLowering.cpp | 2203 uint64_t lsb, msb; performANDCombine() local
[all...] |
| /llvm-project/mlir/lib/Conversion/MathToSPIRV/ |
| H A D | MathToSPIRV.cpp | 219 Value msb = rewriter.create<spirv::GLFindUMsbOp>(loc, input); in matchAndRewrite() local
|
| /llvm-project/flang/lib/Evaluate/ |
| H A D | real.cpp | 231 bool msb{false}; in Divide() local
|
| /llvm-project/libc/src/__support/ |
| H A D | str_to_float.h | 255 uint32_t msb = global() variable
|
| /llvm-project/llvm/test/tools/llvm-mca/AArch64/A64FX/ |
| H A D | A64FX-sve-instructions.s | 1467 msb z0.b, p7/m, z1.b, z31.b label
1468 msb z0.d, p7/m, z1.d, z31.d label
1469 msb z0.h, p7/m, z1.h, z31.h label
1470 msb z0.s, p7/m, z1.s, z31.s label
|
| /llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 1725 return lsb | (msb << 5); in getBitfieldInvertedMaskOpValue() local
|
| /llvm-project/llvm/lib/Support/ |
| H A D | APInt.cpp | 2368 unsigned msb = llvm::Log2_64(parts[n]); tcMSB() local
|
| /llvm-project/llvm/test/tools/llvm-mca/AArch64/Neoverse/ |
| H A D | N2-sve-instructions.s | 1655 msb z0.b, p7/m, z1.b, z31.b label
1656 msb z0.d, p7/m, z1.d, z31.d label
1657 msb z0.h, p7/m, z1.h, z31.h label
1658 msb z0.s, p7/m, z1.s, z31.s label
|
| H A D | V2-sve-instructions.s | 1655 msb z0.b, p7/m, z1.b, z31.b label
1656 msb z0.d, p7/m, z1.d, z31.d label
1657 msb z0.h, p7/m, z1.h, z31.h label
1658 msb z0.s, p7/m, z1.s, z31.s label
[all...] |
| H A D | V1-sve-instructions.s | 1487 msb z0.d, p0/m, z0.d, z0.d label
|
| /llvm-project/llvm/test/tools/llvm-mca/AArch64/Cortex/ |
| H A D | A510-sve-instructions.s | 1655 msb z0.b, p7/m, z1.b, z31.b label
1656 msb z0.d, p7/m, z1.d, z31.d label
1657 msb z0.h, p7/m, z1.h, z31.h label
1658 msb z0.s, p7/m, z1.s, z31.s label
|
| /llvm-project/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 1843 unsigned msb = fieldFromInstruction(Val, 5, 5); DecodeBitfieldMaskOperand() local
|