1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2010-2015 Intel Corporation 3 */ 4 5 #ifndef _RTE_ETH_CTRL_H_ 6 #define _RTE_ETH_CTRL_H_ 7 8 #include <stdint.h> 9 #include <rte_common.h> 10 #include <rte_ether.h> 11 #include "rte_flow.h" 12 #include "rte_ethdev.h" 13 14 /** 15 * @deprecated Please use rte_flow API instead of this legacy one. 16 * @file 17 * 18 * Ethernet device features and related data structures used 19 * by control APIs should be defined in this file. 20 */ 21 22 /** 23 * Define all structures for ntuple Filter type. 24 */ 25 26 #define RTE_NTUPLE_FLAGS_DST_IP 0x0001 /**< If set, dst_ip is part of ntuple */ 27 #define RTE_NTUPLE_FLAGS_SRC_IP 0x0002 /**< If set, src_ip is part of ntuple */ 28 #define RTE_NTUPLE_FLAGS_DST_PORT 0x0004 /**< If set, dst_port is part of ntuple */ 29 #define RTE_NTUPLE_FLAGS_SRC_PORT 0x0008 /**< If set, src_port is part of ntuple */ 30 #define RTE_NTUPLE_FLAGS_PROTO 0x0010 /**< If set, protocol is part of ntuple */ 31 #define RTE_NTUPLE_FLAGS_TCP_FLAG 0x0020 /**< If set, tcp flag is involved */ 32 33 #define RTE_5TUPLE_FLAGS ( \ 34 RTE_NTUPLE_FLAGS_DST_IP | \ 35 RTE_NTUPLE_FLAGS_SRC_IP | \ 36 RTE_NTUPLE_FLAGS_DST_PORT | \ 37 RTE_NTUPLE_FLAGS_SRC_PORT | \ 38 RTE_NTUPLE_FLAGS_PROTO) 39 40 #define RTE_2TUPLE_FLAGS ( \ 41 RTE_NTUPLE_FLAGS_DST_PORT | \ 42 RTE_NTUPLE_FLAGS_PROTO) 43 44 #define RTE_NTUPLE_TCP_FLAGS_MASK 0x3F /**< TCP flags filter can match. */ 45 46 /** 47 * A structure used to define the ntuple filter entry 48 * to support RTE_ETH_FILTER_NTUPLE data representation. 49 */ 50 struct rte_eth_ntuple_filter { 51 uint16_t flags; /**< Flags from RTE_NTUPLE_FLAGS_* */ 52 uint32_t dst_ip; /**< Destination IP address in big endian. */ 53 uint32_t dst_ip_mask; /**< Mask of destination IP address. */ 54 uint32_t src_ip; /**< Source IP address in big endian. */ 55 uint32_t src_ip_mask; /**< Mask of destination IP address. */ 56 uint16_t dst_port; /**< Destination port in big endian. */ 57 uint16_t dst_port_mask; /**< Mask of destination port. */ 58 uint16_t src_port; /**< Source Port in big endian. */ 59 uint16_t src_port_mask; /**< Mask of source port. */ 60 uint8_t proto; /**< L4 protocol. */ 61 uint8_t proto_mask; /**< Mask of L4 protocol. */ 62 /** tcp_flags only meaningful when the proto is TCP. 63 The packet matched above ntuple fields and contain 64 any set bit in tcp_flags will hit this filter. */ 65 uint8_t tcp_flags; 66 uint16_t priority; /**< seven levels (001b-111b), 111b is highest, 67 used when more than one filter matches. */ 68 uint16_t queue; /**< Queue assigned to when match*/ 69 }; 70 71 #define RTE_ETH_FDIR_MAX_FLEXLEN 16 /**< Max length of flexbytes. */ 72 #define RTE_ETH_INSET_SIZE_MAX 128 /**< Max length of input set. */ 73 74 /** 75 * Input set fields for Flow Director and Hash filters 76 */ 77 enum rte_eth_input_set_field { 78 RTE_ETH_INPUT_SET_UNKNOWN = 0, 79 80 /* L2 */ 81 RTE_ETH_INPUT_SET_L2_SRC_MAC = 1, 82 RTE_ETH_INPUT_SET_L2_DST_MAC, 83 RTE_ETH_INPUT_SET_L2_OUTER_VLAN, 84 RTE_ETH_INPUT_SET_L2_INNER_VLAN, 85 RTE_ETH_INPUT_SET_L2_ETHERTYPE, 86 87 /* L3 */ 88 RTE_ETH_INPUT_SET_L3_SRC_IP4 = 129, 89 RTE_ETH_INPUT_SET_L3_DST_IP4, 90 RTE_ETH_INPUT_SET_L3_SRC_IP6, 91 RTE_ETH_INPUT_SET_L3_DST_IP6, 92 RTE_ETH_INPUT_SET_L3_IP4_TOS, 93 RTE_ETH_INPUT_SET_L3_IP4_PROTO, 94 RTE_ETH_INPUT_SET_L3_IP6_TC, 95 RTE_ETH_INPUT_SET_L3_IP6_NEXT_HEADER, 96 RTE_ETH_INPUT_SET_L3_IP4_TTL, 97 RTE_ETH_INPUT_SET_L3_IP6_HOP_LIMITS, 98 99 /* L4 */ 100 RTE_ETH_INPUT_SET_L4_UDP_SRC_PORT = 257, 101 RTE_ETH_INPUT_SET_L4_UDP_DST_PORT, 102 RTE_ETH_INPUT_SET_L4_TCP_SRC_PORT, 103 RTE_ETH_INPUT_SET_L4_TCP_DST_PORT, 104 RTE_ETH_INPUT_SET_L4_SCTP_SRC_PORT, 105 RTE_ETH_INPUT_SET_L4_SCTP_DST_PORT, 106 RTE_ETH_INPUT_SET_L4_SCTP_VERIFICATION_TAG, 107 108 /* Tunnel */ 109 RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_DST_MAC = 385, 110 RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_SRC_MAC, 111 RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_VLAN, 112 RTE_ETH_INPUT_SET_TUNNEL_L4_UDP_KEY, 113 RTE_ETH_INPUT_SET_TUNNEL_GRE_KEY, 114 115 /* Flexible Payload */ 116 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_1ST_WORD = 641, 117 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_2ND_WORD, 118 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_3RD_WORD, 119 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_4TH_WORD, 120 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_5TH_WORD, 121 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_6TH_WORD, 122 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_7TH_WORD, 123 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_8TH_WORD, 124 125 RTE_ETH_INPUT_SET_DEFAULT = 65533, 126 RTE_ETH_INPUT_SET_NONE = 65534, 127 RTE_ETH_INPUT_SET_MAX = 65535, 128 }; 129 130 /** 131 * Filters input set operations 132 */ 133 enum rte_filter_input_set_op { 134 RTE_ETH_INPUT_SET_OP_UNKNOWN, 135 RTE_ETH_INPUT_SET_SELECT, /**< select input set */ 136 RTE_ETH_INPUT_SET_ADD, /**< add input set entry */ 137 RTE_ETH_INPUT_SET_OP_MAX 138 }; 139 140 141 /** 142 * A structure used to define the input set configuration for 143 * flow director and hash filters 144 */ 145 struct rte_eth_input_set_conf { 146 uint16_t flow_type; 147 uint16_t inset_size; 148 enum rte_eth_input_set_field field[RTE_ETH_INSET_SIZE_MAX]; 149 enum rte_filter_input_set_op op; 150 }; 151 152 /** 153 * A structure used to define the input for L2 flow 154 */ 155 struct rte_eth_l2_flow { 156 uint16_t ether_type; /**< Ether type in big endian */ 157 }; 158 159 /** 160 * A structure used to define the input for IPV4 flow 161 */ 162 struct rte_eth_ipv4_flow { 163 uint32_t src_ip; /**< IPv4 source address in big endian. */ 164 uint32_t dst_ip; /**< IPv4 destination address in big endian. */ 165 uint8_t tos; /**< Type of service to match. */ 166 uint8_t ttl; /**< Time to live to match. */ 167 uint8_t proto; /**< Protocol, next header in big endian. */ 168 }; 169 170 /** 171 * A structure used to define the input for IPV4 UDP flow 172 */ 173 struct rte_eth_udpv4_flow { 174 struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */ 175 uint16_t src_port; /**< UDP source port in big endian. */ 176 uint16_t dst_port; /**< UDP destination port in big endian. */ 177 }; 178 179 /** 180 * A structure used to define the input for IPV4 TCP flow 181 */ 182 struct rte_eth_tcpv4_flow { 183 struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */ 184 uint16_t src_port; /**< TCP source port in big endian. */ 185 uint16_t dst_port; /**< TCP destination port in big endian. */ 186 }; 187 188 /** 189 * A structure used to define the input for IPV4 SCTP flow 190 */ 191 struct rte_eth_sctpv4_flow { 192 struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */ 193 uint16_t src_port; /**< SCTP source port in big endian. */ 194 uint16_t dst_port; /**< SCTP destination port in big endian. */ 195 uint32_t verify_tag; /**< Verify tag in big endian */ 196 }; 197 198 /** 199 * A structure used to define the input for IPV6 flow 200 */ 201 struct rte_eth_ipv6_flow { 202 uint32_t src_ip[4]; /**< IPv6 source address in big endian. */ 203 uint32_t dst_ip[4]; /**< IPv6 destination address in big endian. */ 204 uint8_t tc; /**< Traffic class to match. */ 205 uint8_t proto; /**< Protocol, next header to match. */ 206 uint8_t hop_limits; /**< Hop limits to match. */ 207 }; 208 209 /** 210 * A structure used to define the input for IPV6 UDP flow 211 */ 212 struct rte_eth_udpv6_flow { 213 struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */ 214 uint16_t src_port; /**< UDP source port in big endian. */ 215 uint16_t dst_port; /**< UDP destination port in big endian. */ 216 }; 217 218 /** 219 * A structure used to define the input for IPV6 TCP flow 220 */ 221 struct rte_eth_tcpv6_flow { 222 struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */ 223 uint16_t src_port; /**< TCP source port to in big endian. */ 224 uint16_t dst_port; /**< TCP destination port in big endian. */ 225 }; 226 227 /** 228 * A structure used to define the input for IPV6 SCTP flow 229 */ 230 struct rte_eth_sctpv6_flow { 231 struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */ 232 uint16_t src_port; /**< SCTP source port in big endian. */ 233 uint16_t dst_port; /**< SCTP destination port in big endian. */ 234 uint32_t verify_tag; /**< Verify tag in big endian. */ 235 }; 236 237 /** 238 * A structure used to define the input for MAC VLAN flow 239 */ 240 struct rte_eth_mac_vlan_flow { 241 struct rte_ether_addr mac_addr; /**< Mac address to match. */ 242 }; 243 244 /** 245 * Tunnel type for flow director. 246 */ 247 enum rte_eth_fdir_tunnel_type { 248 RTE_FDIR_TUNNEL_TYPE_UNKNOWN = 0, 249 RTE_FDIR_TUNNEL_TYPE_NVGRE, 250 RTE_FDIR_TUNNEL_TYPE_VXLAN, 251 }; 252 253 /** 254 * A structure used to define the input for tunnel flow, now it's VxLAN or 255 * NVGRE 256 */ 257 struct rte_eth_tunnel_flow { 258 enum rte_eth_fdir_tunnel_type tunnel_type; /**< Tunnel type to match. */ 259 /** Tunnel ID to match. TNI, VNI... in big endian. */ 260 uint32_t tunnel_id; 261 struct rte_ether_addr mac_addr; /**< Mac address to match. */ 262 }; 263 264 /** 265 * An union contains the inputs for all types of flow 266 * Items in flows need to be in big endian 267 */ 268 union rte_eth_fdir_flow { 269 struct rte_eth_l2_flow l2_flow; 270 struct rte_eth_udpv4_flow udp4_flow; 271 struct rte_eth_tcpv4_flow tcp4_flow; 272 struct rte_eth_sctpv4_flow sctp4_flow; 273 struct rte_eth_ipv4_flow ip4_flow; 274 struct rte_eth_udpv6_flow udp6_flow; 275 struct rte_eth_tcpv6_flow tcp6_flow; 276 struct rte_eth_sctpv6_flow sctp6_flow; 277 struct rte_eth_ipv6_flow ipv6_flow; 278 struct rte_eth_mac_vlan_flow mac_vlan_flow; 279 struct rte_eth_tunnel_flow tunnel_flow; 280 }; 281 282 /** 283 * A structure used to contain extend input of flow 284 */ 285 struct rte_eth_fdir_flow_ext { 286 uint16_t vlan_tci; 287 uint8_t flexbytes[RTE_ETH_FDIR_MAX_FLEXLEN]; 288 /**< It is filled by the flexible payload to match. */ 289 uint8_t is_vf; /**< 1 for VF, 0 for port dev */ 290 uint16_t dst_id; /**< VF ID, available when is_vf is 1*/ 291 }; 292 293 /** 294 * A structure used to define the input for a flow director filter entry 295 */ 296 struct rte_eth_fdir_input { 297 uint16_t flow_type; 298 union rte_eth_fdir_flow flow; 299 /**< Flow fields to match, dependent on flow_type */ 300 struct rte_eth_fdir_flow_ext flow_ext; 301 /**< Additional fields to match */ 302 }; 303 304 /** 305 * Behavior will be taken if FDIR match 306 */ 307 enum rte_eth_fdir_behavior { 308 RTE_ETH_FDIR_ACCEPT = 0, 309 RTE_ETH_FDIR_REJECT, 310 RTE_ETH_FDIR_PASSTHRU, 311 }; 312 313 /** 314 * Flow director report status 315 * It defines what will be reported if FDIR entry is matched. 316 */ 317 enum rte_eth_fdir_status { 318 RTE_ETH_FDIR_NO_REPORT_STATUS = 0, /**< Report nothing. */ 319 RTE_ETH_FDIR_REPORT_ID, /**< Only report FD ID. */ 320 RTE_ETH_FDIR_REPORT_ID_FLEX_4, /**< Report FD ID and 4 flex bytes. */ 321 RTE_ETH_FDIR_REPORT_FLEX_8, /**< Report 8 flex bytes. */ 322 }; 323 324 /** 325 * A structure used to define an action when match FDIR packet filter. 326 */ 327 struct rte_eth_fdir_action { 328 uint16_t rx_queue; /**< Queue assigned to if FDIR match. */ 329 enum rte_eth_fdir_behavior behavior; /**< Behavior will be taken */ 330 enum rte_eth_fdir_status report_status; /**< Status report option */ 331 uint8_t flex_off; 332 /**< If report_status is RTE_ETH_FDIR_REPORT_ID_FLEX_4 or 333 RTE_ETH_FDIR_REPORT_FLEX_8, flex_off specifies where the reported 334 flex bytes start from in flexible payload. */ 335 }; 336 337 /** 338 * A structure used to define the flow director filter entry. 339 */ 340 struct rte_eth_fdir_filter { 341 uint32_t soft_id; 342 /**< ID, an unique value is required when deal with FDIR entry */ 343 struct rte_eth_fdir_input input; /**< Input set */ 344 struct rte_eth_fdir_action action; /**< Action taken when match */ 345 }; 346 347 /** 348 * A structure used to configure FDIR masks that are used by the device 349 * to match the various fields of Rx packet headers. 350 */ 351 struct rte_eth_fdir_masks { 352 uint16_t vlan_tci_mask; /**< Bit mask for vlan_tci in big endian */ 353 /** Bit mask for ipv4 flow in big endian. */ 354 struct rte_eth_ipv4_flow ipv4_mask; 355 /** Bit mask for ipv6 flow in big endian. */ 356 struct rte_eth_ipv6_flow ipv6_mask; 357 /** Bit mask for L4 source port in big endian. */ 358 uint16_t src_port_mask; 359 /** Bit mask for L4 destination port in big endian. */ 360 uint16_t dst_port_mask; 361 /** 6 bit mask for proper 6 bytes of Mac address, bit 0 matches the 362 first byte on the wire */ 363 uint8_t mac_addr_byte_mask; 364 /** Bit mask for tunnel ID in big endian. */ 365 uint32_t tunnel_id_mask; 366 uint8_t tunnel_type_mask; /**< 1 - Match tunnel type, 367 0 - Ignore tunnel type. */ 368 }; 369 370 /** 371 * Payload type 372 */ 373 enum rte_eth_payload_type { 374 RTE_ETH_PAYLOAD_UNKNOWN = 0, 375 RTE_ETH_RAW_PAYLOAD, 376 RTE_ETH_L2_PAYLOAD, 377 RTE_ETH_L3_PAYLOAD, 378 RTE_ETH_L4_PAYLOAD, 379 RTE_ETH_PAYLOAD_MAX = 8, 380 }; 381 382 /** 383 * A structure used to select bytes extracted from the protocol layers to 384 * flexible payload for filter 385 */ 386 struct rte_eth_flex_payload_cfg { 387 enum rte_eth_payload_type type; /**< Payload type */ 388 uint16_t src_offset[RTE_ETH_FDIR_MAX_FLEXLEN]; 389 /**< Offset in bytes from the beginning of packet's payload 390 src_offset[i] indicates the flexbyte i's offset in original 391 packet payload. This value should be less than 392 flex_payload_limit in struct rte_eth_fdir_info.*/ 393 }; 394 395 /** 396 * A structure used to define FDIR masks for flexible payload 397 * for each flow type 398 */ 399 struct rte_eth_fdir_flex_mask { 400 uint16_t flow_type; 401 uint8_t mask[RTE_ETH_FDIR_MAX_FLEXLEN]; 402 /**< Mask for the whole flexible payload */ 403 }; 404 405 /** 406 * A structure used to define all flexible payload related setting 407 * include flex payload and flex mask 408 */ 409 struct rte_eth_fdir_flex_conf { 410 uint16_t nb_payloads; /**< The number of following payload cfg */ 411 uint16_t nb_flexmasks; /**< The number of following mask */ 412 struct rte_eth_flex_payload_cfg flex_set[RTE_ETH_PAYLOAD_MAX]; 413 /**< Flex payload configuration for each payload type */ 414 struct rte_eth_fdir_flex_mask flex_mask[RTE_ETH_FLOW_MAX]; 415 /**< Flex mask configuration for each flow type */ 416 }; 417 418 /** 419 * Flow Director setting modes: none, signature or perfect. 420 */ 421 enum rte_fdir_mode { 422 RTE_FDIR_MODE_NONE = 0, /**< Disable FDIR support. */ 423 RTE_FDIR_MODE_SIGNATURE, /**< Enable FDIR signature filter mode. */ 424 RTE_FDIR_MODE_PERFECT, /**< Enable FDIR perfect filter mode. */ 425 RTE_FDIR_MODE_PERFECT_MAC_VLAN, /**< Enable FDIR filter mode - MAC VLAN. */ 426 RTE_FDIR_MODE_PERFECT_TUNNEL, /**< Enable FDIR filter mode - tunnel. */ 427 }; 428 429 #define UINT64_BIT (CHAR_BIT * sizeof(uint64_t)) 430 #define RTE_FLOW_MASK_ARRAY_SIZE \ 431 (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT64_BIT)/UINT64_BIT) 432 433 /** 434 * A structure used to get the information of flow director filter. 435 * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_INFO operation. 436 * It includes the mode, flexible payload configuration information, 437 * capabilities and supported flow types, flexible payload characters. 438 * It can be gotten to help taking specific configurations per device. 439 */ 440 struct rte_eth_fdir_info { 441 enum rte_fdir_mode mode; /**< Flow director mode */ 442 struct rte_eth_fdir_masks mask; 443 /** Flex payload configuration information */ 444 struct rte_eth_fdir_flex_conf flex_conf; 445 uint32_t guarant_spc; /**< Guaranteed spaces.*/ 446 uint32_t best_spc; /**< Best effort spaces.*/ 447 /** Bit mask for every supported flow type. */ 448 uint64_t flow_types_mask[RTE_FLOW_MASK_ARRAY_SIZE]; 449 uint32_t max_flexpayload; /**< Total flex payload in bytes. */ 450 /** Flexible payload unit in bytes. Size and alignments of all flex 451 payload segments should be multiplies of this value. */ 452 uint32_t flex_payload_unit; 453 /** Max number of flexible payload continuous segments. 454 Each segment should be a multiple of flex_payload_unit.*/ 455 uint32_t max_flex_payload_segment_num; 456 /** Maximum src_offset in bytes allowed. It indicates that 457 src_offset[i] in struct rte_eth_flex_payload_cfg should be less 458 than this value. */ 459 uint16_t flex_payload_limit; 460 /** Flex bitmask unit in bytes. Size of flex bitmasks should be a 461 multiply of this value. */ 462 uint32_t flex_bitmask_unit; 463 /** Max supported size of flex bitmasks in flex_bitmask_unit */ 464 uint32_t max_flex_bitmask_num; 465 }; 466 467 /** 468 * A structure used to define the statistics of flow director. 469 * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_STATS operation. 470 */ 471 struct rte_eth_fdir_stats { 472 uint32_t collision; /**< Number of filters with collision. */ 473 uint32_t free; /**< Number of free filters. */ 474 uint32_t maxhash; 475 /**< The lookup hash value of the added filter that updated the value 476 of the MAXLEN field */ 477 uint32_t maxlen; /**< Longest linked list of filters. */ 478 uint64_t add; /**< Number of added filters. */ 479 uint64_t remove; /**< Number of removed filters. */ 480 uint64_t f_add; /**< Number of failed added filters. */ 481 uint64_t f_remove; /**< Number of failed removed filters. */ 482 uint32_t guarant_cnt; /**< Number of filters in guaranteed spaces. */ 483 uint32_t best_cnt; /**< Number of filters in best effort spaces. */ 484 }; 485 486 #endif /* _RTE_ETH_CTRL_H_ */ 487