xref: /netbsd-src/external/gpl3/gcc/dist/gcc/config/loongarch/loongarch-def.c (revision b1e838363e3c6fc78a55519254d99869742dd33c)
1 /* LoongArch static properties.
2    Copyright (C) 2021-2022 Free Software Foundation, Inc.
3    Contributed by Loongson Ltd.
4 
5 This file is part of GCC.
6 
7 GCC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
10 any later version.
11 
12 GCC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15 GNU General Public License for more details.
16 
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3.  If not see
19 <http://www.gnu.org/licenses/>.  */
20 
21 #include "loongarch-def.h"
22 #include "loongarch-str.h"
23 
24 /* Default RTX cost initializer.  */
25 #define COSTS_N_INSNS(N) ((N) * 4)
26 #define DEFAULT_COSTS				\
27     .fp_add		= COSTS_N_INSNS (1),	\
28     .fp_mult_sf		= COSTS_N_INSNS (2),	\
29     .fp_mult_df		= COSTS_N_INSNS (4),	\
30     .fp_div_sf		= COSTS_N_INSNS (6),	\
31     .fp_div_df		= COSTS_N_INSNS (8),	\
32     .int_mult_si	= COSTS_N_INSNS (1),	\
33     .int_mult_di	= COSTS_N_INSNS (1),	\
34     .int_div_si		= COSTS_N_INSNS (4),	\
35     .int_div_di		= COSTS_N_INSNS (6),	\
36     .branch_cost	= 2,			\
37     .memory_latency	= 4
38 
39 /* CPU property tables.  */
40 const char*
41 loongarch_cpu_strings[N_TUNE_TYPES] = {
42   [CPU_NATIVE]		  = STR_CPU_NATIVE,
43   [CPU_LOONGARCH64]	  = STR_CPU_LOONGARCH64,
44   [CPU_LA464]		  = STR_CPU_LA464,
45 };
46 
47 struct loongarch_isa
48 loongarch_cpu_default_isa[N_ARCH_TYPES] = {
49   [CPU_LOONGARCH64] = {
50       .base = ISA_BASE_LA64V100,
51       .fpu = ISA_EXT_FPU64,
52   },
53   [CPU_LA464] = {
54       .base = ISA_BASE_LA64V100,
55       .fpu = ISA_EXT_FPU64,
56   },
57 };
58 
59 struct loongarch_cache
60 loongarch_cpu_cache[N_TUNE_TYPES] = {
61   [CPU_LOONGARCH64] = {
62       .l1d_line_size = 64,
63       .l1d_size = 64,
64       .l2d_size = 256,
65   },
66   [CPU_LA464] = {
67       .l1d_line_size = 64,
68       .l1d_size = 64,
69       .l2d_size = 256,
70   },
71 };
72 
73 /* The following properties cannot be looked up directly using "cpucfg".
74  So it is necessary to provide a default value for "unknown native"
75  tune targets (i.e. -mtune=native while PRID does not correspond to
76  any known "-mtune" type).  */
77 
78 struct loongarch_rtx_cost_data
79 loongarch_cpu_rtx_cost_data[N_TUNE_TYPES] = {
80   [CPU_NATIVE] = {
81       DEFAULT_COSTS
82   },
83   [CPU_LOONGARCH64] = {
84       DEFAULT_COSTS
85   },
86   [CPU_LA464] = {
87       DEFAULT_COSTS
88   },
89 };
90 
91 /* RTX costs to use when optimizing for size.  */
92 extern const struct loongarch_rtx_cost_data
93 loongarch_rtx_cost_optimize_size = {
94     .fp_add	      = 4,
95     .fp_mult_sf	      = 4,
96     .fp_mult_df	      = 4,
97     .fp_div_sf	      = 4,
98     .fp_div_df	      = 4,
99     .int_mult_si      = 4,
100     .int_mult_di      = 4,
101     .int_div_si	      = 4,
102     .int_div_di	      = 4,
103     .branch_cost      = 2,
104     .memory_latency   = 4,
105 };
106 
107 int
108 loongarch_cpu_issue_rate[N_TUNE_TYPES] = {
109   [CPU_NATIVE]	      = 4,
110   [CPU_LOONGARCH64]   = 4,
111   [CPU_LA464]	      = 4,
112 };
113 
114 int
115 loongarch_cpu_multipass_dfa_lookahead[N_TUNE_TYPES] = {
116   [CPU_NATIVE]	      = 4,
117   [CPU_LOONGARCH64]   = 4,
118   [CPU_LA464]	      = 4,
119 };
120 
121 /* Wiring string definitions from loongarch-str.h to global arrays
122    with standard index values from loongarch-opts.h, so we can
123    print config-related messages and do ABI self-spec filtering
124    from the driver in a self-consistent manner.  */
125 
126 const char*
127 loongarch_isa_base_strings[N_ISA_BASE_TYPES] = {
128   [ISA_BASE_LA64V100] = STR_ISA_BASE_LA64V100,
129 };
130 
131 const char*
132 loongarch_isa_ext_strings[N_ISA_EXT_TYPES] = {
133   [ISA_EXT_FPU64] = STR_ISA_EXT_FPU64,
134   [ISA_EXT_FPU32] = STR_ISA_EXT_FPU32,
135   [ISA_EXT_NOFPU] = STR_ISA_EXT_NOFPU,
136 };
137 
138 const char*
139 loongarch_abi_base_strings[N_ABI_BASE_TYPES] = {
140   [ABI_BASE_LP64D] = STR_ABI_BASE_LP64D,
141   [ABI_BASE_LP64F] = STR_ABI_BASE_LP64F,
142   [ABI_BASE_LP64S] = STR_ABI_BASE_LP64S,
143 };
144 
145 const char*
146 loongarch_abi_ext_strings[N_ABI_EXT_TYPES] = {
147   [ABI_EXT_BASE] = STR_ABI_EXT_BASE,
148 };
149 
150 const char*
151 loongarch_cmodel_strings[] = {
152   [CMODEL_NORMAL]	  = STR_CMODEL_NORMAL,
153   [CMODEL_TINY]		  = STR_CMODEL_TINY,
154   [CMODEL_TINY_STATIC]	  = STR_CMODEL_TS,
155   [CMODEL_LARGE]	  = STR_CMODEL_LARGE,
156   [CMODEL_EXTREME]	  = STR_CMODEL_EXTREME,
157 };
158 
159 const char*
160 loongarch_switch_strings[] = {
161   [SW_SOFT_FLOAT]	  = OPTSTR_SOFT_FLOAT,
162   [SW_SINGLE_FLOAT]	  = OPTSTR_SINGLE_FLOAT,
163   [SW_DOUBLE_FLOAT]	  = OPTSTR_DOUBLE_FLOAT,
164 };
165 
166 
167 /* ABI-related definitions.  */
168 const struct loongarch_isa
169 abi_minimal_isa[N_ABI_BASE_TYPES][N_ABI_EXT_TYPES] = {
170   [ABI_BASE_LP64D] = {
171       [ABI_EXT_BASE] = {.base = ISA_BASE_LA64V100, .fpu = ISA_EXT_FPU64},
172   },
173   [ABI_BASE_LP64F] = {
174       [ABI_EXT_BASE] = {.base = ISA_BASE_LA64V100, .fpu = ISA_EXT_FPU32},
175   },
176   [ABI_BASE_LP64S] = {
177       [ABI_EXT_BASE] = {.base = ISA_BASE_LA64V100, .fpu = ISA_EXT_NOFPU},
178   },
179 };
180