1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
3 */
4
5 #ifndef __CN9K_RX_H__
6 #define __CN9K_RX_H__
7
8 #include <rte_ether.h>
9 #include <rte_vect.h>
10
11 #include <cnxk_ethdev.h>
12
13 #define NIX_RX_OFFLOAD_NONE (0)
14 #define NIX_RX_OFFLOAD_RSS_F BIT(0)
15 #define NIX_RX_OFFLOAD_PTYPE_F BIT(1)
16 #define NIX_RX_OFFLOAD_CHECKSUM_F BIT(2)
17 #define NIX_RX_OFFLOAD_MARK_UPDATE_F BIT(3)
18 #define NIX_RX_OFFLOAD_TSTAMP_F BIT(4)
19 #define NIX_RX_OFFLOAD_VLAN_STRIP_F BIT(5)
20 #define NIX_RX_OFFLOAD_SECURITY_F BIT(6)
21 #define NIX_RX_OFFLOAD_MAX (NIX_RX_OFFLOAD_SECURITY_F << 1)
22
23 /* Flags to control cqe_to_mbuf conversion function.
24 * Defining it from backwards to denote its been
25 * not used as offload flags to pick function
26 */
27 #define NIX_RX_MULTI_SEG_F BIT(14)
28
29 #define CNXK_NIX_CQ_ENTRY_SZ 128
30 #define NIX_DESCS_PER_LOOP 4
31 #define CQE_CAST(x) ((struct nix_cqe_hdr_s *)(x))
32 #define CQE_SZ(x) ((x) * CNXK_NIX_CQ_ENTRY_SZ)
33
34 #define IPSEC_SQ_LO_IDX 4
35 #define IPSEC_SQ_HI_IDX 8
36
37 union mbuf_initializer {
38 struct {
39 uint16_t data_off;
40 uint16_t refcnt;
41 uint16_t nb_segs;
42 uint16_t port;
43 } fields;
44 uint64_t value;
45 };
46
47 static __rte_always_inline uint64_t
nix_clear_data_off(uint64_t oldval)48 nix_clear_data_off(uint64_t oldval)
49 {
50 union mbuf_initializer mbuf_init = {.value = oldval};
51
52 mbuf_init.fields.data_off = 0;
53 return mbuf_init.value;
54 }
55
56 static __rte_always_inline struct rte_mbuf *
nix_get_mbuf_from_cqe(void * cq,const uint64_t data_off)57 nix_get_mbuf_from_cqe(void *cq, const uint64_t data_off)
58 {
59 rte_iova_t buff;
60
61 /* Skip CQE, NIX_RX_PARSE_S and SG HDR(9 DWORDs) and peek buff addr */
62 buff = *((rte_iova_t *)((uint64_t *)cq + 9));
63 return (struct rte_mbuf *)(buff - data_off);
64 }
65
66 static __rte_always_inline uint32_t
nix_ptype_get(const void * const lookup_mem,const uint64_t in)67 nix_ptype_get(const void *const lookup_mem, const uint64_t in)
68 {
69 const uint16_t *const ptype = lookup_mem;
70 const uint16_t lh_lg_lf = (in & 0xFFF0000000000000) >> 52;
71 const uint16_t tu_l2 = ptype[(in & 0x000FFFF000000000) >> 36];
72 const uint16_t il4_tu = ptype[PTYPE_NON_TUNNEL_ARRAY_SZ + lh_lg_lf];
73
74 return (il4_tu << PTYPE_NON_TUNNEL_WIDTH) | tu_l2;
75 }
76
77 static __rte_always_inline uint32_t
nix_rx_olflags_get(const void * const lookup_mem,const uint64_t in)78 nix_rx_olflags_get(const void *const lookup_mem, const uint64_t in)
79 {
80 const uint32_t *const ol_flags =
81 (const uint32_t *)((const uint8_t *)lookup_mem +
82 PTYPE_ARRAY_SZ);
83
84 return ol_flags[(in & 0xfff00000) >> 20];
85 }
86
87 static inline uint64_t
nix_update_match_id(const uint16_t match_id,uint64_t ol_flags,struct rte_mbuf * mbuf)88 nix_update_match_id(const uint16_t match_id, uint64_t ol_flags,
89 struct rte_mbuf *mbuf)
90 {
91 /* There is no separate bit to check match_id
92 * is valid or not? and no flag to identify it is an
93 * RTE_FLOW_ACTION_TYPE_FLAG vs RTE_FLOW_ACTION_TYPE_MARK
94 * action. The former case addressed through 0 being invalid
95 * value and inc/dec match_id pair when MARK is activated.
96 * The later case addressed through defining
97 * CNXK_FLOW_MARK_DEFAULT as value for
98 * RTE_FLOW_ACTION_TYPE_MARK.
99 * This would translate to not use
100 * CNXK_FLOW_ACTION_FLAG_DEFAULT - 1 and
101 * CNXK_FLOW_ACTION_FLAG_DEFAULT for match_id.
102 * i.e valid mark_id's are from
103 * 0 to CNXK_FLOW_ACTION_FLAG_DEFAULT - 2
104 */
105 if (likely(match_id)) {
106 ol_flags |= RTE_MBUF_F_RX_FDIR;
107 if (match_id != CNXK_FLOW_ACTION_FLAG_DEFAULT) {
108 ol_flags |= RTE_MBUF_F_RX_FDIR_ID;
109 mbuf->hash.fdir.hi = match_id - 1;
110 }
111 }
112
113 return ol_flags;
114 }
115
116 static __rte_always_inline void
nix_cqe_xtract_mseg(const union nix_rx_parse_u * rx,struct rte_mbuf * mbuf,uint64_t rearm,const uint16_t flags)117 nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf,
118 uint64_t rearm, const uint16_t flags)
119 {
120 const rte_iova_t *iova_list;
121 struct rte_mbuf *head;
122 const rte_iova_t *eol;
123 uint8_t nb_segs;
124 uint64_t sg;
125
126 sg = *(const uint64_t *)(rx + 1);
127 nb_segs = (sg >> 48) & 0x3;
128
129 if (nb_segs == 1) {
130 mbuf->next = NULL;
131 return;
132 }
133
134 mbuf->pkt_len = (rx->pkt_lenm1 + 1) - (flags & NIX_RX_OFFLOAD_TSTAMP_F ?
135 CNXK_NIX_TIMESYNC_RX_OFFSET : 0);
136 mbuf->data_len = (sg & 0xFFFF) - (flags & NIX_RX_OFFLOAD_TSTAMP_F ?
137 CNXK_NIX_TIMESYNC_RX_OFFSET : 0);
138 mbuf->nb_segs = nb_segs;
139 sg = sg >> 16;
140
141 eol = ((const rte_iova_t *)(rx + 1) +
142 ((rx->cn9k.desc_sizem1 + 1) << 1));
143 /* Skip SG_S and first IOVA*/
144 iova_list = ((const rte_iova_t *)(rx + 1)) + 2;
145 nb_segs--;
146
147 rearm = rearm & ~0xFFFF;
148
149 head = mbuf;
150 while (nb_segs) {
151 mbuf->next = ((struct rte_mbuf *)*iova_list) - 1;
152 mbuf = mbuf->next;
153
154 RTE_MEMPOOL_CHECK_COOKIES(mbuf->pool, (void **)&mbuf, 1, 1);
155
156 mbuf->data_len = sg & 0xFFFF;
157 sg = sg >> 16;
158 *(uint64_t *)(&mbuf->rearm_data) = rearm;
159 nb_segs--;
160 iova_list++;
161
162 if (!nb_segs && (iova_list + 1 < eol)) {
163 sg = *(const uint64_t *)(iova_list);
164 nb_segs = (sg >> 48) & 0x3;
165 head->nb_segs += nb_segs;
166 iova_list = (const rte_iova_t *)(iova_list + 1);
167 }
168 }
169 mbuf->next = NULL;
170 }
171
172 static inline int
ipsec_antireplay_check(struct roc_ie_on_inb_sa * sa,struct cn9k_inb_priv_data * priv,uintptr_t data,uint32_t win_sz)173 ipsec_antireplay_check(struct roc_ie_on_inb_sa *sa,
174 struct cn9k_inb_priv_data *priv, uintptr_t data,
175 uint32_t win_sz)
176 {
177 struct cnxk_on_ipsec_ar *ar = &priv->ar;
178 uint64_t seq_in_sa;
179 uint32_t seqh = 0;
180 uint32_t seql;
181 uint64_t seq;
182 uint8_t esn;
183 int rc;
184
185 esn = sa->common_sa.ctl.esn_en;
186 seql = rte_be_to_cpu_32(*((uint32_t *)(data + IPSEC_SQ_LO_IDX)));
187
188 if (!esn) {
189 seq = (uint64_t)seql;
190 } else {
191 seqh = rte_be_to_cpu_32(*((uint32_t *)(data +
192 IPSEC_SQ_HI_IDX)));
193 seq = ((uint64_t)seqh << 32) | seql;
194 }
195
196 if (unlikely(seq == 0))
197 return -1;
198
199 rte_spinlock_lock(&ar->lock);
200 rc = cnxk_on_anti_replay_check(seq, ar, win_sz);
201 if (esn && !rc) {
202 seq_in_sa = ((uint64_t)rte_be_to_cpu_32(sa->common_sa.seq_t.th)
203 << 32) |
204 rte_be_to_cpu_32(sa->common_sa.seq_t.tl);
205 if (seq > seq_in_sa) {
206 sa->common_sa.seq_t.tl = rte_cpu_to_be_32(seql);
207 sa->common_sa.seq_t.th = rte_cpu_to_be_32(seqh);
208 }
209 }
210 rte_spinlock_unlock(&ar->lock);
211
212 return rc;
213 }
214
215 static inline uint64_t
nix_rx_sec_mbuf_err_update(const union nix_rx_parse_u * rx,uint16_t res,uint64_t * rearm_val,uint16_t * len)216 nix_rx_sec_mbuf_err_update(const union nix_rx_parse_u *rx, uint16_t res,
217 uint64_t *rearm_val, uint16_t *len)
218 {
219 uint8_t uc_cc = res >> 8;
220 uint8_t cc = res & 0xFF;
221 uint64_t data_off;
222 uint64_t ol_flags;
223 uint16_t m_len;
224
225 if (unlikely(cc != CPT_COMP_GOOD))
226 return RTE_MBUF_F_RX_SEC_OFFLOAD |
227 RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED;
228
229 data_off = *rearm_val & (BIT_ULL(16) - 1);
230 m_len = rx->cn9k.pkt_lenm1 + 1;
231
232 switch (uc_cc) {
233 case ROC_IE_ON_UCC_IP_PAYLOAD_TYPE_ERR:
234 case ROC_IE_ON_UCC_AUTH_ERR:
235 case ROC_IE_ON_UCC_PADDING_INVALID:
236 /* Adjust data offset to start at copied L2 */
237 data_off += ROC_ONF_IPSEC_INB_SPI_SEQ_SZ +
238 ROC_ONF_IPSEC_INB_MAX_L2_SZ;
239 ol_flags = RTE_MBUF_F_RX_SEC_OFFLOAD |
240 RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED;
241 break;
242 case ROC_IE_ON_UCC_CTX_INVALID:
243 case ROC_IE_ON_UCC_SPI_MISMATCH:
244 case ROC_IE_ON_UCC_SA_MISMATCH:
245 /* Return as normal packet */
246 ol_flags = 0;
247 break;
248 default:
249 /* Return as error packet after updating packet lengths */
250 ol_flags = RTE_MBUF_F_RX_SEC_OFFLOAD |
251 RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED;
252 break;
253 }
254
255 *len = m_len;
256 *rearm_val = *rearm_val & ~(BIT_ULL(16) - 1);
257 *rearm_val |= data_off;
258 return ol_flags;
259 }
260
261 static __rte_always_inline uint64_t
nix_rx_sec_mbuf_update(const struct nix_cqe_hdr_s * cq,struct rte_mbuf * m,uintptr_t sa_base,uint64_t * rearm_val,uint16_t * len,uint32_t packet_type)262 nix_rx_sec_mbuf_update(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *m, uintptr_t sa_base,
263 uint64_t *rearm_val, uint16_t *len, uint32_t packet_type)
264 {
265 uintptr_t res_sg0 = ((uintptr_t)cq + ROC_ONF_IPSEC_INB_RES_OFF - 8);
266 const union nix_rx_parse_u *rx =
267 (const union nix_rx_parse_u *)((const uint64_t *)cq + 1);
268 struct cn9k_inb_priv_data *sa_priv;
269 struct roc_ie_on_inb_sa *sa;
270 uint8_t lcptr = rx->lcptr;
271 struct rte_ipv4_hdr *ip;
272 struct rte_ipv6_hdr *ip6;
273 uint16_t data_off, res;
274 uint32_t spi, win_sz;
275 uint32_t spi_mask;
276 uintptr_t data;
277 __uint128_t dw;
278 uint8_t sa_w;
279
280 res = *(uint64_t *)(res_sg0 + 8);
281 data_off = *rearm_val & (BIT_ULL(16) - 1);
282 data = (uintptr_t)m->buf_addr;
283
284 data += data_off;
285
286 rte_prefetch0((void *)data);
287
288 if (unlikely(res != (CPT_COMP_GOOD | ROC_IE_ON_UCC_SUCCESS << 8)))
289 return nix_rx_sec_mbuf_err_update(rx, res, rearm_val, len);
290
291 data += lcptr;
292 /* 20 bits of tag would have the SPI */
293 spi = cq->tag & CNXK_ETHDEV_SPI_TAG_MASK;
294
295 /* Get SA */
296 sa_w = sa_base & (ROC_NIX_INL_SA_BASE_ALIGN - 1);
297 sa_base &= ~(ROC_NIX_INL_SA_BASE_ALIGN - 1);
298 spi_mask = (1ULL << sa_w) - 1;
299 sa = roc_nix_inl_on_ipsec_inb_sa(sa_base, spi & spi_mask);
300
301 /* Update dynamic field with userdata */
302 sa_priv = roc_nix_inl_on_ipsec_inb_sa_sw_rsvd(sa);
303 dw = *(__uint128_t *)sa_priv;
304 *rte_security_dynfield(m) = (uint64_t)dw;
305
306 /* Check if anti-replay is enabled */
307 win_sz = (uint32_t)(dw >> 64);
308 if (win_sz) {
309 if (ipsec_antireplay_check(sa, sa_priv, data, win_sz) < 0)
310 return RTE_MBUF_F_RX_SEC_OFFLOAD | RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED;
311 }
312
313 /* Get total length from IPv4 header. We can assume only IPv4 */
314 ip = (struct rte_ipv4_hdr *)(data + ROC_ONF_IPSEC_INB_SPI_SEQ_SZ +
315 ROC_ONF_IPSEC_INB_MAX_L2_SZ);
316
317 packet_type = (packet_type & ~(RTE_PTYPE_L3_MASK | RTE_PTYPE_TUNNEL_MASK));
318 if (((ip->version_ihl & 0xf0) >> RTE_IPV4_IHL_MULTIPLIER) ==
319 IPVERSION) {
320 *len = rte_be_to_cpu_16(ip->total_length) + lcptr;
321 packet_type |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
322 } else {
323 PLT_ASSERT(((ip->version_ihl & 0xf0) >>
324 RTE_IPV4_IHL_MULTIPLIER) == 6);
325 ip6 = (struct rte_ipv6_hdr *)ip;
326 *len = rte_be_to_cpu_16(ip6->payload_len) +
327 sizeof(struct rte_ipv6_hdr) + lcptr;
328 packet_type |= RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
329 }
330
331 /* Update data offset */
332 data_off +=
333 (ROC_ONF_IPSEC_INB_SPI_SEQ_SZ + ROC_ONF_IPSEC_INB_MAX_L2_SZ);
334 *rearm_val = *rearm_val & ~(BIT_ULL(16) - 1);
335 *rearm_val |= data_off;
336
337 m->packet_type = packet_type;
338 return RTE_MBUF_F_RX_SEC_OFFLOAD;
339 }
340
341 static __rte_always_inline void
cn9k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s * cq,const uint32_t tag,struct rte_mbuf * mbuf,const void * lookup_mem,uint64_t val,const uint16_t flag)342 cn9k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,
343 struct rte_mbuf *mbuf, const void *lookup_mem,
344 uint64_t val, const uint16_t flag)
345 {
346 const union nix_rx_parse_u *rx =
347 (const union nix_rx_parse_u *)((const uint64_t *)cq + 1);
348 uint16_t len = rx->cn9k.pkt_lenm1 + 1;
349 const uint64_t w1 = *(const uint64_t *)rx;
350 uint32_t packet_type;
351 uint64_t ol_flags = 0;
352
353 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
354 RTE_MEMPOOL_CHECK_COOKIES(mbuf->pool, (void **)&mbuf, 1, 1);
355
356 if (flag & NIX_RX_OFFLOAD_PTYPE_F)
357 packet_type = nix_ptype_get(lookup_mem, w1);
358 else
359 packet_type = 0;
360
361 if ((flag & NIX_RX_OFFLOAD_SECURITY_F) &&
362 cq->cqe_type == NIX_XQE_TYPE_RX_IPSECH) {
363 uint16_t port = val >> 48;
364 uintptr_t sa_base;
365
366 /* Get SA Base from lookup mem */
367 sa_base = cnxk_nix_sa_base_get(port, lookup_mem);
368
369 ol_flags |= nix_rx_sec_mbuf_update(cq, mbuf, sa_base, &val, &len, packet_type);
370 goto skip_parse;
371 }
372
373 if (flag & NIX_RX_OFFLOAD_PTYPE_F)
374 mbuf->packet_type = packet_type;
375
376 if (flag & NIX_RX_OFFLOAD_RSS_F) {
377 mbuf->hash.rss = tag;
378 ol_flags |= RTE_MBUF_F_RX_RSS_HASH;
379 }
380
381 if (flag & NIX_RX_OFFLOAD_CHECKSUM_F)
382 ol_flags |= nix_rx_olflags_get(lookup_mem, w1);
383
384 skip_parse:
385 if (flag & NIX_RX_OFFLOAD_VLAN_STRIP_F) {
386 if (rx->cn9k.vtag0_gone) {
387 ol_flags |= RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED;
388 mbuf->vlan_tci = rx->cn9k.vtag0_tci;
389 }
390 if (rx->cn9k.vtag1_gone) {
391 ol_flags |= RTE_MBUF_F_RX_QINQ | RTE_MBUF_F_RX_QINQ_STRIPPED;
392 mbuf->vlan_tci_outer = rx->cn9k.vtag1_tci;
393 }
394 }
395
396 if (flag & NIX_RX_OFFLOAD_MARK_UPDATE_F)
397 ol_flags =
398 nix_update_match_id(rx->cn9k.match_id, ol_flags, mbuf);
399
400 mbuf->ol_flags = ol_flags;
401 *(uint64_t *)(&mbuf->rearm_data) = val;
402 mbuf->pkt_len = len;
403 mbuf->data_len = len;
404
405 if (flag & NIX_RX_MULTI_SEG_F)
406 /*
407 * For multi segment packets, mbuf length correction according
408 * to Rx timestamp length will be handled later during
409 * timestamp data process.
410 * Hence, flag argument is not required.
411 */
412 nix_cqe_xtract_mseg(rx, mbuf, val, 0);
413 else
414 mbuf->next = NULL;
415 }
416
417 static inline uint16_t
nix_rx_nb_pkts(struct cn9k_eth_rxq * rxq,const uint64_t wdata,const uint16_t pkts,const uint32_t qmask)418 nix_rx_nb_pkts(struct cn9k_eth_rxq *rxq, const uint64_t wdata,
419 const uint16_t pkts, const uint32_t qmask)
420 {
421 uint32_t available = rxq->available;
422
423 /* Update the available count if cached value is not enough */
424 if (unlikely(available < pkts)) {
425 uint64_t reg, head, tail;
426
427 /* Use LDADDA version to avoid reorder */
428 reg = roc_atomic64_add_sync(wdata, rxq->cq_status);
429 /* CQ_OP_STATUS operation error */
430 if (reg & BIT_ULL(NIX_CQ_OP_STAT_OP_ERR) ||
431 reg & BIT_ULL(NIX_CQ_OP_STAT_CQ_ERR))
432 return 0;
433
434 tail = reg & 0xFFFFF;
435 head = (reg >> 20) & 0xFFFFF;
436 if (tail < head)
437 available = tail - head + qmask + 1;
438 else
439 available = tail - head;
440
441 rxq->available = available;
442 }
443
444 return RTE_MIN(pkts, available);
445 }
446
447 static __rte_always_inline void
cn9k_nix_mbuf_to_tstamp(struct rte_mbuf * mbuf,struct cnxk_timesync_info * tstamp,const uint8_t ts_enable,uint64_t * tstamp_ptr)448 cn9k_nix_mbuf_to_tstamp(struct rte_mbuf *mbuf,
449 struct cnxk_timesync_info *tstamp,
450 const uint8_t ts_enable, uint64_t *tstamp_ptr)
451 {
452 if (ts_enable) {
453 mbuf->pkt_len -= CNXK_NIX_TIMESYNC_RX_OFFSET;
454 mbuf->data_len -= CNXK_NIX_TIMESYNC_RX_OFFSET;
455
456 /* Reading the rx timestamp inserted by CGX, viz at
457 * starting of the packet data.
458 */
459 *cnxk_nix_timestamp_dynfield(mbuf, tstamp) =
460 rte_be_to_cpu_64(*tstamp_ptr);
461 /* RTE_MBUF_F_RX_IEEE1588_TMST flag needs to be set only in case
462 * PTP packets are received.
463 */
464 if (mbuf->packet_type == RTE_PTYPE_L2_ETHER_TIMESYNC) {
465 tstamp->rx_tstamp =
466 *cnxk_nix_timestamp_dynfield(mbuf, tstamp);
467 tstamp->rx_ready = 1;
468 mbuf->ol_flags |= RTE_MBUF_F_RX_IEEE1588_PTP |
469 RTE_MBUF_F_RX_IEEE1588_TMST |
470 tstamp->rx_tstamp_dynflag;
471 }
472 }
473 }
474
475 static __rte_always_inline uint16_t
cn9k_nix_recv_pkts(void * rx_queue,struct rte_mbuf ** rx_pkts,uint16_t pkts,const uint16_t flags)476 cn9k_nix_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts,
477 const uint16_t flags)
478 {
479 struct cn9k_eth_rxq *rxq = rx_queue;
480 const uint64_t mbuf_init = rxq->mbuf_initializer;
481 const void *lookup_mem = rxq->lookup_mem;
482 const uint64_t data_off = rxq->data_off;
483 const uintptr_t desc = rxq->desc;
484 const uint64_t wdata = rxq->wdata;
485 const uint32_t qmask = rxq->qmask;
486 uint16_t packets = 0, nb_pkts;
487 uint32_t head = rxq->head;
488 struct nix_cqe_hdr_s *cq;
489 struct rte_mbuf *mbuf;
490
491 nb_pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
492
493 while (packets < nb_pkts) {
494 /* Prefetch N desc ahead */
495 rte_prefetch_non_temporal(
496 (void *)(desc + (CQE_SZ((head + 2) & qmask))));
497 cq = (struct nix_cqe_hdr_s *)(desc + CQE_SZ(head));
498
499 mbuf = nix_get_mbuf_from_cqe(cq, data_off);
500
501 cn9k_nix_cqe_to_mbuf(cq, cq->tag, mbuf, lookup_mem, mbuf_init,
502 flags);
503 cn9k_nix_mbuf_to_tstamp(mbuf, rxq->tstamp,
504 (flags & NIX_RX_OFFLOAD_TSTAMP_F),
505 (uint64_t *)((uint8_t *)mbuf
506 + data_off));
507 rx_pkts[packets++] = mbuf;
508 roc_prefetch_store_keep(mbuf);
509 head++;
510 head &= qmask;
511 }
512
513 rxq->head = head;
514 rxq->available -= nb_pkts;
515
516 /* Free all the CQs that we've processed */
517 plt_write64((wdata | nb_pkts), rxq->cq_door);
518
519 return nb_pkts;
520 }
521
522 #if defined(RTE_ARCH_ARM64)
523
524 static __rte_always_inline uint64_t
nix_vlan_update(const uint64_t w2,uint64_t ol_flags,uint8x16_t * f)525 nix_vlan_update(const uint64_t w2, uint64_t ol_flags, uint8x16_t *f)
526 {
527 if (w2 & BIT_ULL(21) /* vtag0_gone */) {
528 ol_flags |= RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED;
529 *f = vsetq_lane_u16((uint16_t)(w2 >> 32), *f, 5);
530 }
531
532 return ol_flags;
533 }
534
535 static __rte_always_inline uint64_t
nix_qinq_update(const uint64_t w2,uint64_t ol_flags,struct rte_mbuf * mbuf)536 nix_qinq_update(const uint64_t w2, uint64_t ol_flags, struct rte_mbuf *mbuf)
537 {
538 if (w2 & BIT_ULL(23) /* vtag1_gone */) {
539 ol_flags |= RTE_MBUF_F_RX_QINQ | RTE_MBUF_F_RX_QINQ_STRIPPED;
540 mbuf->vlan_tci_outer = (uint16_t)(w2 >> 48);
541 }
542
543 return ol_flags;
544 }
545
546 static __rte_always_inline uint16_t
cn9k_nix_recv_pkts_vector(void * rx_queue,struct rte_mbuf ** rx_pkts,uint16_t pkts,const uint16_t flags)547 cn9k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,
548 uint16_t pkts, const uint16_t flags)
549 {
550 struct cn9k_eth_rxq *rxq = rx_queue;
551 uint16_t packets = 0;
552 uint64x2_t cq0_w8, cq1_w8, cq2_w8, cq3_w8, mbuf01, mbuf23;
553 const uint64_t mbuf_initializer = rxq->mbuf_initializer;
554 const uint64x2_t data_off = vdupq_n_u64(rxq->data_off);
555 uint64_t ol_flags0, ol_flags1, ol_flags2, ol_flags3;
556 uint64x2_t rearm0 = vdupq_n_u64(mbuf_initializer);
557 uint64x2_t rearm1 = vdupq_n_u64(mbuf_initializer);
558 uint64x2_t rearm2 = vdupq_n_u64(mbuf_initializer);
559 uint64x2_t rearm3 = vdupq_n_u64(mbuf_initializer);
560 struct rte_mbuf *mbuf0, *mbuf1, *mbuf2, *mbuf3;
561 const uint16_t *lookup_mem = rxq->lookup_mem;
562 const uint32_t qmask = rxq->qmask;
563 const uint64_t wdata = rxq->wdata;
564 const uintptr_t desc = rxq->desc;
565 uint8x16_t f0, f1, f2, f3;
566 uint32_t head = rxq->head;
567 uint16_t pkts_left;
568
569 pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
570 pkts_left = pkts & (NIX_DESCS_PER_LOOP - 1);
571
572 /* Packets has to be floor-aligned to NIX_DESCS_PER_LOOP */
573 pkts = RTE_ALIGN_FLOOR(pkts, NIX_DESCS_PER_LOOP);
574
575 while (packets < pkts) {
576 /* Exit loop if head is about to wrap and become unaligned */
577 if (((head + NIX_DESCS_PER_LOOP - 1) & qmask) <
578 NIX_DESCS_PER_LOOP) {
579 pkts_left += (pkts - packets);
580 break;
581 }
582
583 const uintptr_t cq0 = desc + CQE_SZ(head);
584
585 /* Prefetch N desc ahead */
586 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(8)));
587 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(9)));
588 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(10)));
589 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(11)));
590
591 /* Get NIX_RX_SG_S for size and buffer pointer */
592 cq0_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(0) + 64));
593 cq1_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(1) + 64));
594 cq2_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(2) + 64));
595 cq3_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(3) + 64));
596
597 /* Extract mbuf from NIX_RX_SG_S */
598 mbuf01 = vzip2q_u64(cq0_w8, cq1_w8);
599 mbuf23 = vzip2q_u64(cq2_w8, cq3_w8);
600 mbuf01 = vqsubq_u64(mbuf01, data_off);
601 mbuf23 = vqsubq_u64(mbuf23, data_off);
602
603 /* Move mbufs to scalar registers for future use */
604 mbuf0 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 0);
605 mbuf1 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 1);
606 mbuf2 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 0);
607 mbuf3 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 1);
608
609 /* Mask to get packet len from NIX_RX_SG_S */
610 const uint8x16_t shuf_msk = {
611 0xFF, 0xFF, /* pkt_type set as unknown */
612 0xFF, 0xFF, /* pkt_type set as unknown */
613 0, 1, /* octet 1~0, low 16 bits pkt_len */
614 0xFF, 0xFF, /* skip high 16 bits pkt_len, zero out */
615 0, 1, /* octet 1~0, 16 bits data_len */
616 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
617
618 /* Form the rx_descriptor_fields1 with pkt_len and data_len */
619 f0 = vqtbl1q_u8(cq0_w8, shuf_msk);
620 f1 = vqtbl1q_u8(cq1_w8, shuf_msk);
621 f2 = vqtbl1q_u8(cq2_w8, shuf_msk);
622 f3 = vqtbl1q_u8(cq3_w8, shuf_msk);
623
624 /* Load CQE word0 and word 1 */
625 uint64_t cq0_w0 = ((uint64_t *)(cq0 + CQE_SZ(0)))[0];
626 uint64_t cq0_w1 = ((uint64_t *)(cq0 + CQE_SZ(0)))[1];
627 uint64_t cq1_w0 = ((uint64_t *)(cq0 + CQE_SZ(1)))[0];
628 uint64_t cq1_w1 = ((uint64_t *)(cq0 + CQE_SZ(1)))[1];
629 uint64_t cq2_w0 = ((uint64_t *)(cq0 + CQE_SZ(2)))[0];
630 uint64_t cq2_w1 = ((uint64_t *)(cq0 + CQE_SZ(2)))[1];
631 uint64_t cq3_w0 = ((uint64_t *)(cq0 + CQE_SZ(3)))[0];
632 uint64_t cq3_w1 = ((uint64_t *)(cq0 + CQE_SZ(3)))[1];
633
634 if (flags & NIX_RX_OFFLOAD_RSS_F) {
635 /* Fill rss in the rx_descriptor_fields1 */
636 f0 = vsetq_lane_u32(cq0_w0, f0, 3);
637 f1 = vsetq_lane_u32(cq1_w0, f1, 3);
638 f2 = vsetq_lane_u32(cq2_w0, f2, 3);
639 f3 = vsetq_lane_u32(cq3_w0, f3, 3);
640 ol_flags0 = RTE_MBUF_F_RX_RSS_HASH;
641 ol_flags1 = RTE_MBUF_F_RX_RSS_HASH;
642 ol_flags2 = RTE_MBUF_F_RX_RSS_HASH;
643 ol_flags3 = RTE_MBUF_F_RX_RSS_HASH;
644 } else {
645 ol_flags0 = 0;
646 ol_flags1 = 0;
647 ol_flags2 = 0;
648 ol_flags3 = 0;
649 }
650
651 if (flags & NIX_RX_OFFLOAD_PTYPE_F) {
652 /* Fill packet_type in the rx_descriptor_fields1 */
653 f0 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq0_w1),
654 f0, 0);
655 f1 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq1_w1),
656 f1, 0);
657 f2 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq2_w1),
658 f2, 0);
659 f3 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq3_w1),
660 f3, 0);
661 }
662
663 if (flags & NIX_RX_OFFLOAD_CHECKSUM_F) {
664 ol_flags0 |= nix_rx_olflags_get(lookup_mem, cq0_w1);
665 ol_flags1 |= nix_rx_olflags_get(lookup_mem, cq1_w1);
666 ol_flags2 |= nix_rx_olflags_get(lookup_mem, cq2_w1);
667 ol_flags3 |= nix_rx_olflags_get(lookup_mem, cq3_w1);
668 }
669
670 if (flags & NIX_RX_OFFLOAD_VLAN_STRIP_F) {
671 uint64_t cq0_w2 = *(uint64_t *)(cq0 + CQE_SZ(0) + 16);
672 uint64_t cq1_w2 = *(uint64_t *)(cq0 + CQE_SZ(1) + 16);
673 uint64_t cq2_w2 = *(uint64_t *)(cq0 + CQE_SZ(2) + 16);
674 uint64_t cq3_w2 = *(uint64_t *)(cq0 + CQE_SZ(3) + 16);
675
676 ol_flags0 = nix_vlan_update(cq0_w2, ol_flags0, &f0);
677 ol_flags1 = nix_vlan_update(cq1_w2, ol_flags1, &f1);
678 ol_flags2 = nix_vlan_update(cq2_w2, ol_flags2, &f2);
679 ol_flags3 = nix_vlan_update(cq3_w2, ol_flags3, &f3);
680
681 ol_flags0 = nix_qinq_update(cq0_w2, ol_flags0, mbuf0);
682 ol_flags1 = nix_qinq_update(cq1_w2, ol_flags1, mbuf1);
683 ol_flags2 = nix_qinq_update(cq2_w2, ol_flags2, mbuf2);
684 ol_flags3 = nix_qinq_update(cq3_w2, ol_flags3, mbuf3);
685 }
686
687 if (flags & NIX_RX_OFFLOAD_MARK_UPDATE_F) {
688 ol_flags0 = nix_update_match_id(
689 *(uint16_t *)(cq0 + CQE_SZ(0) + 38), ol_flags0,
690 mbuf0);
691 ol_flags1 = nix_update_match_id(
692 *(uint16_t *)(cq0 + CQE_SZ(1) + 38), ol_flags1,
693 mbuf1);
694 ol_flags2 = nix_update_match_id(
695 *(uint16_t *)(cq0 + CQE_SZ(2) + 38), ol_flags2,
696 mbuf2);
697 ol_flags3 = nix_update_match_id(
698 *(uint16_t *)(cq0 + CQE_SZ(3) + 38), ol_flags3,
699 mbuf3);
700 }
701
702 if (flags & NIX_RX_OFFLOAD_TSTAMP_F) {
703 const uint16x8_t len_off = {
704 0, /* ptype 0:15 */
705 0, /* ptype 16:32 */
706 CNXK_NIX_TIMESYNC_RX_OFFSET, /* pktlen 0:15*/
707 0, /* pktlen 16:32 */
708 CNXK_NIX_TIMESYNC_RX_OFFSET, /* datalen 0:15 */
709 0,
710 0,
711 0};
712 const uint32x4_t ptype = {RTE_PTYPE_L2_ETHER_TIMESYNC,
713 RTE_PTYPE_L2_ETHER_TIMESYNC,
714 RTE_PTYPE_L2_ETHER_TIMESYNC,
715 RTE_PTYPE_L2_ETHER_TIMESYNC};
716 const uint64_t ts_olf = RTE_MBUF_F_RX_IEEE1588_PTP |
717 RTE_MBUF_F_RX_IEEE1588_TMST |
718 rxq->tstamp->rx_tstamp_dynflag;
719 const uint32x4_t and_mask = {0x1, 0x2, 0x4, 0x8};
720 uint64x2_t ts01, ts23, mask;
721 uint64_t ts[4];
722 uint8_t res;
723
724 /* Subtract timesync length from total pkt length. */
725 f0 = vsubq_u16(f0, len_off);
726 f1 = vsubq_u16(f1, len_off);
727 f2 = vsubq_u16(f2, len_off);
728 f3 = vsubq_u16(f3, len_off);
729
730 /* Get the address of actual timestamp. */
731 ts01 = vaddq_u64(mbuf01, data_off);
732 ts23 = vaddq_u64(mbuf23, data_off);
733 /* Load timestamp from address. */
734 ts01 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts01,
735 0),
736 ts01, 0);
737 ts01 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts01,
738 1),
739 ts01, 1);
740 ts23 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts23,
741 0),
742 ts23, 0);
743 ts23 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts23,
744 1),
745 ts23, 1);
746 /* Convert from be to cpu byteorder. */
747 ts01 = vrev64q_u8(ts01);
748 ts23 = vrev64q_u8(ts23);
749 /* Store timestamp into scalar for later use. */
750 ts[0] = vgetq_lane_u64(ts01, 0);
751 ts[1] = vgetq_lane_u64(ts01, 1);
752 ts[2] = vgetq_lane_u64(ts23, 0);
753 ts[3] = vgetq_lane_u64(ts23, 1);
754
755 /* Store timestamp into dynfield. */
756 *cnxk_nix_timestamp_dynfield(mbuf0, rxq->tstamp) =
757 ts[0];
758 *cnxk_nix_timestamp_dynfield(mbuf1, rxq->tstamp) =
759 ts[1];
760 *cnxk_nix_timestamp_dynfield(mbuf2, rxq->tstamp) =
761 ts[2];
762 *cnxk_nix_timestamp_dynfield(mbuf3, rxq->tstamp) =
763 ts[3];
764
765 /* Generate ptype mask to filter L2 ether timesync */
766 mask = vdupq_n_u32(vgetq_lane_u32(f0, 0));
767 mask = vsetq_lane_u32(vgetq_lane_u32(f1, 0), mask, 1);
768 mask = vsetq_lane_u32(vgetq_lane_u32(f2, 0), mask, 2);
769 mask = vsetq_lane_u32(vgetq_lane_u32(f3, 0), mask, 3);
770
771 /* Match against L2 ether timesync. */
772 mask = vceqq_u32(mask, ptype);
773 /* Convert from vector from scalar mask */
774 res = vaddvq_u32(vandq_u32(mask, and_mask));
775 res &= 0xF;
776
777 if (res) {
778 /* Fill in the ol_flags for any packets that
779 * matched.
780 */
781 ol_flags0 |= ((res & 0x1) ? ts_olf : 0);
782 ol_flags1 |= ((res & 0x2) ? ts_olf : 0);
783 ol_flags2 |= ((res & 0x4) ? ts_olf : 0);
784 ol_flags3 |= ((res & 0x8) ? ts_olf : 0);
785
786 /* Update Rxq timestamp with the latest
787 * timestamp.
788 */
789 rxq->tstamp->rx_ready = 1;
790 rxq->tstamp->rx_tstamp =
791 ts[31 - rte_clz32(res)];
792 }
793 }
794
795 /* Form rearm_data with ol_flags */
796 rearm0 = vsetq_lane_u64(ol_flags0, rearm0, 1);
797 rearm1 = vsetq_lane_u64(ol_flags1, rearm1, 1);
798 rearm2 = vsetq_lane_u64(ol_flags2, rearm2, 1);
799 rearm3 = vsetq_lane_u64(ol_flags3, rearm3, 1);
800
801 /* Update rx_descriptor_fields1 */
802 vst1q_u64((uint64_t *)mbuf0->rx_descriptor_fields1, f0);
803 vst1q_u64((uint64_t *)mbuf1->rx_descriptor_fields1, f1);
804 vst1q_u64((uint64_t *)mbuf2->rx_descriptor_fields1, f2);
805 vst1q_u64((uint64_t *)mbuf3->rx_descriptor_fields1, f3);
806
807 /* Update rearm_data */
808 vst1q_u64((uint64_t *)mbuf0->rearm_data, rearm0);
809 vst1q_u64((uint64_t *)mbuf1->rearm_data, rearm1);
810 vst1q_u64((uint64_t *)mbuf2->rearm_data, rearm2);
811 vst1q_u64((uint64_t *)mbuf3->rearm_data, rearm3);
812
813 if (flags & NIX_RX_MULTI_SEG_F) {
814 /* Multi segment is enable build mseg list for
815 * individual mbufs in scalar mode.
816 */
817 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
818 (cq0 + CQE_SZ(0) + 8), mbuf0,
819 mbuf_initializer, flags);
820 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
821 (cq0 + CQE_SZ(1) + 8), mbuf1,
822 mbuf_initializer, flags);
823 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
824 (cq0 + CQE_SZ(2) + 8), mbuf2,
825 mbuf_initializer, flags);
826 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
827 (cq0 + CQE_SZ(3) + 8), mbuf3,
828 mbuf_initializer, flags);
829 } else {
830 /* Update that no more segments */
831 mbuf0->next = NULL;
832 mbuf1->next = NULL;
833 mbuf2->next = NULL;
834 mbuf3->next = NULL;
835 }
836
837 /* Store the mbufs to rx_pkts */
838 vst1q_u64((uint64_t *)&rx_pkts[packets], mbuf01);
839 vst1q_u64((uint64_t *)&rx_pkts[packets + 2], mbuf23);
840
841 /* Prefetch mbufs */
842 roc_prefetch_store_keep(mbuf0);
843 roc_prefetch_store_keep(mbuf1);
844 roc_prefetch_store_keep(mbuf2);
845 roc_prefetch_store_keep(mbuf3);
846
847 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
848 RTE_MEMPOOL_CHECK_COOKIES(mbuf0->pool, (void **)&mbuf0, 1, 1);
849 RTE_MEMPOOL_CHECK_COOKIES(mbuf1->pool, (void **)&mbuf1, 1, 1);
850 RTE_MEMPOOL_CHECK_COOKIES(mbuf2->pool, (void **)&mbuf2, 1, 1);
851 RTE_MEMPOOL_CHECK_COOKIES(mbuf3->pool, (void **)&mbuf3, 1, 1);
852
853 /* Advance head pointer and packets */
854 head += NIX_DESCS_PER_LOOP;
855 head &= qmask;
856 packets += NIX_DESCS_PER_LOOP;
857 }
858
859 rxq->head = head;
860 rxq->available -= packets;
861
862 rte_io_wmb();
863 /* Free all the CQs that we've processed */
864 plt_write64((rxq->wdata | packets), rxq->cq_door);
865
866 if (unlikely(pkts_left))
867 packets += cn9k_nix_recv_pkts(rx_queue, &rx_pkts[packets],
868 pkts_left, flags);
869
870 return packets;
871 }
872
873 #else
874
875 static inline uint16_t
cn9k_nix_recv_pkts_vector(void * rx_queue,struct rte_mbuf ** rx_pkts,uint16_t pkts,const uint16_t flags)876 cn9k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,
877 uint16_t pkts, const uint16_t flags)
878 {
879 RTE_SET_USED(rx_queue);
880 RTE_SET_USED(rx_pkts);
881 RTE_SET_USED(pkts);
882 RTE_SET_USED(flags);
883
884 return 0;
885 }
886
887 #endif
888
889 #define RSS_F NIX_RX_OFFLOAD_RSS_F
890 #define PTYPE_F NIX_RX_OFFLOAD_PTYPE_F
891 #define CKSUM_F NIX_RX_OFFLOAD_CHECKSUM_F
892 #define MARK_F NIX_RX_OFFLOAD_MARK_UPDATE_F
893 #define TS_F NIX_RX_OFFLOAD_TSTAMP_F
894 #define RX_VLAN_F NIX_RX_OFFLOAD_VLAN_STRIP_F
895 #define R_SEC_F NIX_RX_OFFLOAD_SECURITY_F
896
897 /* [R_SEC_F] [RX_VLAN_F] [TS] [MARK] [CKSUM] [PTYPE] [RSS] */
898 #define NIX_RX_FASTPATH_MODES_0_15 \
899 R(no_offload, NIX_RX_OFFLOAD_NONE) \
900 R(rss, RSS_F) \
901 R(ptype, PTYPE_F) \
902 R(ptype_rss, PTYPE_F | RSS_F) \
903 R(cksum, CKSUM_F) \
904 R(cksum_rss, CKSUM_F | RSS_F) \
905 R(cksum_ptype, CKSUM_F | PTYPE_F) \
906 R(cksum_ptype_rss, CKSUM_F | PTYPE_F | RSS_F) \
907 R(mark, MARK_F) \
908 R(mark_rss, MARK_F | RSS_F) \
909 R(mark_ptype, MARK_F | PTYPE_F) \
910 R(mark_ptype_rss, MARK_F | PTYPE_F | RSS_F) \
911 R(mark_cksum, MARK_F | CKSUM_F) \
912 R(mark_cksum_rss, MARK_F | CKSUM_F | RSS_F) \
913 R(mark_cksum_ptype, MARK_F | CKSUM_F | PTYPE_F) \
914 R(mark_cksum_ptype_rss, MARK_F | CKSUM_F | PTYPE_F | RSS_F)
915
916 #define NIX_RX_FASTPATH_MODES_16_31 \
917 R(ts, TS_F) \
918 R(ts_rss, TS_F | RSS_F) \
919 R(ts_ptype, TS_F | PTYPE_F) \
920 R(ts_ptype_rss, TS_F | PTYPE_F | RSS_F) \
921 R(ts_cksum, TS_F | CKSUM_F) \
922 R(ts_cksum_rss, TS_F | CKSUM_F | RSS_F) \
923 R(ts_cksum_ptype, TS_F | CKSUM_F | PTYPE_F) \
924 R(ts_cksum_ptype_rss, TS_F | CKSUM_F | PTYPE_F | RSS_F) \
925 R(ts_mark, TS_F | MARK_F) \
926 R(ts_mark_rss, TS_F | MARK_F | RSS_F) \
927 R(ts_mark_ptype, TS_F | MARK_F | PTYPE_F) \
928 R(ts_mark_ptype_rss, TS_F | MARK_F | PTYPE_F | RSS_F) \
929 R(ts_mark_cksum, TS_F | MARK_F | CKSUM_F) \
930 R(ts_mark_cksum_rss, TS_F | MARK_F | CKSUM_F | RSS_F) \
931 R(ts_mark_cksum_ptype, TS_F | MARK_F | CKSUM_F | PTYPE_F) \
932 R(ts_mark_cksum_ptype_rss, TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
933
934 #define NIX_RX_FASTPATH_MODES_32_47 \
935 R(vlan, RX_VLAN_F) \
936 R(vlan_rss, RX_VLAN_F | RSS_F) \
937 R(vlan_ptype, RX_VLAN_F | PTYPE_F) \
938 R(vlan_ptype_rss, RX_VLAN_F | PTYPE_F | RSS_F) \
939 R(vlan_cksum, RX_VLAN_F | CKSUM_F) \
940 R(vlan_cksum_rss, RX_VLAN_F | CKSUM_F | RSS_F) \
941 R(vlan_cksum_ptype, RX_VLAN_F | CKSUM_F | PTYPE_F) \
942 R(vlan_cksum_ptype_rss, RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
943 R(vlan_mark, RX_VLAN_F | MARK_F) \
944 R(vlan_mark_rss, RX_VLAN_F | MARK_F | RSS_F) \
945 R(vlan_mark_ptype, RX_VLAN_F | MARK_F | PTYPE_F) \
946 R(vlan_mark_ptype_rss, RX_VLAN_F | MARK_F | PTYPE_F | RSS_F) \
947 R(vlan_mark_cksum, RX_VLAN_F | MARK_F | CKSUM_F) \
948 R(vlan_mark_cksum_rss, RX_VLAN_F | MARK_F | CKSUM_F | RSS_F) \
949 R(vlan_mark_cksum_ptype, RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F) \
950 R(vlan_mark_cksum_ptype_rss, \
951 RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
952
953 #define NIX_RX_FASTPATH_MODES_48_63 \
954 R(vlan_ts, RX_VLAN_F | TS_F) \
955 R(vlan_ts_rss, RX_VLAN_F | TS_F | RSS_F) \
956 R(vlan_ts_ptype, RX_VLAN_F | TS_F | PTYPE_F) \
957 R(vlan_ts_ptype_rss, RX_VLAN_F | TS_F | PTYPE_F | RSS_F) \
958 R(vlan_ts_cksum, RX_VLAN_F | TS_F | CKSUM_F) \
959 R(vlan_ts_cksum_rss, RX_VLAN_F | TS_F | CKSUM_F | RSS_F) \
960 R(vlan_ts_cksum_ptype, RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F) \
961 R(vlan_ts_cksum_ptype_rss, \
962 RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \
963 R(vlan_ts_mark, RX_VLAN_F | TS_F | MARK_F) \
964 R(vlan_ts_mark_rss, RX_VLAN_F | TS_F | MARK_F | RSS_F) \
965 R(vlan_ts_mark_ptype, RX_VLAN_F | TS_F | MARK_F | PTYPE_F) \
966 R(vlan_ts_mark_ptype_rss, RX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F) \
967 R(vlan_ts_mark_cksum, RX_VLAN_F | TS_F | MARK_F | CKSUM_F) \
968 R(vlan_ts_mark_cksum_rss, RX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F) \
969 R(vlan_ts_mark_cksum_ptype, \
970 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \
971 R(vlan_ts_mark_cksum_ptype_rss, \
972 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
973
974 #define NIX_RX_FASTPATH_MODES_64_79 \
975 R(sec, R_SEC_F) \
976 R(sec_rss, R_SEC_F | RSS_F) \
977 R(sec_ptype, R_SEC_F | PTYPE_F) \
978 R(sec_ptype_rss, R_SEC_F | PTYPE_F | RSS_F) \
979 R(sec_cksum, R_SEC_F | CKSUM_F) \
980 R(sec_cksum_rss, R_SEC_F | CKSUM_F | RSS_F) \
981 R(sec_cksum_ptype, R_SEC_F | CKSUM_F | PTYPE_F) \
982 R(sec_cksum_ptype_rss, R_SEC_F | CKSUM_F | PTYPE_F | RSS_F) \
983 R(sec_mark, R_SEC_F | MARK_F) \
984 R(sec_mark_rss, R_SEC_F | MARK_F | RSS_F) \
985 R(sec_mark_ptype, R_SEC_F | MARK_F | PTYPE_F) \
986 R(sec_mark_ptype_rss, R_SEC_F | MARK_F | PTYPE_F | RSS_F) \
987 R(sec_mark_cksum, R_SEC_F | MARK_F | CKSUM_F) \
988 R(sec_mark_cksum_rss, R_SEC_F | MARK_F | CKSUM_F | RSS_F) \
989 R(sec_mark_cksum_ptype, R_SEC_F | MARK_F | CKSUM_F | PTYPE_F) \
990 R(sec_mark_cksum_ptype_rss, \
991 R_SEC_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
992
993 #define NIX_RX_FASTPATH_MODES_80_95 \
994 R(sec_ts, R_SEC_F | TS_F) \
995 R(sec_ts_rss, R_SEC_F | TS_F | RSS_F) \
996 R(sec_ts_ptype, R_SEC_F | TS_F | PTYPE_F) \
997 R(sec_ts_ptype_rss, R_SEC_F | TS_F | PTYPE_F | RSS_F) \
998 R(sec_ts_cksum, R_SEC_F | TS_F | CKSUM_F) \
999 R(sec_ts_cksum_rss, R_SEC_F | TS_F | CKSUM_F | RSS_F) \
1000 R(sec_ts_cksum_ptype, R_SEC_F | TS_F | CKSUM_F | PTYPE_F) \
1001 R(sec_ts_cksum_ptype_rss, R_SEC_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \
1002 R(sec_ts_mark, R_SEC_F | TS_F | MARK_F) \
1003 R(sec_ts_mark_rss, R_SEC_F | TS_F | MARK_F | RSS_F) \
1004 R(sec_ts_mark_ptype, R_SEC_F | TS_F | MARK_F | PTYPE_F) \
1005 R(sec_ts_mark_ptype_rss, R_SEC_F | TS_F | MARK_F | PTYPE_F | RSS_F) \
1006 R(sec_ts_mark_cksum, R_SEC_F | TS_F | MARK_F | CKSUM_F) \
1007 R(sec_ts_mark_cksum_rss, R_SEC_F | TS_F | MARK_F | CKSUM_F | RSS_F) \
1008 R(sec_ts_mark_cksum_ptype, \
1009 R_SEC_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \
1010 R(sec_ts_mark_cksum_ptype_rss, \
1011 R_SEC_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
1012
1013 #define NIX_RX_FASTPATH_MODES_96_111 \
1014 R(sec_vlan, R_SEC_F | RX_VLAN_F) \
1015 R(sec_vlan_rss, R_SEC_F | RX_VLAN_F | RSS_F) \
1016 R(sec_vlan_ptype, R_SEC_F | RX_VLAN_F | PTYPE_F) \
1017 R(sec_vlan_ptype_rss, R_SEC_F | RX_VLAN_F | PTYPE_F | RSS_F) \
1018 R(sec_vlan_cksum, R_SEC_F | RX_VLAN_F | CKSUM_F) \
1019 R(sec_vlan_cksum_rss, R_SEC_F | RX_VLAN_F | CKSUM_F | RSS_F) \
1020 R(sec_vlan_cksum_ptype, R_SEC_F | RX_VLAN_F | CKSUM_F | PTYPE_F) \
1021 R(sec_vlan_cksum_ptype_rss, \
1022 R_SEC_F | RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
1023 R(sec_vlan_mark, R_SEC_F | RX_VLAN_F | MARK_F) \
1024 R(sec_vlan_mark_rss, R_SEC_F | RX_VLAN_F | MARK_F | RSS_F) \
1025 R(sec_vlan_mark_ptype, R_SEC_F | RX_VLAN_F | MARK_F | PTYPE_F) \
1026 R(sec_vlan_mark_ptype_rss, \
1027 R_SEC_F | RX_VLAN_F | MARK_F | PTYPE_F | RSS_F) \
1028 R(sec_vlan_mark_cksum, R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F) \
1029 R(sec_vlan_mark_cksum_rss, \
1030 R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | RSS_F) \
1031 R(sec_vlan_mark_cksum_ptype, \
1032 R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F) \
1033 R(sec_vlan_mark_cksum_ptype_rss, \
1034 R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
1035
1036 #define NIX_RX_FASTPATH_MODES_112_127 \
1037 R(sec_vlan_ts, R_SEC_F | RX_VLAN_F | TS_F) \
1038 R(sec_vlan_ts_rss, R_SEC_F | RX_VLAN_F | TS_F | RSS_F) \
1039 R(sec_vlan_ts_ptype, R_SEC_F | RX_VLAN_F | TS_F | PTYPE_F) \
1040 R(sec_vlan_ts_ptype_rss, R_SEC_F | RX_VLAN_F | TS_F | PTYPE_F | RSS_F) \
1041 R(sec_vlan_ts_cksum, R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F) \
1042 R(sec_vlan_ts_cksum_rss, R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | RSS_F) \
1043 R(sec_vlan_ts_cksum_ptype, \
1044 R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F) \
1045 R(sec_vlan_ts_cksum_ptype_rss, \
1046 R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \
1047 R(sec_vlan_ts_mark, R_SEC_F | RX_VLAN_F | TS_F | MARK_F) \
1048 R(sec_vlan_ts_mark_rss, R_SEC_F | RX_VLAN_F | TS_F | MARK_F | RSS_F) \
1049 R(sec_vlan_ts_mark_ptype, \
1050 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | PTYPE_F) \
1051 R(sec_vlan_ts_mark_ptype_rss, \
1052 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F) \
1053 R(sec_vlan_ts_mark_cksum, \
1054 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F) \
1055 R(sec_vlan_ts_mark_cksum_rss, \
1056 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F) \
1057 R(sec_vlan_ts_mark_cksum_ptype, \
1058 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \
1059 R(sec_vlan_ts_mark_cksum_ptype_rss, \
1060 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
1061
1062 #define NIX_RX_FASTPATH_MODES \
1063 NIX_RX_FASTPATH_MODES_0_15 \
1064 NIX_RX_FASTPATH_MODES_16_31 \
1065 NIX_RX_FASTPATH_MODES_32_47 \
1066 NIX_RX_FASTPATH_MODES_48_63 \
1067 NIX_RX_FASTPATH_MODES_64_79 \
1068 NIX_RX_FASTPATH_MODES_80_95 \
1069 NIX_RX_FASTPATH_MODES_96_111 \
1070 NIX_RX_FASTPATH_MODES_112_127
1071
1072 #define R(name, flags) \
1073 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_##name( \
1074 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
1075 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_mseg_##name( \
1076 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
1077 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_vec_##name( \
1078 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
1079 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_vec_mseg_##name( \
1080 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts);
1081
1082 NIX_RX_FASTPATH_MODES
1083 #undef R
1084
1085 #define NIX_RX_RECV(fn, flags) \
1086 uint16_t __rte_noinline __rte_hot fn( \
1087 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts) \
1088 { \
1089 return cn9k_nix_recv_pkts(rx_queue, rx_pkts, pkts, (flags)); \
1090 }
1091
1092 #define NIX_RX_RECV_MSEG(fn, flags) NIX_RX_RECV(fn, flags | NIX_RX_MULTI_SEG_F)
1093
1094 #define NIX_RX_RECV_VEC(fn, flags) \
1095 uint16_t __rte_noinline __rte_hot fn( \
1096 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts) \
1097 { \
1098 return cn9k_nix_recv_pkts_vector(rx_queue, rx_pkts, pkts, \
1099 (flags)); \
1100 }
1101
1102 #define NIX_RX_RECV_VEC_MSEG(fn, flags) \
1103 NIX_RX_RECV_VEC(fn, flags | NIX_RX_MULTI_SEG_F)
1104
1105 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_all_offload(void *rx_queue,
1106 struct rte_mbuf **rx_pkts,
1107 uint16_t pkts);
1108
1109 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_vec_all_offload(void *rx_queue,
1110 struct rte_mbuf **rx_pkts,
1111 uint16_t pkts);
1112
1113 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_all_offload_tst(void *rx_queue,
1114 struct rte_mbuf **rx_pkts,
1115 uint16_t pkts);
1116
1117 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_vec_all_offload_tst(void *rx_queue,
1118 struct rte_mbuf **rx_pkts,
1119 uint16_t pkts);
1120
1121 #endif /* __CN9K_RX_H__ */
1122