| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/ |
| H A D | amdgpu_dc_link_dp.c | 245 uint32_t lane; in dpcd_set_lt_pattern_and_lane_settings() local
354 uint32_t lane; in is_cr_done() local
369 uint32_t lane; in is_ch_eq_done() local
387 uint32_t lane; in update_drive_settings() local
437 uint32_t lane; in find_max_drive_settings() local
541 uint32_t lane; in get_lane_status_and_drive_settings() local
648 uint32_t lane; in dpcd_set_lane_settings() local
728 uint32_t lane; in is_max_vs_reached() local
750 uint32_t lane; in perform_post_lt_adj_req_sequence() local
1107 uint32_t lane; in initialize_training_settings() local
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| H A D | intel_dp_link_training.c | 48 int lane; in intel_get_adjust_train() local
124 int lane; in intel_dp_link_max_vswing_reached() local
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| H A D | intel_dpio_phy.c | 602 int lane; in bxt_ddi_phy_set_lane_optim_mask() local
628 int lane; in bxt_ddi_phy_get_lane_lat_optim_mask() local
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| H A D | icl_dsi.c | 213 int lane; in dsi_program_swing_and_deemphasis() local
398 int lane; in gen11_dsi_config_phy_lanes_sequence() local
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/disp/ |
| H A D | nouveau_nvkm_engine_disp_dp.c | 93 u8 lane = (lt->stat[4 + (i >> 1)] >> ((i & 1) * 4)) & 0xf; in nvkm_dp_train_drive() local
180 u8 lane = (lt->stat[i >> 1] >> ((i & 1) * 4)) & 0xf; in nvkm_dp_train_eq() local
208 u8 lane = (lt->stat[i >> 1] >> ((i & 1) * 4)) & 0xf; in nvkm_dp_train_cr() local
494 u8 lane = (stat[i >> 1] >> ((i & 1) * 4)) & 0x0f; in nvkm_dp_acquire() local
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/ |
| H A D | drm_dp_helper.c | 62 int lane) in dp_get_lane_status()
75 int lane; in drm_dp_channel_eq_ok() local
93 int lane; in drm_dp_clock_recovery_ok() local
106 int lane) in drm_dp_get_adjust_request_voltage()
119 int lane) in drm_dp_get_adjust_request_pre_emphasis()
139 unsigned int lane) in drm_dp_get_adjust_request_post_cursor()
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| /netbsd-src/sys/arch/arm/rockchip/ |
| H A D | rk3399_pcie_phy.c | 120 uint8_t * const lane = priv; in rkpciephy_phy_enable() local
202 rkpcie_phy_poweron(struct rkpciephy_softc *sc, u_int lane) in rkpcie_phy_poweron() argument
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| /netbsd-src/external/apache2/argon2/dist/phc-winner-argon2/src/ |
| H A D | core.h | 91 uint32_t lane; member
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| /netbsd-src/sys/external/isc/libsodium/dist/src/libsodium/crypto_pwhash/argon2/ |
| H A D | argon2-core.h | 115 uint32_t lane; member
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| /netbsd-src/external/gpl3/gcc/dist/gcc/ |
| H A D | tree-vect-slp.cc | 1788 HOST_WIDE_INT lane; in vect_build_slp_tree_2() local
1848 for (unsigned lane = 0; lane < group_size; ++lane) in vect_build_slp_tree_2() local
1902 for (unsigned lane = 0; lane < group_size; ++lane) in vect_build_slp_tree_2() local
1909 for (unsigned lane = 0; lane < group_size; ++lane) in vect_build_slp_tree_2() local
1922 unsigned lane; in vect_build_slp_tree_2() local
2047 for (unsigned lane = 0; lane < group_size; ++lane) in vect_build_slp_tree_2() local
2101 for (unsigned lane = 0; lane < group_size; ++lane) in vect_build_slp_tree_2() local
2116 for (unsigned lane = 0; lane < group_size; ++lane) in vect_build_slp_tree_2() local
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| H A D | omp-low.cc | 4594 tree lane; member in omplow_simd_context
10055 tree lane = NULL_TREE; in lower_omp_scan() local
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| H A D | amdgpu_atombios_dp.c | 217 int lane; in amdgpu_atombios_dp_get_adjust_train() local
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| /netbsd-src/sys/arch/arm/nvidia/ |
| H A D | tegra210_xusbpad.c | 663 tegra210_xusbpad_find_func(const struct tegra210_xusbpad_lane *lane, in tegra210_xusbpad_find_func()
685 const struct tegra210_xusbpad_lane *lane; in tegra210_xusbpad_configure_lane() local
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/ |
| H A D | radeon_atombios_dp.c | 275 int lane; in dp_get_adjust_train() local
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| /netbsd-src/external/gpl3/gcc/dist/gcc/config/aarch64/ |
| H A D | aarch64-builtins.cc | 541 bool lane; member
1922 int lane = INTVAL (op[opc]); in aarch64_simd_expand_args() local
1939 int lane = INTVAL (op[opc]); in aarch64_simd_expand_args() local
2194 int lane = INTVAL (lane_idx); in aarch64_expand_fcmla_builtin() local
2788 auto lane = wi::to_widest (arg2); in aarch64_fold_builtin_lane_check() local
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/ |
| H A D | amdgpu_dce_link_encoder.c | 1119 int32_t lane = 0; in dce110_link_encoder_dp_set_lane_settings() local
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/aarch64/ |
| H A D | aarch64-builtins.c | 431 bool lane; member
1418 int lane = INTVAL (op[opc]); in aarch64_simd_expand_args() local
1435 int lane = INTVAL (op[opc]); in aarch64_simd_expand_args() local
1685 int lane = INTVAL (lane_idx); in aarch64_expand_fcmla_builtin() local
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| H A D | amdgpu_dcn10_link_encoder.c | 1085 int32_t lane = 0; in dcn10_link_encoder_dp_set_lane_settings() local
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/rs6000/ |
| H A D | rs6000-p8swap.c | 1240 int lane = INTVAL (XVECEXP (par, 0, 0)); in adjust_extract() local
1258 int lane = INTVAL (XVECEXP (unspec, 0, 1)); in adjust_splat() local
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| /netbsd-src/external/gpl3/gcc/dist/gcc/config/rs6000/ |
| H A D | rs6000-p8swap.cc | 1260 int lane = INTVAL (XVECEXP (par, 0, 0)); in adjust_extract() local
1278 int lane = INTVAL (XVECEXP (unspec, 0, 1)); in adjust_splat() local
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| /netbsd-src/sys/external/gpl2/dts/dist/include/dt-bindings/usb/ |
| H A D | pd.h | 406 #define VDO_ACABLE2(mtemp, stemp, u3p, trans, phy, ele, u4, hops, u2, u32, lane, iso, gen) \ argument
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/i915/ |
| H A D | i915_reg.h | 1713 #define _TXLANE(ch, lane, offset) ((ch ? 0x2400 : 0) + \ argument
1716 #define CHV_TX_DW0(ch, lane) _TXLANE(ch, lane, 0x80) argument
1717 #define CHV_TX_DW1(ch, lane) _TXLANE(ch, lane, 0x84) argument
1718 #define CHV_TX_DW2(ch, lane) _TXLANE(ch, lane, 0x88) argument
1719 #define CHV_TX_DW3(ch, lane) _TXLANE(ch, lane, 0x8c) argument
1720 #define CHV_TX_DW4(ch, lane) _TXLANE(ch, lane, 0x90) argument
1721 #define CHV_TX_DW5(ch, lane) _TXLANE(ch, lane, 0x94) argument
1722 #define CHV_TX_DW6(ch, lane) _TXLANE(ch, lane, 0x98) argument
1723 #define CHV_TX_DW7(ch, lane) _TXLANE(ch, lane, 0x9c) argument
1724 #define CHV_TX_DW8(ch, lane) _TXLANE(ch, lane, 0xa0) argument
[all …]
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/ |
| H A D | omp-low.c | 4142 tree lane; variable
9211 tree lane = NULL_TREE; in lower_omp_scan() local
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/gcn/ |
| H A D | gcn.c | 2651 int lane = saved_scalars % 64; in move_callee_saved_registers() local
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/arm/ |
| H A D | arm.c | 13212 HOST_WIDE_INT lane; in bounds_check() local
13563 int lane = INTVAL (operands[4]); in neon_vcmla_lane_prepare_operands() local
30811 neon_endian_lane_map (machine_mode mode, int lane) in neon_endian_lane_map()
30829 neon_pair_endian_lane_map (machine_mode mode, int lane) in neon_pair_endian_lane_map()
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