| /dflybsd-src/sys/dev/drm/amd/display/dc/core/ |
| H A D | dc_link_dp.c | 173 uint32_t lane; in dpcd_set_lt_pattern_and_lane_settings() local
259 uint32_t lane; in is_cr_done() local
274 uint32_t lane; in is_ch_eq_done() local
292 uint32_t lane; in update_drive_settings() local
334 uint32_t lane; in find_max_drive_settings() local
434 uint32_t lane; in get_lane_status_and_drive_settings() local
508 uint32_t lane; in dpcd_set_lane_settings() local
569 uint32_t lane; in is_max_vs_reached() local
602 uint32_t lane; in perform_post_lt_adj_req_sequence() local
788 uint32_t lane; in perform_clock_recovery_sequence() local
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| /dflybsd-src/sys/dev/drm/i915/ |
| H A D | intel_dp_link_training.c | 41 int lane; in intel_get_adjust_train() local
117 int lane; in intel_dp_link_max_vswing_reached() local
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| H A D | intel_dpio_phy.c | 595 int lane; in bxt_ddi_phy_set_lane_optim_mask() local
622 int lane; in bxt_ddi_phy_get_lane_lat_optim_mask() local
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| H A D | i915_reg.h | 1737 #define _TXLANE(ch, lane, offset) ((ch ? 0x2400 : 0) + \ argument
1740 #define CHV_TX_DW0(ch, lane) _TXLANE(ch, lane, 0x80) argument
1741 #define CHV_TX_DW1(ch, lane) _TXLANE(ch, lane, 0x84) argument
1742 #define CHV_TX_DW2(ch, lane) _TXLANE(ch, lane, 0x88) argument
1743 #define CHV_TX_DW3(ch, lane) _TXLANE(ch, lane, 0x8c) argument
1744 #define CHV_TX_DW4(ch, lane) _TXLANE(ch, lane, 0x90) argument
1745 #define CHV_TX_DW5(ch, lane) _TXLANE(ch, lane, 0x94) argument
1746 #define CHV_TX_DW6(ch, lane) _TXLANE(ch, lane, 0x98) argument
1747 #define CHV_TX_DW7(ch, lane) _TXLANE(ch, lane, 0x9c) argument
1748 #define CHV_TX_DW8(ch, lane) _TXLANE(ch, lane, 0xa0) argument
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| H A D | intel_display.c | 6142 int lane, link_bw, fdi_dotclock, ret; in ironlake_fdi_compute_config() local
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| /dflybsd-src/sys/dev/drm/ |
| H A D | drm_dp_helper.c | 52 int lane) in dp_get_lane_status()
65 int lane; in drm_dp_channel_eq_ok() local
83 int lane; in drm_dp_clock_recovery_ok() local
96 int lane) in drm_dp_get_adjust_request_voltage()
109 int lane) in drm_dp_get_adjust_request_pre_emphasis()
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| /dflybsd-src/sys/dev/drm/amd/amdgpu/ |
| H A D | atombios_dp.c | 212 int lane; in amdgpu_atombios_dp_get_adjust_train() local
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| /dflybsd-src/sys/dev/drm/radeon/ |
| H A D | atombios_dp.c | 262 int lane; in dp_get_adjust_train() local
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| /dflybsd-src/sys/dev/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_link_encoder.c | 1041 int32_t lane = 0; in dcn10_link_encoder_dp_set_lane_settings() local
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| /dflybsd-src/sys/dev/drm/amd/display/dc/dce/ |
| H A D | dce_link_encoder.c | 1088 int32_t lane = 0; in dce110_link_encoder_dp_set_lane_settings() local
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| /dflybsd-src/contrib/gcc-8.0/gcc/ |
| H A D | omp-low.c | 3493 tree lane; member
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