1 /* $NetBSD: ixp12x0_pci_dma.c,v 1.10 2022/09/27 06:36:42 skrll Exp $ */
2 /*
3 * Copyright (c) 2002, 2003
4 * Ichiro FUKUHARA <ichiro@ichiro.org>.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: ixp12x0_pci_dma.c,v 1.10 2022/09/27 06:36:42 skrll Exp $");
31
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/device.h>
35 #include <sys/mbuf.h>
36
37 #include <uvm/uvm_extern.h>
38
39 #define _ARM32_BUS_DMA_PRIVATE
40 #include <sys/bus.h>
41
42 #include <arm/ixp12x0/ixp12x0_pcireg.h>
43 #include <arm/ixp12x0/ixp12x0var.h>
44
45 void
ixp12x0_pci_dma_init(struct ixp12x0_softc * sc)46 ixp12x0_pci_dma_init(struct ixp12x0_softc *sc)
47 {
48 extern paddr_t physical_start, physical_end;
49
50 bus_dma_tag_t dmat = &sc->ia_pci_dmat;
51 struct arm32_dma_range *dr = &sc->ia_pci_dma_range;
52
53 dmat->_ranges = dr;
54 dmat->_nranges = 1;
55
56 dr->dr_sysbase = physical_start;
57 dr->dr_busbase = PCI_MAPREG_MEM_ADDR(IXP1200_PCI_MEM_BAR +
58 physical_start);
59 dr->dr_len = physical_end - physical_start;
60
61 dmat->_dmamap_create = _bus_dmamap_create;
62 dmat->_dmamap_destroy = _bus_dmamap_destroy;
63 dmat->_dmamap_load = _bus_dmamap_load;
64 dmat->_dmamap_load_mbuf = _bus_dmamap_load_mbuf;
65 dmat->_dmamap_load_uio = _bus_dmamap_load_uio;
66 dmat->_dmamap_load_raw = _bus_dmamap_load_raw;
67 dmat->_dmamap_unload = _bus_dmamap_unload;
68 dmat->_dmamap_sync_pre = _bus_dmamap_sync;
69 dmat->_dmamap_sync_post = NULL;
70
71 dmat->_dmamem_alloc = _bus_dmamem_alloc;
72 dmat->_dmamem_free = _bus_dmamem_free;
73 dmat->_dmamem_map = _bus_dmamem_map;
74 dmat->_dmamem_unmap = _bus_dmamem_unmap;
75 dmat->_dmamem_mmap = _bus_dmamem_mmap;
76
77 dmat->_dmatag_subregion = _bus_dmatag_subregion;
78 dmat->_dmatag_destroy = _bus_dmatag_destroy;
79 }
80