/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCCCState.h | 33 PPCCCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF, in PPCCCState()
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H A D | PPCISelLowering.h | 1117 functionArgumentNeedsConsecutiveRegisters(Type * Ty,CallingConv::ID CallConv,bool isVarArg,const DataLayout & DL) functionArgumentNeedsConsecutiveRegisters() argument [all...] |
H A D | PPCISelLowering.cpp | 4238 return LowerFormalArguments_64SVR4(Chain, CallConv, isVarArg, Ins, dl, DAG, in LowerFormalArguments_32SVR4() argument 4223 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument 4503 LowerFormalArguments_64SVR4(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments_64SVR4() argument 5060 IsEligibleForTailCallOptimization_64SVR4(const GlobalValue * CalleeGV,CallingConv::ID CalleeCC,CallingConv::ID CallerCC,const CallBase * CB,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<ISD::InputArg> & Ins,const Function * CallerFunc,bool isCalleeExternalSymbol) const IsEligibleForTailCallOptimization_64SVR4() argument 5147 IsEligibleForTailCallOptimization(const GlobalValue * CalleeGV,CallingConv::ID CalleeCC,CallingConv::ID CallerCC,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins) const IsEligibleForTailCallOptimization() argument 5355 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCallResult() argument 5885 isEligibleForTCO(const GlobalValue * CalleeGV,CallingConv::ID CalleeCC,CallingConv::ID CallerCC,const CallBase * CB,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<ISD::InputArg> & Ins,const Function * CallerFunc,bool isCalleeExternalSymbol) const isEligibleForTCO() argument 5913 bool isVarArg = CLI.IsVarArg; LowerCall() local 7197 LowerFormalArguments_AIX(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments_AIX() argument 7818 CanLowerReturn(CallingConv::ID CallConv,MachineFunction & MF,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,LLVMContext & Context) const CanLowerReturn() argument 7831 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument [all...] |
/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 568 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument 597 bool isVarArg = CLI.IsVarArg; LowerCall() local 619 LowerCCCArguments(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCArguments() argument 736 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument 806 LowerCCCCallTo(SDValue Chain,SDValue Callee,CallingConv::ID CallConv,bool isVarArg,bool isTailCall,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCCallTo() argument 935 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCallResult() argument [all...] |
/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsCCState.h | 101 : CCState(CC, isVarArg, MF, locs, C), SpecialCallingConv(SpecialCC) {} in CCState() argument
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/llvm-project/mlir/lib/Dialect/LLVMIR/IR/ |
H A D | FunctionCallUtils.cpp | 51 bool isVarArg, bool isReserved) { in lookupOrCreateFn() argument
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H A D | LLVMTypes.cpp | 37 bool &isVarArg) { in parseFunctionTypes() argument 67 bool isVarArg) { in printFunctionTypes() argument 219 bool isVarArg) { in get() argument 227 bool isVarArg) { in getChecked() argument [all...] |
H A D | LLVMDialect.cpp | 1170 bool isVarArg = false; print() local 1294 bool isVarArg = parser.parseOptionalKeyword("vararg").succeeded(); parse() local 1401 bool isVarArg = false; print() local 1477 bool isVarArg = parser.parseOptionalKeyword("vararg").succeeded(); parse() local [all...] |
/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 951 bool isVarArg = CLI.IsVarArg; in LowerCall() local 1017 LowerCCCCallTo(SDValue Chain,SDValue Callee,CallingConv::ID CallConv,bool isVarArg,bool isTailCall,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCCallTo() argument 1149 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument 1168 LowerCCCArguments(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCArguments() argument 1327 CanLowerReturn(CallingConv::ID CallConv,MachineFunction & MF,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,LLVMContext & Context) const CanLowerReturn() argument 1341 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument [all...] |
/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZCallingConv.h | 47 SystemZCCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF, in SystemZCCState() argument
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/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRISelLowering.cpp | 1384 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument 1494 bool isVarArg = CLI.IsVarArg; LowerCall() local 1662 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCallResult() argument 1695 CanLowerReturn(CallingConv::ID CallConv,MachineFunction & MF,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,LLVMContext & Context) const CanLowerReturn() argument 1709 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument [all...] |
/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLoweringCall.cpp | 662 CanLowerReturn(CallingConv::ID CallConv,MachineFunction & MF,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,LLVMContext & Context) const CanLowerReturn() argument 736 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument 1094 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals,uint32_t * RegMask) const LowerCallResult() argument 2003 bool isVarArg = CLI.IsVarArg; LowerCall() local 2739 bool isVarArg = CLI.IsVarArg; IsEligibleForTailCallOptimization() local [all...] |
/llvm-project/llvm/lib/IR/ |
H A D | Type.cpp | 329 get(Type * ReturnType,ArrayRef<Type * > Params,bool isVarArg) get() argument 354 get(Type * Result,bool isVarArg) get() argument
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H A D | Function.cpp | 1761 matchIntrinsicVarArg(bool isVarArg,ArrayRef<Intrinsic::IITDescriptor> & Infos) matchIntrinsicVarArg() argument
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/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 1882 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, ArgLocs, *Context); in ProcessCallArgs() argument 1829 CCAssignFnForCall(CallingConv::ID CC,bool Return,bool isVarArg) CCAssignFnForCall() argument 2023 FinishCall(MVT RetVT,SmallVectorImpl<Register> & UsedRegs,const Instruction * I,CallingConv::ID CC,unsigned & NumBytes,bool isVarArg) FinishCall() argument 2310 bool isVarArg = FTy->isVarArg(); SelectCall() local [all...] |
H A D | ARMFrameLowering.cpp | 1604 emitPopInst(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,MutableArrayRef<CalleeSavedInfo> CSI,unsigned LdmOpc,unsigned LdrOpc,bool isVarArg,bool NoGap,bool (* Func)(unsigned,bool),unsigned NumAlignedDPRCS2Regs) const emitPopInst() argument 2041 bool isVarArg = AFI->getArgRegsSaveSize() > 0; restoreCalleeSavedRegisters() local
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H A D | ARMISelLowering.cpp | 2218 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals,bool isThisReturn,SDValue ThisVal,bool isCmseNSCall) const LowerCallResult() argument 2392 bool isVarArg = CLI.IsVarArg; LowerCall() local 3030 bool isVarArg = CLI.IsVarArg; IsEligibleForTailCallOptimization() local 3165 CanLowerReturn(CallingConv::ID CallConv,MachineFunction & MF,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,LLVMContext & Context) const CanLowerReturn() argument 3208 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument 4508 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument 22045 functionArgumentNeedsConsecutiveRegisters(Type * Ty,CallingConv::ID CallConv,bool isVarArg,const DataLayout & DL) const functionArgumentNeedsConsecutiveRegisters() argument [all...] |
/llvm-project/llvm/include/llvm/IR/ |
H A D | Function.h | 225 bool isVarArg() const { return getFunctionType()->isVarArg(); } isVarArg() function
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H A D | DerivedTypes.h | 123 bool isVarArg() const { return getSubclassData()!=0; } isVarArg() function
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/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | CallingConvLower.h | 242 bool isVarArg() const { return IsVarArg; } in isVarArg() function
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/llvm-project/mlir/lib/CAPI/Dialect/ |
H A D | LLVM.cpp | 47 mlirLLVMFunctionTypeGet(MlirType resultType,intptr_t nArgumentTypes,MlirType const * argumentTypes,bool isVarArg) mlirLLVMFunctionTypeGet() argument
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/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 236 CallingConv::ID CallConv, MachineFunction &MF, bool isVarArg, in CanLowerReturn() argument 833 bool isVarArg = CLI.IsVarArg; in LowerCall_32() local 432 LowerFormalArguments_32(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments_32() argument
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/llvm-project/llvm/examples/ExceptionDemo/ |
H A D | ExceptionDemo.cpp | 169 createFunction(llvm::Module & module,llvm::Type * retType,const ArgTypes & theArgTypes,const ArgNames & theArgNames,const std::string & functName,llvm::GlobalValue::LinkageTypes linkage,bool declarationOnly,bool isVarArg) createFunction() argument
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/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600ISelLowering.cpp | 1457 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument
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/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 3163 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument 3388 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument
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