1 //===--- AArch64Subtarget.h - Define Subtarget for the AArch64 -*- C++ -*--===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file declares the AArch64 specific subclass of TargetSubtarget. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64SUBTARGET_H 15 #define LLVM_LIB_TARGET_AARCH64_AARCH64SUBTARGET_H 16 17 #include "AArch64FrameLowering.h" 18 #include "AArch64ISelLowering.h" 19 #include "AArch64InstrInfo.h" 20 #include "AArch64RegisterInfo.h" 21 #include "AArch64SelectionDAGInfo.h" 22 #include "llvm/IR/DataLayout.h" 23 #include "llvm/Target/TargetSubtargetInfo.h" 24 #include <string> 25 26 #define GET_SUBTARGETINFO_HEADER 27 #include "AArch64GenSubtargetInfo.inc" 28 29 namespace llvm { 30 class GlobalValue; 31 class StringRef; 32 33 class AArch64Subtarget : public AArch64GenSubtargetInfo { 34 protected: 35 enum ARMProcFamilyEnum {Others, CortexA53, CortexA57, Cyclone}; 36 37 /// ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others. 38 ARMProcFamilyEnum ARMProcFamily; 39 40 bool HasFPARMv8; 41 bool HasNEON; 42 bool HasCrypto; 43 bool HasCRC; 44 45 // HasZeroCycleRegMove - Has zero-cycle register mov instructions. 46 bool HasZeroCycleRegMove; 47 48 // HasZeroCycleZeroing - Has zero-cycle zeroing instructions. 49 bool HasZeroCycleZeroing; 50 51 /// CPUString - String name of used CPU. 52 std::string CPUString; 53 54 /// TargetTriple - What processor and OS we're targeting. 55 Triple TargetTriple; 56 57 const DataLayout DL; 58 AArch64FrameLowering FrameLowering; 59 AArch64InstrInfo InstrInfo; 60 AArch64SelectionDAGInfo TSInfo; 61 AArch64TargetLowering TLInfo; 62 private: 63 /// initializeSubtargetDependencies - Initializes using CPUString and the 64 /// passed in feature string so that we can use initializer lists for 65 /// subtarget initialization. 66 AArch64Subtarget &initializeSubtargetDependencies(StringRef FS); 67 68 public: 69 /// This constructor initializes the data members to match that 70 /// of the specified triple. 71 AArch64Subtarget(const std::string &TT, const std::string &CPU, 72 const std::string &FS, const TargetMachine &TM, 73 bool LittleEndian); 74 getSelectionDAGInfo()75 const AArch64SelectionDAGInfo *getSelectionDAGInfo() const override { 76 return &TSInfo; 77 } getFrameLowering()78 const AArch64FrameLowering *getFrameLowering() const override { 79 return &FrameLowering; 80 } getTargetLowering()81 const AArch64TargetLowering *getTargetLowering() const override { 82 return &TLInfo; 83 } getInstrInfo()84 const AArch64InstrInfo *getInstrInfo() const override { return &InstrInfo; } getDataLayout()85 const DataLayout *getDataLayout() const override { return &DL; } getRegisterInfo()86 const AArch64RegisterInfo *getRegisterInfo() const override { 87 return &getInstrInfo()->getRegisterInfo(); 88 } enableMachineScheduler()89 bool enableMachineScheduler() const override { return true; } enablePostMachineScheduler()90 bool enablePostMachineScheduler() const override { 91 return isCortexA53() || isCortexA57(); 92 } 93 hasZeroCycleRegMove()94 bool hasZeroCycleRegMove() const { return HasZeroCycleRegMove; } 95 hasZeroCycleZeroing()96 bool hasZeroCycleZeroing() const { return HasZeroCycleZeroing; } 97 hasFPARMv8()98 bool hasFPARMv8() const { return HasFPARMv8; } hasNEON()99 bool hasNEON() const { return HasNEON; } hasCrypto()100 bool hasCrypto() const { return HasCrypto; } hasCRC()101 bool hasCRC() const { return HasCRC; } 102 isLittleEndian()103 bool isLittleEndian() const { return DL.isLittleEndian(); } 104 isTargetDarwin()105 bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); } isTargetIOS()106 bool isTargetIOS() const { return TargetTriple.isiOS(); } isTargetLinux()107 bool isTargetLinux() const { return TargetTriple.isOSLinux(); } isTargetWindows()108 bool isTargetWindows() const { return TargetTriple.isOSWindows(); } 109 isTargetCOFF()110 bool isTargetCOFF() const { return TargetTriple.isOSBinFormatCOFF(); } isTargetELF()111 bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); } isTargetMachO()112 bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); } 113 isCyclone()114 bool isCyclone() const { return CPUString == "cyclone"; } isCortexA57()115 bool isCortexA57() const { return CPUString == "cortex-a57"; } isCortexA53()116 bool isCortexA53() const { return CPUString == "cortex-a53"; } 117 useAA()118 bool useAA() const override { return isCortexA53(); } 119 120 /// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size 121 /// that still makes it profitable to inline the call. getMaxInlineSizeThreshold()122 unsigned getMaxInlineSizeThreshold() const { return 64; } 123 124 /// ParseSubtargetFeatures - Parses features string setting specified 125 /// subtarget options. Definition of function is auto generated by tblgen. 126 void ParseSubtargetFeatures(StringRef CPU, StringRef FS); 127 128 /// ClassifyGlobalReference - Find the target operand flags that describe 129 /// how a global value should be referenced for the current subtarget. 130 unsigned char ClassifyGlobalReference(const GlobalValue *GV, 131 const TargetMachine &TM) const; 132 133 /// This function returns the name of a function which has an interface 134 /// like the non-standard bzero function, if such a function exists on 135 /// the current subtarget and it is considered prefereable over 136 /// memset with zero passed as the second argument. Otherwise it 137 /// returns null. 138 const char *getBZeroEntry() const; 139 140 void overrideSchedPolicy(MachineSchedPolicy &Policy, MachineInstr *begin, 141 MachineInstr *end, 142 unsigned NumRegionInstrs) const override; 143 144 bool enableEarlyIfConversion() const override; 145 146 std::unique_ptr<PBQPRAConstraint> getCustomPBQPConstraints() const override; 147 }; 148 } // End llvm namespace 149 150 #endif 151