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Searched defs:intrq (Results 1 – 18 of 18) sorted by relevance

/netbsd-src/sys/arch/arm/at91/
H A Dat91aicvar.h42 struct intrq { struct
44 struct evcnt iq_ev; /* event counter */
45 uint32_t iq_levels; /* IPL_*'s this IRQ has */
46 char iq_name[IRQNAMESIZE]; /* interrupt name */
47 int iq_type; /* interrupt request type: */
53 volatile int iq_busy; /* set if irq is busy */
H A Dat91aic.c65 struct intrq intrq[NIRQ]; variable
/netbsd-src/sys/arch/arm/ep93xx/
H A Dep93xxvar.h47 struct intrq { struct
49 struct evcnt iq_ev; /* event counter */
50 uint32_t iq_vic1_mask; /* VIC1 IRQs to mask while handling */
51 uint32_t iq_vic2_mask; /* VIC2 IRQs to mask while handling */
52 uint32_t iq_levels; /* IPL_*'s this IRQ has */
53 char iq_name[IRQNAMESIZE]; /* interrupt name */
54 int iq_ist; /* share type */
H A Dep93xx_intr.c57 struct intrq intrq[NIRQ]; variable
/netbsd-src/sys/arch/evbarm/iq80310/
H A Diq80310var.h69 struct intrq { struct
71 struct evcnt iq_ev; /* event counter */
72 int iq_mask; /* IRQs to mask while handling */
73 int iq_levels; /* IPL_*'s this IRQ has */
74 int iq_ist; /* share type */
75 char iq_name[IRQNAMESIZE]; /* interrupt name */
H A Diq80310_intr.c66 struct intrq intrq[NIRQ]; variable
/netbsd-src/sys/arch/arm/ixp12x0/
H A Dixp12x0var.h69 struct intrq { struct
71 struct evcnt iq_ev; /* event counter */
72 uint32_t iq_mask; /* IRQs to mask while handling */
73 uint32_t iq_pci_mask; /* PCI IRQs to mask while handling */
74 uint32_t iq_levels; /* IPL_*'s this IRQ has */
75 char iq_name[IRQNAMESIZE]; /* interrupt name */
76 int iq_ist; /* share type */
H A Dixp12x0_intr.c60 struct intrq intrq[NIRQ]; variable
/netbsd-src/sys/arch/arm/footbridge/
H A Dfootbridge_intr.h200 struct intrq { struct
202 struct evcnt iq_ev; /* event counter */
203 int iq_mask; /* IRQs to mask while handling */
204 int iq_levels; /* IPL_*'s this IRQ has */
205 int iq_ist; /* share type */
206 int iq_ipl; /* max ipl */
207 char iq_name[IRQNAMESIZE]; /* interrupt name */
/netbsd-src/sys/arch/arm/xscale/
H A Dbeccvar.h57 struct intrq { struct
59 struct evcnt iq_ev; /* event counter */
60 int iq_mask; /* IRQs to mask while handling */
61 int iq_levels; /* IPL_*'s this IRQ has */
62 int iq_ist; /* share type */
H A Dixp425var.h108 struct intrq { struct
110 struct evcnt iq_ev; /* event counter */
111 uint32_t iq_mask; /* IRQs to mask while handling */
112 uint32_t iq_pci_mask; /* PCI IRQs to mask while handling */
113 uint32_t iq_levels; /* IPL_*'s this IRQ has */
114 char iq_name[IRQNAMESIZE]; /* interrupt name */
115 int iq_ist; /* share type */
H A Di80321var.h59 struct intrq { struct
61 struct evcnt iq_ev; /* event counter */
62 int iq_ist; /* share type */
H A Dbecc_icu.c66 struct intrq intrq[NIRQ]; variable
H A Di80321_icu.c64 struct intrq intrq[NIRQ]; variable
H A Dixp425_intr.c88 struct intrq intrq[NIRQ]; variable
/netbsd-src/sys/arch/evbarm/ifpga/
H A Difpgavar.h96 struct intrq { struct
98 struct evcnt iq_ev; /* event counter */
99 int iq_mask; /* IRQs to mask while handling */
100 int iq_levels; /* IPL_*'s this IRQ has */
101 int iq_ist; /* share type */
H A Difpga_intr.c58 struct intrq intrq[NIRQ]; variable
/netbsd-src/usr.bin/netstat/
H A Dmain.c768 struct ifqueue intrq, *ifq = &intrq; in print_softintrq() local