1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2022 Intel Corporation 3 */ 4 5 #ifndef _QAT_CRYPTO_H_ 6 #define _QAT_CRYPTO_H_ 7 8 #include <rte_cryptodev.h> 9 10 #include "qat_device.h" 11 12 extern uint8_t qat_sym_driver_id; 13 extern uint8_t qat_asym_driver_id; 14 15 /** 16 * helper macro to set cryptodev capability range 17 * <n: name> <l: min > <r: max> <i: increment> <v: value> 18 **/ 19 #define CAP_RNG(n, l, r, i) .n = {.min = l, .max = r, .increment = i} 20 21 #define CAP_RNG_ZERO(n) .n = {.min = 0, .max = 0, .increment = 0} 22 /** helper macro to set cryptodev capability value **/ 23 #define CAP_SET(n, v) .n = v 24 25 /** private data structure for a QAT device. 26 * there can be one of these on each qat_pci_device (VF). 27 */ 28 struct qat_cryptodev_private { 29 struct qat_pci_device *qat_dev; 30 /**< The qat pci device hosting the service */ 31 uint8_t dev_id; 32 /**< Device instance for this rte_cryptodev */ 33 const struct rte_cryptodev_capabilities *qat_dev_capabilities; 34 /* QAT device symmetric crypto capabilities */ 35 const struct rte_memzone *capa_mz; 36 /* Shared memzone for storing capabilities */ 37 uint16_t min_enq_burst_threshold; 38 uint32_t internal_capabilities; /* see flags QAT_SYM_CAP_xxx */ 39 bool cipher_crc_offload_enable; 40 enum qat_service_type service_type; 41 }; 42 43 struct qat_capabilities_info { 44 struct rte_cryptodev_capabilities *data; 45 uint64_t size; 46 }; 47 48 typedef int (*get_capabilities_info_t)(struct qat_cryptodev_private *internals, 49 const char *capa_memz_name, uint16_t slice_map); 50 51 typedef uint64_t (*get_feature_flags_t)(struct qat_pci_device *qat_dev); 52 53 typedef void * (*create_security_ctx_t)(void *cryptodev); 54 55 typedef int (*set_session_t)(void *cryptodev, void *session); 56 57 typedef int (*set_raw_dp_ctx_t)(void *raw_dp_ctx, void *ctx); 58 59 struct qat_crypto_gen_dev_ops { 60 get_feature_flags_t get_feature_flags; 61 get_capabilities_info_t get_capabilities; 62 struct rte_cryptodev_ops *cryptodev_ops; 63 set_session_t set_session; 64 set_raw_dp_ctx_t set_raw_dp_ctx; 65 create_security_ctx_t create_security_ctx; 66 }; 67 68 extern struct qat_crypto_gen_dev_ops qat_sym_gen_dev_ops[]; 69 extern struct qat_crypto_gen_dev_ops qat_asym_gen_dev_ops[]; 70 71 int 72 qat_cryptodev_config(struct rte_cryptodev *dev, 73 struct rte_cryptodev_config *config); 74 75 int 76 qat_cryptodev_start(struct rte_cryptodev *dev); 77 78 void 79 qat_cryptodev_stop(struct rte_cryptodev *dev); 80 81 int 82 qat_cryptodev_close(struct rte_cryptodev *dev); 83 84 void 85 qat_cryptodev_info_get(struct rte_cryptodev *dev, 86 struct rte_cryptodev_info *info); 87 88 void 89 qat_cryptodev_stats_get(struct rte_cryptodev *dev, 90 struct rte_cryptodev_stats *stats); 91 92 void 93 qat_cryptodev_stats_reset(struct rte_cryptodev *dev); 94 95 int 96 qat_cryptodev_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id, 97 const struct rte_cryptodev_qp_conf *qp_conf, int socket_id); 98 99 int 100 qat_cryptodev_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id); 101 102 #endif 103