1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2021 Intel Corporation 4 */ 5 6 #include "gem/i915_gem_lmem.h" 7 #include "gem/i915_gem_region.h" 8 #include "i915_drv.h" 9 #include "intel_atomic_plane.h" 10 #include "intel_crtc.h" 11 #include "intel_display.h" 12 #include "intel_display_types.h" 13 #include "intel_fb.h" 14 #include "intel_plane_initial.h" 15 16 static bool 17 intel_reuse_initial_plane_obj(struct intel_crtc *this, 18 const struct intel_initial_plane_config plane_configs[], 19 struct drm_framebuffer **fb, 20 struct i915_vma **vma) 21 { 22 struct drm_i915_private *i915 = to_i915(this->base.dev); 23 struct intel_crtc *crtc; 24 25 for_each_intel_crtc(&i915->drm, crtc) { 26 struct intel_plane *plane = 27 to_intel_plane(crtc->base.primary); 28 const struct intel_plane_state *plane_state = 29 to_intel_plane_state(plane->base.state); 30 const struct intel_crtc_state *crtc_state = 31 to_intel_crtc_state(crtc->base.state); 32 33 if (!crtc_state->uapi.active) 34 continue; 35 36 if (!plane_state->ggtt_vma) 37 continue; 38 39 if (plane_configs[this->pipe].base == plane_configs[crtc->pipe].base) { 40 *fb = plane_state->hw.fb; 41 *vma = plane_state->ggtt_vma; 42 return true; 43 } 44 } 45 46 return false; 47 } 48 49 static bool 50 initial_plane_phys_lmem(struct drm_i915_private *i915, 51 struct intel_initial_plane_config *plane_config) 52 { 53 gen8_pte_t __iomem *gte = to_gt(i915)->ggtt->gsm; 54 struct intel_memory_region *mem; 55 dma_addr_t dma_addr; 56 gen8_pte_t pte; 57 u32 base; 58 59 base = round_down(plane_config->base, I915_GTT_MIN_ALIGNMENT); 60 61 gte += base / I915_GTT_PAGE_SIZE; 62 63 pte = ioread64(gte); 64 if (!(pte & GEN12_GGTT_PTE_LM)) { 65 drm_err(&i915->drm, 66 "Initial plane programming missing PTE_LM bit\n"); 67 return false; 68 } 69 70 dma_addr = pte & GEN12_GGTT_PTE_ADDR_MASK; 71 72 if (IS_DGFX(i915)) 73 mem = i915->mm.regions[INTEL_REGION_LMEM_0]; 74 else 75 mem = i915->mm.stolen_region; 76 if (!mem) { 77 drm_dbg_kms(&i915->drm, 78 "Initial plane memory region not initialized\n"); 79 return false; 80 } 81 82 /* 83 * On lmem we don't currently expect this to 84 * ever be placed in the stolen portion. 85 */ 86 if (dma_addr < mem->region.start || dma_addr > mem->region.end) { 87 drm_err(&i915->drm, 88 "Initial plane programming using invalid range, dma_addr=%pa (%s [%pa-%pa])\n", 89 &dma_addr, mem->region.name, &mem->region.start, &mem->region.end); 90 return false; 91 } 92 93 drm_dbg(&i915->drm, 94 "Using dma_addr=%pa, based on initial plane programming\n", 95 &dma_addr); 96 97 plane_config->phys_base = dma_addr - mem->region.start; 98 plane_config->mem = mem; 99 100 return true; 101 } 102 103 static bool 104 initial_plane_phys_smem(struct drm_i915_private *i915, 105 struct intel_initial_plane_config *plane_config) 106 { 107 struct intel_memory_region *mem; 108 u32 base; 109 110 base = round_down(plane_config->base, I915_GTT_MIN_ALIGNMENT); 111 112 mem = i915->mm.stolen_region; 113 if (!mem) { 114 drm_dbg_kms(&i915->drm, 115 "Initial plane memory region not initialized\n"); 116 return false; 117 } 118 119 /* FIXME get and validate the dma_addr from the PTE */ 120 plane_config->phys_base = base; 121 plane_config->mem = mem; 122 123 return true; 124 } 125 126 static bool 127 initial_plane_phys(struct drm_i915_private *i915, 128 struct intel_initial_plane_config *plane_config) 129 { 130 if (IS_DGFX(i915) || HAS_LMEMBAR_SMEM_STOLEN(i915)) 131 return initial_plane_phys_lmem(i915, plane_config); 132 else 133 return initial_plane_phys_smem(i915, plane_config); 134 } 135 136 static struct i915_vma * 137 initial_plane_vma(struct drm_i915_private *i915, 138 struct intel_initial_plane_config *plane_config) 139 { 140 struct intel_memory_region *mem; 141 struct drm_i915_gem_object *obj; 142 struct drm_mm_node orig_mm = {}; 143 struct i915_vma *vma; 144 resource_size_t phys_base; 145 u32 base, size; 146 u64 pinctl; 147 148 if (plane_config->size == 0) 149 return NULL; 150 151 if (!initial_plane_phys(i915, plane_config)) 152 return NULL; 153 154 phys_base = plane_config->phys_base; 155 mem = plane_config->mem; 156 157 base = round_down(plane_config->base, I915_GTT_MIN_ALIGNMENT); 158 size = round_up(plane_config->base + plane_config->size, 159 mem->min_page_size); 160 size -= base; 161 162 /* 163 * If the FB is too big, just don't use it since fbdev is not very 164 * important and we should probably use that space with FBC or other 165 * features. 166 */ 167 if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) && 168 mem == i915->mm.stolen_region && 169 size * 2 > i915->dsm.usable_size) { 170 drm_dbg_kms(&i915->drm, "Initial FB size exceeds half of stolen, discarding\n"); 171 return NULL; 172 } 173 174 obj = i915_gem_object_create_region_at(mem, phys_base, size, 175 I915_BO_ALLOC_USER | 176 I915_BO_PREALLOC); 177 if (IS_ERR(obj)) { 178 drm_dbg_kms(&i915->drm, "Failed to preallocate initial FB in %s\n", 179 mem->region.name); 180 return NULL; 181 } 182 183 /* 184 * Mark it WT ahead of time to avoid changing the 185 * cache_level during fbdev initialization. The 186 * unbind there would get stuck waiting for rcu. 187 */ 188 i915_gem_object_set_cache_coherency(obj, HAS_WT(i915) ? 189 I915_CACHE_WT : I915_CACHE_NONE); 190 191 switch (plane_config->tiling) { 192 case I915_TILING_NONE: 193 break; 194 case I915_TILING_X: 195 case I915_TILING_Y: 196 obj->tiling_and_stride = 197 plane_config->fb->base.pitches[0] | 198 plane_config->tiling; 199 break; 200 default: 201 MISSING_CASE(plane_config->tiling); 202 goto err_obj; 203 } 204 205 /* 206 * MTL GOP likes to place the framebuffer high up in ggtt, 207 * which can cause problems for ggtt_reserve_guc_top(). 208 * Try to pin it to a low ggtt address instead to avoid that. 209 */ 210 base = 0; 211 212 if (base != plane_config->base) { 213 struct i915_ggtt *ggtt = to_gt(i915)->ggtt; 214 int ret; 215 216 /* 217 * Make sure the original and new locations 218 * can't overlap. That would corrupt the original 219 * PTEs which are still being used for scanout. 220 */ 221 ret = i915_gem_gtt_reserve(&ggtt->vm, NULL, &orig_mm, 222 size, plane_config->base, 223 I915_COLOR_UNEVICTABLE, PIN_NOEVICT); 224 if (ret) 225 goto err_obj; 226 } 227 228 vma = i915_vma_instance(obj, &to_gt(i915)->ggtt->vm, NULL); 229 if (IS_ERR(vma)) 230 goto err_obj; 231 232 retry: 233 pinctl = PIN_GLOBAL | PIN_OFFSET_FIXED | base; 234 if (!i915_gem_object_is_lmem(obj)) 235 pinctl |= PIN_MAPPABLE; 236 if (i915_vma_pin(vma, 0, 0, pinctl)) { 237 if (drm_mm_node_allocated(&orig_mm)) { 238 drm_mm_remove_node(&orig_mm); 239 /* 240 * Try again, but this time pin 241 * it to its original location. 242 */ 243 base = plane_config->base; 244 goto retry; 245 } 246 goto err_obj; 247 } 248 249 if (i915_gem_object_is_tiled(obj) && 250 !i915_vma_is_map_and_fenceable(vma)) 251 goto err_obj; 252 253 if (drm_mm_node_allocated(&orig_mm)) 254 drm_mm_remove_node(&orig_mm); 255 256 drm_dbg_kms(&i915->drm, 257 "Initial plane fb bound to 0x%x in the ggtt (original 0x%x)\n", 258 i915_ggtt_offset(vma), plane_config->base); 259 260 return vma; 261 262 err_obj: 263 if (drm_mm_node_allocated(&orig_mm)) 264 drm_mm_remove_node(&orig_mm); 265 i915_gem_object_put(obj); 266 return NULL; 267 } 268 269 static bool 270 intel_alloc_initial_plane_obj(struct intel_crtc *crtc, 271 struct intel_initial_plane_config *plane_config) 272 { 273 struct drm_device *dev = crtc->base.dev; 274 struct drm_i915_private *dev_priv = to_i915(dev); 275 struct drm_mode_fb_cmd2 mode_cmd = { 0 }; 276 struct drm_framebuffer *fb = &plane_config->fb->base; 277 struct i915_vma *vma; 278 279 switch (fb->modifier) { 280 case DRM_FORMAT_MOD_LINEAR: 281 case I915_FORMAT_MOD_X_TILED: 282 case I915_FORMAT_MOD_Y_TILED: 283 case I915_FORMAT_MOD_4_TILED: 284 break; 285 default: 286 drm_dbg(&dev_priv->drm, 287 "Unsupported modifier for initial FB: 0x%llx\n", 288 fb->modifier); 289 return false; 290 } 291 292 vma = initial_plane_vma(dev_priv, plane_config); 293 if (!vma) 294 return false; 295 296 mode_cmd.pixel_format = fb->format->format; 297 mode_cmd.width = fb->width; 298 mode_cmd.height = fb->height; 299 mode_cmd.pitches[0] = fb->pitches[0]; 300 mode_cmd.modifier[0] = fb->modifier; 301 mode_cmd.flags = DRM_MODE_FB_MODIFIERS; 302 303 if (intel_framebuffer_init(to_intel_framebuffer(fb), 304 vma->obj, &mode_cmd)) { 305 drm_dbg_kms(&dev_priv->drm, "intel fb init failed\n"); 306 goto err_vma; 307 } 308 309 plane_config->vma = vma; 310 return true; 311 312 err_vma: 313 i915_vma_put(vma); 314 return false; 315 } 316 317 static void 318 intel_find_initial_plane_obj(struct intel_crtc *crtc, 319 struct intel_initial_plane_config plane_configs[]) 320 { 321 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); 322 struct intel_initial_plane_config *plane_config = 323 &plane_configs[crtc->pipe]; 324 struct intel_plane *plane = 325 to_intel_plane(crtc->base.primary); 326 struct intel_plane_state *plane_state = 327 to_intel_plane_state(plane->base.state); 328 struct drm_framebuffer *fb; 329 struct i915_vma *vma; 330 331 /* 332 * TODO: 333 * Disable planes if get_initial_plane_config() failed. 334 * Make sure things work if the surface base is not page aligned. 335 */ 336 if (!plane_config->fb) 337 return; 338 339 if (intel_alloc_initial_plane_obj(crtc, plane_config)) { 340 fb = &plane_config->fb->base; 341 vma = plane_config->vma; 342 goto valid_fb; 343 } 344 345 /* 346 * Failed to alloc the obj, check to see if we should share 347 * an fb with another CRTC instead 348 */ 349 if (intel_reuse_initial_plane_obj(crtc, plane_configs, &fb, &vma)) 350 goto valid_fb; 351 352 /* 353 * We've failed to reconstruct the BIOS FB. Current display state 354 * indicates that the primary plane is visible, but has a NULL FB, 355 * which will lead to problems later if we don't fix it up. The 356 * simplest solution is to just disable the primary plane now and 357 * pretend the BIOS never had it enabled. 358 */ 359 intel_plane_disable_noatomic(crtc, plane); 360 361 return; 362 363 valid_fb: 364 plane_state->uapi.rotation = plane_config->rotation; 365 intel_fb_fill_view(to_intel_framebuffer(fb), 366 plane_state->uapi.rotation, &plane_state->view); 367 368 __i915_vma_pin(vma); 369 plane_state->ggtt_vma = i915_vma_get(vma); 370 if (intel_plane_uses_fence(plane_state) && 371 i915_vma_pin_fence(vma) == 0 && vma->fence) 372 plane_state->flags |= PLANE_HAS_FENCE; 373 374 plane_state->uapi.src_x = 0; 375 plane_state->uapi.src_y = 0; 376 plane_state->uapi.src_w = fb->width << 16; 377 plane_state->uapi.src_h = fb->height << 16; 378 379 plane_state->uapi.crtc_x = 0; 380 plane_state->uapi.crtc_y = 0; 381 plane_state->uapi.crtc_w = fb->width; 382 plane_state->uapi.crtc_h = fb->height; 383 384 if (plane_config->tiling) 385 dev_priv->preserve_bios_swizzle = true; 386 387 plane_state->uapi.fb = fb; 388 drm_framebuffer_get(fb); 389 390 plane_state->uapi.crtc = &crtc->base; 391 intel_plane_copy_uapi_to_hw_state(plane_state, plane_state, crtc); 392 393 atomic_or(plane->frontbuffer_bit, &to_intel_frontbuffer(fb)->bits); 394 } 395 396 static void plane_config_fini(struct intel_initial_plane_config *plane_config) 397 { 398 if (plane_config->fb) { 399 struct drm_framebuffer *fb = &plane_config->fb->base; 400 401 /* We may only have the stub and not a full framebuffer */ 402 if (drm_framebuffer_read_refcount(fb)) 403 drm_framebuffer_put(fb); 404 else 405 kfree(fb); 406 } 407 408 if (plane_config->vma) 409 i915_vma_put(plane_config->vma); 410 } 411 412 void intel_initial_plane_config(struct drm_i915_private *i915) 413 { 414 struct intel_initial_plane_config plane_configs[I915_MAX_PIPES] = {}; 415 struct intel_crtc *crtc; 416 417 for_each_intel_crtc(&i915->drm, crtc) { 418 struct intel_initial_plane_config *plane_config = 419 &plane_configs[crtc->pipe]; 420 421 if (!to_intel_crtc_state(crtc->base.state)->uapi.active) 422 continue; 423 424 /* 425 * Note that reserving the BIOS fb up front prevents us 426 * from stuffing other stolen allocations like the ring 427 * on top. This prevents some ugliness at boot time, and 428 * can even allow for smooth boot transitions if the BIOS 429 * fb is large enough for the active pipe configuration. 430 */ 431 i915->display.funcs.display->get_initial_plane_config(crtc, plane_config); 432 433 /* 434 * If the fb is shared between multiple heads, we'll 435 * just get the first one. 436 */ 437 intel_find_initial_plane_obj(crtc, plane_configs); 438 439 if (i915->display.funcs.display->fixup_initial_plane_config(crtc, plane_config)) 440 intel_crtc_wait_for_next_vblank(crtc); 441 442 plane_config_fini(plane_config); 443 } 444 } 445