1 /* $NetBSD: intel_dvo.c,v 1.2 2021/12/18 23:45:30 riastradh Exp $ */
2
3 /*
4 * Copyright 2006 Dave Airlie <airlied@linux.ie>
5 * Copyright © 2006-2007 Intel Corporation
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
25 *
26 * Authors:
27 * Eric Anholt <eric@anholt.net>
28 */
29
30 #include <sys/cdefs.h>
31 __KERNEL_RCSID(0, "$NetBSD: intel_dvo.c,v 1.2 2021/12/18 23:45:30 riastradh Exp $");
32
33 #include <linux/i2c.h>
34 #include <linux/slab.h>
35
36 #include <drm/drm_atomic_helper.h>
37 #include <drm/drm_crtc.h>
38 #include <drm/i915_drm.h>
39
40 #include "i915_drv.h"
41 #include "intel_connector.h"
42 #include "intel_display_types.h"
43 #include "intel_dvo.h"
44 #include "intel_dvo_dev.h"
45 #include "intel_gmbus.h"
46 #include "intel_panel.h"
47
48 #define INTEL_DVO_CHIP_NONE 0
49 #define INTEL_DVO_CHIP_LVDS 1
50 #define INTEL_DVO_CHIP_TMDS 2
51 #define INTEL_DVO_CHIP_TVOUT 4
52
53 #define SIL164_ADDR 0x38
54 #define CH7xxx_ADDR 0x76
55 #define TFP410_ADDR 0x38
56 #define NS2501_ADDR 0x38
57
58 static const struct intel_dvo_device intel_dvo_devices[] = {
59 {
60 .type = INTEL_DVO_CHIP_TMDS,
61 .name = "sil164",
62 .dvo_reg = DVOC,
63 .dvo_srcdim_reg = DVOC_SRCDIM,
64 .slave_addr = SIL164_ADDR,
65 .dev_ops = &sil164_ops,
66 },
67 {
68 .type = INTEL_DVO_CHIP_TMDS,
69 .name = "ch7xxx",
70 .dvo_reg = DVOC,
71 .dvo_srcdim_reg = DVOC_SRCDIM,
72 .slave_addr = CH7xxx_ADDR,
73 .dev_ops = &ch7xxx_ops,
74 },
75 {
76 .type = INTEL_DVO_CHIP_TMDS,
77 .name = "ch7xxx",
78 .dvo_reg = DVOC,
79 .dvo_srcdim_reg = DVOC_SRCDIM,
80 .slave_addr = 0x75, /* For some ch7010 */
81 .dev_ops = &ch7xxx_ops,
82 },
83 {
84 .type = INTEL_DVO_CHIP_LVDS,
85 .name = "ivch",
86 .dvo_reg = DVOA,
87 .dvo_srcdim_reg = DVOA_SRCDIM,
88 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
89 .dev_ops = &ivch_ops,
90 },
91 {
92 .type = INTEL_DVO_CHIP_TMDS,
93 .name = "tfp410",
94 .dvo_reg = DVOC,
95 .dvo_srcdim_reg = DVOC_SRCDIM,
96 .slave_addr = TFP410_ADDR,
97 .dev_ops = &tfp410_ops,
98 },
99 {
100 .type = INTEL_DVO_CHIP_LVDS,
101 .name = "ch7017",
102 .dvo_reg = DVOC,
103 .dvo_srcdim_reg = DVOC_SRCDIM,
104 .slave_addr = 0x75,
105 .gpio = GMBUS_PIN_DPB,
106 .dev_ops = &ch7017_ops,
107 },
108 {
109 .type = INTEL_DVO_CHIP_TMDS,
110 .name = "ns2501",
111 .dvo_reg = DVOB,
112 .dvo_srcdim_reg = DVOB_SRCDIM,
113 .slave_addr = NS2501_ADDR,
114 .dev_ops = &ns2501_ops,
115 }
116 };
117
118 struct intel_dvo {
119 struct intel_encoder base;
120
121 struct intel_dvo_device dev;
122
123 struct intel_connector *attached_connector;
124
125 bool panel_wants_dither;
126 };
127
enc_to_dvo(struct intel_encoder * encoder)128 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
129 {
130 return container_of(encoder, struct intel_dvo, base);
131 }
132
intel_attached_dvo(struct intel_connector * connector)133 static struct intel_dvo *intel_attached_dvo(struct intel_connector *connector)
134 {
135 return enc_to_dvo(intel_attached_encoder(connector));
136 }
137
intel_dvo_connector_get_hw_state(struct intel_connector * connector)138 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
139 {
140 struct drm_device *dev = connector->base.dev;
141 struct drm_i915_private *dev_priv = to_i915(dev);
142 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
143 u32 tmp;
144
145 tmp = I915_READ(intel_dvo->dev.dvo_reg);
146
147 if (!(tmp & DVO_ENABLE))
148 return false;
149
150 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
151 }
152
intel_dvo_get_hw_state(struct intel_encoder * encoder,enum pipe * pipe)153 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
154 enum pipe *pipe)
155 {
156 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
157 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
158 u32 tmp;
159
160 tmp = I915_READ(intel_dvo->dev.dvo_reg);
161
162 *pipe = (tmp & DVO_PIPE_SEL_MASK) >> DVO_PIPE_SEL_SHIFT;
163
164 return tmp & DVO_ENABLE;
165 }
166
intel_dvo_get_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config)167 static void intel_dvo_get_config(struct intel_encoder *encoder,
168 struct intel_crtc_state *pipe_config)
169 {
170 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
171 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
172 u32 tmp, flags = 0;
173
174 pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO);
175
176 tmp = I915_READ(intel_dvo->dev.dvo_reg);
177 if (tmp & DVO_HSYNC_ACTIVE_HIGH)
178 flags |= DRM_MODE_FLAG_PHSYNC;
179 else
180 flags |= DRM_MODE_FLAG_NHSYNC;
181 if (tmp & DVO_VSYNC_ACTIVE_HIGH)
182 flags |= DRM_MODE_FLAG_PVSYNC;
183 else
184 flags |= DRM_MODE_FLAG_NVSYNC;
185
186 pipe_config->hw.adjusted_mode.flags |= flags;
187
188 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock;
189 }
190
intel_disable_dvo(struct intel_encoder * encoder,const struct intel_crtc_state * old_crtc_state,const struct drm_connector_state * old_conn_state)191 static void intel_disable_dvo(struct intel_encoder *encoder,
192 const struct intel_crtc_state *old_crtc_state,
193 const struct drm_connector_state *old_conn_state)
194 {
195 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
196 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
197 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
198 u32 temp = I915_READ(dvo_reg);
199
200 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
201 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
202 I915_READ(dvo_reg);
203 }
204
intel_enable_dvo(struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state)205 static void intel_enable_dvo(struct intel_encoder *encoder,
206 const struct intel_crtc_state *pipe_config,
207 const struct drm_connector_state *conn_state)
208 {
209 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
210 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
211 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
212 u32 temp = I915_READ(dvo_reg);
213
214 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
215 &pipe_config->hw.mode,
216 &pipe_config->hw.adjusted_mode);
217
218 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
219 I915_READ(dvo_reg);
220
221 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
222 }
223
224 static enum drm_mode_status
intel_dvo_mode_valid(struct drm_connector * connector,struct drm_display_mode * mode)225 intel_dvo_mode_valid(struct drm_connector *connector,
226 struct drm_display_mode *mode)
227 {
228 struct intel_dvo *intel_dvo = intel_attached_dvo(to_intel_connector(connector));
229 const struct drm_display_mode *fixed_mode =
230 to_intel_connector(connector)->panel.fixed_mode;
231 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
232 int target_clock = mode->clock;
233
234 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
235 return MODE_NO_DBLESCAN;
236
237 /* XXX: Validate clock range */
238
239 if (fixed_mode) {
240 if (mode->hdisplay > fixed_mode->hdisplay)
241 return MODE_PANEL;
242 if (mode->vdisplay > fixed_mode->vdisplay)
243 return MODE_PANEL;
244
245 target_clock = fixed_mode->clock;
246 }
247
248 if (target_clock > max_dotclk)
249 return MODE_CLOCK_HIGH;
250
251 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
252 }
253
intel_dvo_compute_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config,struct drm_connector_state * conn_state)254 static int intel_dvo_compute_config(struct intel_encoder *encoder,
255 struct intel_crtc_state *pipe_config,
256 struct drm_connector_state *conn_state)
257 {
258 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
259 const struct drm_display_mode *fixed_mode =
260 intel_dvo->attached_connector->panel.fixed_mode;
261 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
262
263 /*
264 * If we have timings from the BIOS for the panel, put them in
265 * to the adjusted mode. The CRTC will be set up for this mode,
266 * with the panel scaling set up to source from the H/VDisplay
267 * of the original mode.
268 */
269 if (fixed_mode)
270 intel_fixed_panel_mode(fixed_mode, adjusted_mode);
271
272 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
273 return -EINVAL;
274
275 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
276
277 return 0;
278 }
279
intel_dvo_pre_enable(struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state)280 static void intel_dvo_pre_enable(struct intel_encoder *encoder,
281 const struct intel_crtc_state *pipe_config,
282 const struct drm_connector_state *conn_state)
283 {
284 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
285 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
286 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
287 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
288 enum pipe pipe = crtc->pipe;
289 u32 dvo_val;
290 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
291 i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg;
292
293 /* Save the data order, since I don't know what it should be set to. */
294 dvo_val = I915_READ(dvo_reg) &
295 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
296 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
297 DVO_BLANK_ACTIVE_HIGH;
298
299 dvo_val |= DVO_PIPE_SEL(pipe);
300 dvo_val |= DVO_PIPE_STALL;
301 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
302 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
303 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
304 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
305
306 /*I915_WRITE(DVOB_SRCDIM,
307 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
308 (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
309 I915_WRITE(dvo_srcdim_reg,
310 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
311 (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
312 /*I915_WRITE(DVOB, dvo_val);*/
313 I915_WRITE(dvo_reg, dvo_val);
314 }
315
316 static enum drm_connector_status
intel_dvo_detect(struct drm_connector * connector,bool force)317 intel_dvo_detect(struct drm_connector *connector, bool force)
318 {
319 struct intel_dvo *intel_dvo = intel_attached_dvo(to_intel_connector(connector));
320 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
321 connector->base.id, connector->name);
322 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
323 }
324
intel_dvo_get_modes(struct drm_connector * connector)325 static int intel_dvo_get_modes(struct drm_connector *connector)
326 {
327 struct drm_i915_private *dev_priv = to_i915(connector->dev);
328 const struct drm_display_mode *fixed_mode =
329 to_intel_connector(connector)->panel.fixed_mode;
330
331 /*
332 * We should probably have an i2c driver get_modes function for those
333 * devices which will have a fixed set of modes determined by the chip
334 * (TV-out, for example), but for now with just TMDS and LVDS,
335 * that's not the case.
336 */
337 intel_ddc_get_modes(connector,
338 intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
339 if (!list_empty(&connector->probed_modes))
340 return 1;
341
342 if (fixed_mode) {
343 struct drm_display_mode *mode;
344 mode = drm_mode_duplicate(connector->dev, fixed_mode);
345 if (mode) {
346 drm_mode_probed_add(connector, mode);
347 return 1;
348 }
349 }
350
351 return 0;
352 }
353
354 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
355 .detect = intel_dvo_detect,
356 .late_register = intel_connector_register,
357 .early_unregister = intel_connector_unregister,
358 .destroy = intel_connector_destroy,
359 .fill_modes = drm_helper_probe_single_connector_modes,
360 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
361 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
362 };
363
364 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
365 .mode_valid = intel_dvo_mode_valid,
366 .get_modes = intel_dvo_get_modes,
367 };
368
intel_dvo_enc_destroy(struct drm_encoder * encoder)369 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
370 {
371 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
372
373 if (intel_dvo->dev.dev_ops->destroy)
374 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
375
376 intel_encoder_destroy(encoder);
377 }
378
379 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
380 .destroy = intel_dvo_enc_destroy,
381 };
382
383 /*
384 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
385 *
386 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
387 * chip being on DVOB/C and having multiple pipes.
388 */
389 static struct drm_display_mode *
intel_dvo_get_current_mode(struct intel_encoder * encoder)390 intel_dvo_get_current_mode(struct intel_encoder *encoder)
391 {
392 struct drm_display_mode *mode;
393
394 mode = intel_encoder_current_mode(encoder);
395 if (mode) {
396 DRM_DEBUG_KMS("using current (BIOS) mode: ");
397 drm_mode_debug_printmodeline(mode);
398 mode->type |= DRM_MODE_TYPE_PREFERRED;
399 }
400
401 return mode;
402 }
403
intel_dvo_port(i915_reg_t dvo_reg)404 static enum port intel_dvo_port(i915_reg_t dvo_reg)
405 {
406 if (i915_mmio_reg_equal(dvo_reg, DVOA))
407 return PORT_A;
408 else if (i915_mmio_reg_equal(dvo_reg, DVOB))
409 return PORT_B;
410 else
411 return PORT_C;
412 }
413
intel_dvo_init(struct drm_i915_private * dev_priv)414 void intel_dvo_init(struct drm_i915_private *dev_priv)
415 {
416 struct intel_encoder *intel_encoder;
417 struct intel_dvo *intel_dvo;
418 struct intel_connector *intel_connector;
419 int i;
420 int encoder_type = DRM_MODE_ENCODER_NONE;
421
422 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
423 if (!intel_dvo)
424 return;
425
426 intel_connector = intel_connector_alloc();
427 if (!intel_connector) {
428 kfree(intel_dvo);
429 return;
430 }
431
432 intel_dvo->attached_connector = intel_connector;
433
434 intel_encoder = &intel_dvo->base;
435
436 intel_encoder->disable = intel_disable_dvo;
437 intel_encoder->enable = intel_enable_dvo;
438 intel_encoder->get_hw_state = intel_dvo_get_hw_state;
439 intel_encoder->get_config = intel_dvo_get_config;
440 intel_encoder->compute_config = intel_dvo_compute_config;
441 intel_encoder->pre_enable = intel_dvo_pre_enable;
442 intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
443
444 /* Now, try to find a controller */
445 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
446 struct drm_connector *connector = &intel_connector->base;
447 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
448 struct i2c_adapter *i2c;
449 int gpio;
450 bool dvoinit;
451 enum pipe pipe;
452 u32 dpll[I915_MAX_PIPES];
453 enum port port;
454
455 /*
456 * Allow the I2C driver info to specify the GPIO to be used in
457 * special cases, but otherwise default to what's defined
458 * in the spec.
459 */
460 if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
461 gpio = dvo->gpio;
462 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
463 gpio = GMBUS_PIN_SSC;
464 else
465 gpio = GMBUS_PIN_DPB;
466
467 /*
468 * Set up the I2C bus necessary for the chip we're probing.
469 * It appears that everything is on GPIOE except for panels
470 * on i830 laptops, which are on GPIOB (DVOA).
471 */
472 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
473
474 intel_dvo->dev = *dvo;
475
476 /*
477 * GMBUS NAK handling seems to be unstable, hence let the
478 * transmitter detection run in bit banging mode for now.
479 */
480 intel_gmbus_force_bit(i2c, true);
481
482 /*
483 * ns2501 requires the DVO 2x clock before it will
484 * respond to i2c accesses, so make sure we have
485 * have the clock enabled before we attempt to
486 * initialize the device.
487 */
488 for_each_pipe(dev_priv, pipe) {
489 dpll[pipe] = I915_READ(DPLL(pipe));
490 I915_WRITE(DPLL(pipe), dpll[pipe] | DPLL_DVO_2X_MODE);
491 }
492
493 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
494
495 /* restore the DVO 2x clock state to original */
496 for_each_pipe(dev_priv, pipe) {
497 I915_WRITE(DPLL(pipe), dpll[pipe]);
498 }
499
500 intel_gmbus_force_bit(i2c, false);
501
502 if (!dvoinit)
503 continue;
504
505 port = intel_dvo_port(dvo->dvo_reg);
506 drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
507 &intel_dvo_enc_funcs, encoder_type,
508 "DVO %c", port_name(port));
509
510 intel_encoder->type = INTEL_OUTPUT_DVO;
511 intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
512 intel_encoder->port = port;
513 intel_encoder->pipe_mask = ~0;
514
515 switch (dvo->type) {
516 case INTEL_DVO_CHIP_TMDS:
517 intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
518 (1 << INTEL_OUTPUT_DVO);
519 drm_connector_init(&dev_priv->drm, connector,
520 &intel_dvo_connector_funcs,
521 DRM_MODE_CONNECTOR_DVII);
522 encoder_type = DRM_MODE_ENCODER_TMDS;
523 break;
524 case INTEL_DVO_CHIP_LVDS:
525 intel_encoder->cloneable = 0;
526 drm_connector_init(&dev_priv->drm, connector,
527 &intel_dvo_connector_funcs,
528 DRM_MODE_CONNECTOR_LVDS);
529 encoder_type = DRM_MODE_ENCODER_LVDS;
530 break;
531 }
532
533 drm_connector_helper_add(connector,
534 &intel_dvo_connector_helper_funcs);
535 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
536 connector->interlace_allowed = false;
537 connector->doublescan_allowed = false;
538
539 intel_connector_attach_encoder(intel_connector, intel_encoder);
540 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
541 /*
542 * For our LVDS chipsets, we should hopefully be able
543 * to dig the fixed panel mode out of the BIOS data.
544 * However, it's in a different format from the BIOS
545 * data on chipsets with integrated LVDS (stored in AIM
546 * headers, likely), so for now, just get the current
547 * mode being output through DVO.
548 */
549 intel_panel_init(&intel_connector->panel,
550 intel_dvo_get_current_mode(intel_encoder),
551 NULL);
552 intel_dvo->panel_wants_dither = true;
553 }
554
555 return;
556 }
557
558 kfree(intel_dvo);
559 kfree(intel_connector);
560 }
561