xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/i915/display/intel_dp_aux_backlight.c (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: intel_dp_aux_backlight.c,v 1.2 2021/12/18 23:45:30 riastradh Exp $	*/
2 
3 /*
4  * Copyright © 2015 Intel Corporation
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the next
14  * paragraph) shall be included in all copies or substantial portions of the
15  * Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
23  * IN THE SOFTWARE.
24  *
25  */
26 
27 #include <sys/cdefs.h>
28 __KERNEL_RCSID(0, "$NetBSD: intel_dp_aux_backlight.c,v 1.2 2021/12/18 23:45:30 riastradh Exp $");
29 
30 #include "intel_display_types.h"
31 #include "intel_dp_aux_backlight.h"
32 
set_aux_backlight_enable(struct intel_dp * intel_dp,bool enable)33 static void set_aux_backlight_enable(struct intel_dp *intel_dp, bool enable)
34 {
35 	u8 reg_val = 0;
36 
37 	/* Early return when display use other mechanism to enable backlight. */
38 	if (!(intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP))
39 		return;
40 
41 	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER,
42 			      &reg_val) < 0) {
43 		DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n",
44 			      DP_EDP_DISPLAY_CONTROL_REGISTER);
45 		return;
46 	}
47 	if (enable)
48 		reg_val |= DP_EDP_BACKLIGHT_ENABLE;
49 	else
50 		reg_val &= ~(DP_EDP_BACKLIGHT_ENABLE);
51 
52 	if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER,
53 			       reg_val) != 1) {
54 		DRM_DEBUG_KMS("Failed to %s aux backlight\n",
55 			      enable ? "enable" : "disable");
56 	}
57 }
58 
59 /*
60  * Read the current backlight value from DPCD register(s) based
61  * on if 8-bit(MSB) or 16-bit(MSB and LSB) values are supported
62  */
intel_dp_aux_get_backlight(struct intel_connector * connector)63 static u32 intel_dp_aux_get_backlight(struct intel_connector *connector)
64 {
65 	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
66 	u8 read_val[2] = { 0x0 };
67 	u16 level = 0;
68 
69 	if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB,
70 			     &read_val, sizeof(read_val)) < 0) {
71 		DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n",
72 			      DP_EDP_BACKLIGHT_BRIGHTNESS_MSB);
73 		return 0;
74 	}
75 	level = read_val[0];
76 	if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT)
77 		level = (read_val[0] << 8 | read_val[1]);
78 
79 	return level;
80 }
81 
82 /*
83  * Sends the current backlight level over the aux channel, checking if its using
84  * 8-bit or 16 bit value (MSB and LSB)
85  */
86 static void
intel_dp_aux_set_backlight(const struct drm_connector_state * conn_state,u32 level)87 intel_dp_aux_set_backlight(const struct drm_connector_state *conn_state, u32 level)
88 {
89 	struct intel_connector *connector = to_intel_connector(conn_state->connector);
90 	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
91 	u8 vals[2] = { 0x0 };
92 
93 	vals[0] = level;
94 
95 	/* Write the MSB and/or LSB */
96 	if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) {
97 		vals[0] = (level & 0xFF00) >> 8;
98 		vals[1] = (level & 0xFF);
99 	}
100 	if (drm_dp_dpcd_write(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB,
101 			      vals, sizeof(vals)) < 0) {
102 		DRM_DEBUG_KMS("Failed to write aux backlight level\n");
103 		return;
104 	}
105 }
106 
107 /*
108  * Set PWM Frequency divider to match desired frequency in vbt.
109  * The PWM Frequency is calculated as 27Mhz / (F x P).
110  * - Where F = PWM Frequency Pre-Divider value programmed by field 7:0 of the
111  *             EDP_BACKLIGHT_FREQ_SET register (DPCD Address 00728h)
112  * - Where P = 2^Pn, where Pn is the value programmed by field 4:0 of the
113  *             EDP_PWMGEN_BIT_COUNT register (DPCD Address 00724h)
114  */
intel_dp_aux_set_pwm_freq(struct intel_connector * connector)115 static bool intel_dp_aux_set_pwm_freq(struct intel_connector *connector)
116 {
117 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
118 	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
119 	int freq, fxp, fxp_min, fxp_max, fxp_actual, f = 1;
120 	u8 pn, pn_min, pn_max;
121 
122 	/* Find desired value of (F x P)
123 	 * Note that, if F x P is out of supported range, the maximum value or
124 	 * minimum value will applied automatically. So no need to check that.
125 	 */
126 	freq = dev_priv->vbt.backlight.pwm_freq_hz;
127 	DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n", freq);
128 	if (!freq) {
129 		DRM_DEBUG_KMS("Use panel default backlight frequency\n");
130 		return false;
131 	}
132 
133 	fxp = DIV_ROUND_CLOSEST(KHz(DP_EDP_BACKLIGHT_FREQ_BASE_KHZ), freq);
134 
135 	/* Use highest possible value of Pn for more granularity of brightness
136 	 * adjustment while satifying the conditions below.
137 	 * - Pn is in the range of Pn_min and Pn_max
138 	 * - F is in the range of 1 and 255
139 	 * - FxP is within 25% of desired value.
140 	 *   Note: 25% is arbitrary value and may need some tweak.
141 	 */
142 	if (drm_dp_dpcd_readb(&intel_dp->aux,
143 			       DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN, &pn_min) != 1) {
144 		DRM_DEBUG_KMS("Failed to read pwmgen bit count cap min\n");
145 		return false;
146 	}
147 	if (drm_dp_dpcd_readb(&intel_dp->aux,
148 			       DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX, &pn_max) != 1) {
149 		DRM_DEBUG_KMS("Failed to read pwmgen bit count cap max\n");
150 		return false;
151 	}
152 	pn_min &= DP_EDP_PWMGEN_BIT_COUNT_MASK;
153 	pn_max &= DP_EDP_PWMGEN_BIT_COUNT_MASK;
154 
155 	fxp_min = DIV_ROUND_CLOSEST(fxp * 3, 4);
156 	fxp_max = DIV_ROUND_CLOSEST(fxp * 5, 4);
157 	if (fxp_min < (1 << pn_min) || (255 << pn_max) < fxp_max) {
158 		DRM_DEBUG_KMS("VBT defined backlight frequency out of range\n");
159 		return false;
160 	}
161 
162 	for (pn = pn_max; pn >= pn_min; pn--) {
163 		f = clamp(DIV_ROUND_CLOSEST(fxp, 1 << pn), 1, 255);
164 		fxp_actual = f << pn;
165 		if (fxp_min <= fxp_actual && fxp_actual <= fxp_max)
166 			break;
167 	}
168 
169 	if (drm_dp_dpcd_writeb(&intel_dp->aux,
170 			       DP_EDP_PWMGEN_BIT_COUNT, pn) < 0) {
171 		DRM_DEBUG_KMS("Failed to write aux pwmgen bit count\n");
172 		return false;
173 	}
174 	if (drm_dp_dpcd_writeb(&intel_dp->aux,
175 			       DP_EDP_BACKLIGHT_FREQ_SET, (u8) f) < 0) {
176 		DRM_DEBUG_KMS("Failed to write aux backlight freq\n");
177 		return false;
178 	}
179 	return true;
180 }
181 
intel_dp_aux_enable_backlight(const struct intel_crtc_state * crtc_state,const struct drm_connector_state * conn_state)182 static void intel_dp_aux_enable_backlight(const struct intel_crtc_state *crtc_state,
183 					  const struct drm_connector_state *conn_state)
184 {
185 	struct intel_connector *connector = to_intel_connector(conn_state->connector);
186 	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
187 	u8 dpcd_buf, new_dpcd_buf, edp_backlight_mode;
188 
189 	if (drm_dp_dpcd_readb(&intel_dp->aux,
190 			DP_EDP_BACKLIGHT_MODE_SET_REGISTER, &dpcd_buf) != 1) {
191 		DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n",
192 			      DP_EDP_BACKLIGHT_MODE_SET_REGISTER);
193 		return;
194 	}
195 
196 	new_dpcd_buf = dpcd_buf;
197 	edp_backlight_mode = dpcd_buf & DP_EDP_BACKLIGHT_CONTROL_MODE_MASK;
198 
199 	switch (edp_backlight_mode) {
200 	case DP_EDP_BACKLIGHT_CONTROL_MODE_PWM:
201 	case DP_EDP_BACKLIGHT_CONTROL_MODE_PRESET:
202 	case DP_EDP_BACKLIGHT_CONTROL_MODE_PRODUCT:
203 		new_dpcd_buf &= ~DP_EDP_BACKLIGHT_CONTROL_MODE_MASK;
204 		new_dpcd_buf |= DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD;
205 		break;
206 
207 	/* Do nothing when it is already DPCD mode */
208 	case DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD:
209 	default:
210 		break;
211 	}
212 
213 	if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_FREQ_AUX_SET_CAP)
214 		if (intel_dp_aux_set_pwm_freq(connector))
215 			new_dpcd_buf |= DP_EDP_BACKLIGHT_FREQ_AUX_SET_ENABLE;
216 
217 	if (new_dpcd_buf != dpcd_buf) {
218 		if (drm_dp_dpcd_writeb(&intel_dp->aux,
219 			DP_EDP_BACKLIGHT_MODE_SET_REGISTER, new_dpcd_buf) < 0) {
220 			DRM_DEBUG_KMS("Failed to write aux backlight mode\n");
221 		}
222 	}
223 
224 	set_aux_backlight_enable(intel_dp, true);
225 	intel_dp_aux_set_backlight(conn_state, connector->panel.backlight.level);
226 }
227 
intel_dp_aux_disable_backlight(const struct drm_connector_state * old_conn_state)228 static void intel_dp_aux_disable_backlight(const struct drm_connector_state *old_conn_state)
229 {
230 	set_aux_backlight_enable(enc_to_intel_dp(to_intel_encoder(old_conn_state->best_encoder)),
231 				 false);
232 }
233 
intel_dp_aux_setup_backlight(struct intel_connector * connector,enum pipe pipe)234 static int intel_dp_aux_setup_backlight(struct intel_connector *connector,
235 					enum pipe pipe)
236 {
237 	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
238 	struct intel_panel *panel = &connector->panel;
239 
240 	if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT)
241 		panel->backlight.max = 0xFFFF;
242 	else
243 		panel->backlight.max = 0xFF;
244 
245 	panel->backlight.min = 0;
246 	panel->backlight.level = intel_dp_aux_get_backlight(connector);
247 
248 	panel->backlight.enabled = panel->backlight.level != 0;
249 
250 	return 0;
251 }
252 
253 static bool
intel_dp_aux_display_control_capable(struct intel_connector * connector)254 intel_dp_aux_display_control_capable(struct intel_connector *connector)
255 {
256 	struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
257 
258 	/* Check the eDP Display control capabilities registers to determine if
259 	 * the panel can support backlight control over the aux channel
260 	 */
261 	if (intel_dp->edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP &&
262 	    (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_AUX_SET_CAP) &&
263 	    !(intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP)) {
264 		DRM_DEBUG_KMS("AUX Backlight Control Supported!\n");
265 		return true;
266 	}
267 	return false;
268 }
269 
intel_dp_aux_init_backlight_funcs(struct intel_connector * intel_connector)270 int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector)
271 {
272 	struct intel_panel *panel = &intel_connector->panel;
273 	struct drm_i915_private *dev_priv = to_i915(intel_connector->base.dev);
274 
275 	if (i915_modparams.enable_dpcd_backlight == 0 ||
276 	    (i915_modparams.enable_dpcd_backlight == -1 &&
277 	    dev_priv->vbt.backlight.type != INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE))
278 		return -ENODEV;
279 
280 	if (!intel_dp_aux_display_control_capable(intel_connector))
281 		return -ENODEV;
282 
283 	panel->backlight.setup = intel_dp_aux_setup_backlight;
284 	panel->backlight.enable = intel_dp_aux_enable_backlight;
285 	panel->backlight.disable = intel_dp_aux_disable_backlight;
286 	panel->backlight.set = intel_dp_aux_set_backlight;
287 	panel->backlight.get = intel_dp_aux_get_backlight;
288 
289 	return 0;
290 }
291