xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/i915/i915_vgpu.c (revision f1da9b35911ced5ef0f192721061e7b335ea9808)
1 /*	$NetBSD: i915_vgpu.c,v 1.6 2021/12/19 11:37:41 riastradh Exp $	*/
2 
3 /*
4  * Copyright(c) 2011-2015 Intel Corporation. All rights reserved.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the next
14  * paragraph) shall be included in all copies or substantial portions of the
15  * Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23  * SOFTWARE.
24  */
25 
26 #include <sys/cdefs.h>
27 __KERNEL_RCSID(0, "$NetBSD: i915_vgpu.c,v 1.6 2021/12/19 11:37:41 riastradh Exp $");
28 
29 #include "i915_vgpu.h"
30 
31 #include <linux/nbsd-namespace.h>
32 
33 /**
34  * DOC: Intel GVT-g guest support
35  *
36  * Intel GVT-g is a graphics virtualization technology which shares the
37  * GPU among multiple virtual machines on a time-sharing basis. Each
38  * virtual machine is presented a virtual GPU (vGPU), which has equivalent
39  * features as the underlying physical GPU (pGPU), so i915 driver can run
40  * seamlessly in a virtual machine. This file provides vGPU specific
41  * optimizations when running in a virtual machine, to reduce the complexity
42  * of vGPU emulation and to improve the overall performance.
43  *
44  * A primary function introduced here is so-called "address space ballooning"
45  * technique. Intel GVT-g partitions global graphics memory among multiple VMs,
46  * so each VM can directly access a portion of the memory without hypervisor's
47  * intervention, e.g. filling textures or queuing commands. However with the
48  * partitioning an unmodified i915 driver would assume a smaller graphics
49  * memory starting from address ZERO, then requires vGPU emulation module to
50  * translate the graphics address between 'guest view' and 'host view', for
51  * all registers and command opcodes which contain a graphics memory address.
52  * To reduce the complexity, Intel GVT-g introduces "address space ballooning",
53  * by telling the exact partitioning knowledge to each guest i915 driver, which
54  * then reserves and prevents non-allocated portions from allocation. Thus vGPU
55  * emulation module only needs to scan and validate graphics addresses without
56  * complexity of address translation.
57  *
58  */
59 
60 /**
61  * i915_detect_vgpu - detect virtual GPU
62  * @dev_priv: i915 device private
63  *
64  * This function is called at the initialization stage, to detect whether
65  * running on a vGPU.
66  */
i915_detect_vgpu(struct drm_i915_private * dev_priv)67 void i915_detect_vgpu(struct drm_i915_private *dev_priv)
68 {
69 	struct pci_dev *pdev = dev_priv->drm.pdev;
70 	u64 magic;
71 	u16 version_major;
72 #ifdef __NetBSD__
73 	bus_space_tag_t bst;
74 	bus_space_handle_t bsh;
75 	bus_size_t off = VGT_PVINFO_PAGE;
76 	bus_size_t size = VGT_PVINFO_SIZE;
77 #else
78 	void __iomem *shared_area;
79 #endif
80 
81 	BUILD_BUG_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE);
82 
83 	/*
84 	 * This is called before we setup the main MMIO BAR mappings used via
85 	 * the uncore structure, so we need to access the BAR directly. Since
86 	 * we do not support VGT on older gens, return early so we don't have
87 	 * to consider differently numbered or sized MMIO bars
88 	 */
89 	if (INTEL_GEN(dev_priv) < 6)
90 		return;
91 
92 #ifdef __NetBSD__
93 	bst = pdev->pd_pa.pa_memt;
94 	if (off > pdev->pd_resources[0].size ||
95 	    size > pdev->pd_resources[0].size - off ||
96 	    bus_space_map(bst, pdev->pd_resources[0].addr + off, size,
97 		pdev->pd_resources[0].flags, &bsh)) {
98 		DRM_ERROR("failed to map MMIO bar to check for VGT\n");
99 		return;
100 	}
101 #  ifdef _LP64
102 	magic = bus_space_read_8(bst, bsh, (bus_size_t)vgtif_offset(magic));
103 #  else
104 	magic = bus_space_read_4(bst, bsh, (bus_size_t)vgtif_offset(magic));
105 	magic |= (uint64_t)bus_space_read_4(bst, bsh,
106 	    (bus_size_t)vgtif_offset(magic) + 4)
107 	    << 32;
108 #  endif
109 #else
110 	shared_area = pci_iomap_range(pdev, 0, VGT_PVINFO_PAGE, VGT_PVINFO_SIZE);
111 	if (!shared_area) {
112 		DRM_ERROR("failed to map MMIO bar to check for VGT\n");
113 		return;
114 	}
115 	magic = readq(shared_area + vgtif_offset(magic));
116 #endif
117 
118 	if (magic != VGT_MAGIC)
119 		goto out;
120 
121 #ifdef __NetBSD__
122 	version_major = bus_space_read_2(bst, bsh,
123 	    (bus_size_t)vgtif_offset(version_major));
124 #else
125 	version_major = readw(shared_area + vgtif_offset(version_major));
126 #endif
127 	if (version_major < VGT_VERSION_MAJOR) {
128 		DRM_INFO("VGT interface version mismatch!\n");
129 		goto out;
130 	}
131 
132 #ifdef __NetBSD__
133 	dev_priv->vgpu.caps = bus_space_read_4(bst, bsh,
134 	    (bus_size_t)vgtif_offset(vgt_caps));
135 #else
136 	dev_priv->vgpu.caps = readl(shared_area + vgtif_offset(vgt_caps));
137 #endif
138 
139 	dev_priv->vgpu.active = true;
140 	mutex_init(&dev_priv->vgpu.lock);
141 	DRM_INFO("Virtual GPU for Intel GVT-g detected.\n");
142 
143 out:
144 #ifdef __NetBSD__
145 	bus_space_unmap(bst, bsh, size);
146 #else
147 	pci_iounmap(pdev, shared_area);
148 #endif
149 }
150 
intel_vgpu_has_full_ppgtt(struct drm_i915_private * dev_priv)151 bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv)
152 {
153 	return dev_priv->vgpu.caps & VGT_CAPS_FULL_PPGTT;
154 }
155 
156 struct _balloon_info_ {
157 	/*
158 	 * There are up to 2 regions per mappable/unmappable graphic
159 	 * memory that might be ballooned. Here, index 0/1 is for mappable
160 	 * graphic memory, 2/3 for unmappable graphic memory.
161 	 */
162 	struct drm_mm_node space[4];
163 };
164 
165 static struct _balloon_info_ bl_info;
166 
vgt_deballoon_space(struct i915_ggtt * ggtt,struct drm_mm_node * node)167 static void vgt_deballoon_space(struct i915_ggtt *ggtt,
168 				struct drm_mm_node *node)
169 {
170 	if (!drm_mm_node_allocated(node))
171 		return;
172 
173 	DRM_DEBUG_DRIVER("deballoon space: range [0x%"PRIx64" - 0x%"PRIx64"] %"PRIu64" KiB.\n",
174 			 node->start,
175 			 node->start + node->size,
176 			 node->size / 1024);
177 
178 	ggtt->vm.reserved -= node->size;
179 	drm_mm_remove_node(node);
180 }
181 
182 /**
183  * intel_vgt_deballoon - deballoon reserved graphics address trunks
184  * @ggtt: the global GGTT from which we reserved earlier
185  *
186  * This function is called to deallocate the ballooned-out graphic memory, when
187  * driver is unloaded or when ballooning fails.
188  */
intel_vgt_deballoon(struct i915_ggtt * ggtt)189 void intel_vgt_deballoon(struct i915_ggtt *ggtt)
190 {
191 	int i;
192 
193 	if (!intel_vgpu_active(ggtt->vm.i915))
194 		return;
195 
196 	DRM_DEBUG("VGT deballoon.\n");
197 
198 	for (i = 0; i < 4; i++)
199 		vgt_deballoon_space(ggtt, &bl_info.space[i]);
200 }
201 
vgt_balloon_space(struct i915_ggtt * ggtt,struct drm_mm_node * node,unsigned long start,unsigned long end)202 static int vgt_balloon_space(struct i915_ggtt *ggtt,
203 			     struct drm_mm_node *node,
204 			     unsigned long start, unsigned long end)
205 {
206 	unsigned long size = end - start;
207 	int ret;
208 
209 	if (start >= end)
210 		return -EINVAL;
211 
212 	DRM_INFO("balloon space: range [ 0x%lx - 0x%lx ] %lu KiB.\n",
213 		 start, end, size / 1024);
214 	ret = i915_gem_gtt_reserve(&ggtt->vm, node,
215 				   size, start, I915_COLOR_UNEVICTABLE,
216 				   0);
217 	if (!ret)
218 		ggtt->vm.reserved += size;
219 
220 	return ret;
221 }
222 
223 /**
224  * intel_vgt_balloon - balloon out reserved graphics address trunks
225  * @ggtt: the global GGTT from which to reserve
226  *
227  * This function is called at the initialization stage, to balloon out the
228  * graphic address space allocated to other vGPUs, by marking these spaces as
229  * reserved. The ballooning related knowledge(starting address and size of
230  * the mappable/unmappable graphic memory) is described in the vgt_if structure
231  * in a reserved mmio range.
232  *
233  * To give an example, the drawing below depicts one typical scenario after
234  * ballooning. Here the vGPU1 has 2 pieces of graphic address spaces ballooned
235  * out each for the mappable and the non-mappable part. From the vGPU1 point of
236  * view, the total size is the same as the physical one, with the start address
237  * of its graphic space being zero. Yet there are some portions ballooned out(
238  * the shadow part, which are marked as reserved by drm allocator). From the
239  * host point of view, the graphic address space is partitioned by multiple
240  * vGPUs in different VMs. ::
241  *
242  *                         vGPU1 view         Host view
243  *              0 ------> +-----------+     +-----------+
244  *                ^       |###########|     |   vGPU3   |
245  *                |       |###########|     +-----------+
246  *                |       |###########|     |   vGPU2   |
247  *                |       +-----------+     +-----------+
248  *         mappable GM    | available | ==> |   vGPU1   |
249  *                |       +-----------+     +-----------+
250  *                |       |###########|     |           |
251  *                v       |###########|     |   Host    |
252  *                +=======+===========+     +===========+
253  *                ^       |###########|     |   vGPU3   |
254  *                |       |###########|     +-----------+
255  *                |       |###########|     |   vGPU2   |
256  *                |       +-----------+     +-----------+
257  *       unmappable GM    | available | ==> |   vGPU1   |
258  *                |       +-----------+     +-----------+
259  *                |       |###########|     |           |
260  *                |       |###########|     |   Host    |
261  *                v       |###########|     |           |
262  *  total GM size ------> +-----------+     +-----------+
263  *
264  * Returns:
265  * zero on success, non-zero if configuration invalid or ballooning failed
266  */
intel_vgt_balloon(struct i915_ggtt * ggtt)267 int intel_vgt_balloon(struct i915_ggtt *ggtt)
268 {
269 	struct intel_uncore *uncore = &ggtt->vm.i915->uncore;
270 	unsigned long ggtt_end = ggtt->vm.total;
271 
272 	unsigned long mappable_base, mappable_size, mappable_end;
273 	unsigned long unmappable_base, unmappable_size, unmappable_end;
274 	int ret;
275 
276 	if (!intel_vgpu_active(ggtt->vm.i915))
277 		return 0;
278 
279 	mappable_base =
280 	  intel_uncore_read(uncore, vgtif_reg(avail_rs.mappable_gmadr.base));
281 	mappable_size =
282 	  intel_uncore_read(uncore, vgtif_reg(avail_rs.mappable_gmadr.size));
283 	unmappable_base =
284 	  intel_uncore_read(uncore, vgtif_reg(avail_rs.nonmappable_gmadr.base));
285 	unmappable_size =
286 	  intel_uncore_read(uncore, vgtif_reg(avail_rs.nonmappable_gmadr.size));
287 
288 	mappable_end = mappable_base + mappable_size;
289 	unmappable_end = unmappable_base + unmappable_size;
290 
291 	DRM_INFO("VGT ballooning configuration:\n");
292 	DRM_INFO("Mappable graphic memory: base 0x%lx size %ldKiB\n",
293 		 mappable_base, mappable_size / 1024);
294 	DRM_INFO("Unmappable graphic memory: base 0x%lx size %ldKiB\n",
295 		 unmappable_base, unmappable_size / 1024);
296 
297 	if (mappable_end > ggtt->mappable_end ||
298 	    unmappable_base < ggtt->mappable_end ||
299 	    unmappable_end > ggtt_end) {
300 		DRM_ERROR("Invalid ballooning configuration!\n");
301 		return -EINVAL;
302 	}
303 
304 	/* Unmappable graphic memory ballooning */
305 	if (unmappable_base > ggtt->mappable_end) {
306 		ret = vgt_balloon_space(ggtt, &bl_info.space[2],
307 					ggtt->mappable_end, unmappable_base);
308 
309 		if (ret)
310 			goto err;
311 	}
312 
313 	if (unmappable_end < ggtt_end) {
314 		ret = vgt_balloon_space(ggtt, &bl_info.space[3],
315 					unmappable_end, ggtt_end);
316 		if (ret)
317 			goto err_upon_mappable;
318 	}
319 
320 	/* Mappable graphic memory ballooning */
321 	if (mappable_base) {
322 		ret = vgt_balloon_space(ggtt, &bl_info.space[0],
323 					0, mappable_base);
324 
325 		if (ret)
326 			goto err_upon_unmappable;
327 	}
328 
329 	if (mappable_end < ggtt->mappable_end) {
330 		ret = vgt_balloon_space(ggtt, &bl_info.space[1],
331 					mappable_end, ggtt->mappable_end);
332 
333 		if (ret)
334 			goto err_below_mappable;
335 	}
336 
337 	DRM_INFO("VGT balloon successfully\n");
338 	return 0;
339 
340 err_below_mappable:
341 	vgt_deballoon_space(ggtt, &bl_info.space[0]);
342 err_upon_unmappable:
343 	vgt_deballoon_space(ggtt, &bl_info.space[3]);
344 err_upon_mappable:
345 	vgt_deballoon_space(ggtt, &bl_info.space[2]);
346 err:
347 	DRM_ERROR("VGT balloon fail\n");
348 	return ret;
349 }
350