1 /* $NetBSD: nouveau_nvkm_engine_disp_dmacgv100.c,v 1.2 2021/12/18 23:45:35 riastradh Exp $ */
2
3 /*
4 * Copyright 2018 Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 */
24 #include <sys/cdefs.h>
25 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_disp_dmacgv100.c,v 1.2 2021/12/18 23:45:35 riastradh Exp $");
26
27 #include "channv50.h"
28
29 #include <core/ramht.h>
30 #include <subdev/timer.h>
31
32 static int
gv100_disp_dmac_idle(struct nv50_disp_chan * chan)33 gv100_disp_dmac_idle(struct nv50_disp_chan *chan)
34 {
35 struct nvkm_device *device = chan->disp->base.engine.subdev.device;
36 const u32 soff = (chan->chid.ctrl - 1) * 0x04;
37 nvkm_msec(device, 2000,
38 u32 stat = nvkm_rd32(device, 0x610664 + soff);
39 if ((stat & 0x000f0000) == 0x00040000)
40 return 0;
41 );
42 return -EBUSY;
43 }
44
45 int
gv100_disp_dmac_bind(struct nv50_disp_chan * chan,struct nvkm_object * object,u32 handle)46 gv100_disp_dmac_bind(struct nv50_disp_chan *chan,
47 struct nvkm_object *object, u32 handle)
48 {
49 return nvkm_ramht_insert(chan->disp->ramht, object,
50 chan->chid.user, -9, handle,
51 chan->chid.user << 25 | 0x00000040);
52 }
53
54 void
gv100_disp_dmac_fini(struct nv50_disp_chan * chan)55 gv100_disp_dmac_fini(struct nv50_disp_chan *chan)
56 {
57 struct nvkm_device *device = chan->disp->base.engine.subdev.device;
58 const u32 coff = chan->chid.ctrl * 0x04;
59 nvkm_mask(device, 0x6104e0 + coff, 0x00000010, 0x00000000);
60 gv100_disp_dmac_idle(chan);
61 nvkm_mask(device, 0x6104e0 + coff, 0x00000002, 0x00000000);
62 }
63
64 int
gv100_disp_dmac_init(struct nv50_disp_chan * chan)65 gv100_disp_dmac_init(struct nv50_disp_chan *chan)
66 {
67 struct nvkm_subdev *subdev = &chan->disp->base.engine.subdev;
68 struct nvkm_device *device = subdev->device;
69 const u32 uoff = (chan->chid.ctrl - 1) * 0x1000;
70 const u32 poff = chan->chid.ctrl * 0x10;
71 const u32 coff = chan->chid.ctrl * 0x04;
72
73 nvkm_wr32(device, 0x610b24 + poff, lower_32_bits(chan->push));
74 nvkm_wr32(device, 0x610b20 + poff, upper_32_bits(chan->push));
75 nvkm_wr32(device, 0x610b28 + poff, 0x00000001);
76 nvkm_wr32(device, 0x610b2c + poff, 0x00000040);
77
78 nvkm_mask(device, 0x6104e0 + coff, 0x00000010, 0x00000010);
79 nvkm_wr32(device, 0x690000 + uoff, 0x00000000);
80 nvkm_wr32(device, 0x6104e0 + coff, 0x00000013);
81 return gv100_disp_dmac_idle(chan);
82 }
83