1 /* $NetBSD: nouveau_nvkm_engine_pm_gt200.c,v 1.3 2021/12/18 23:45:37 riastradh Exp $ */
2
3 /*
4 * Copyright 2015 Nouveau project
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Samuel Pitoiset
25 */
26 #include <sys/cdefs.h>
27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_pm_gt200.c,v 1.3 2021/12/18 23:45:37 riastradh Exp $");
28
29 #include "nv40.h"
30
31 const struct nvkm_specsrc
32 gt200_crop_sources[] = {
33 { 0x407008, (const struct nvkm_specmux[]) {
34 { 0xf, 0, "sel0", true },
35 { 0x1f, 16, "sel1", true },
36 {}
37 }, "pgraph_rop0_crop_pm_mux" },
38 {}
39 };
40
41 const struct nvkm_specsrc
42 gt200_prop_sources[] = {
43 { 0x408750, (const struct nvkm_specmux[]) {
44 { 0x3f, 0, "sel", true },
45 {}
46 }, "pgraph_tpc0_prop_pm_mux" },
47 {}
48 };
49
50 const struct nvkm_specsrc
51 gt200_tex_sources[] = {
52 { 0x408508, (const struct nvkm_specmux[]) {
53 { 0xfffff, 0, "unk0" },
54 {}
55 }, "pgraph_tpc0_tex_unk08" },
56 {}
57 };
58
59 static const struct nvkm_specdom
60 gt200_pm[] = {
61 { 0x20, (const struct nvkm_specsig[]) {
62 {}
63 }, &nv40_perfctr_func },
64 { 0xf0, (const struct nvkm_specsig[]) {
65 { 0xc9, "pc01_gr_idle" },
66 { 0x84, "pc01_strmout_00" },
67 { 0x85, "pc01_strmout_01" },
68 { 0xde, "pc01_trast_00" },
69 { 0xdf, "pc01_trast_01" },
70 { 0xe0, "pc01_trast_02" },
71 { 0xe1, "pc01_trast_03" },
72 { 0xe4, "pc01_trast_04" },
73 { 0xe5, "pc01_trast_05" },
74 { 0x82, "pc01_vattr_00" },
75 { 0x83, "pc01_vattr_01" },
76 { 0x46, "pc01_vfetch_00", g84_vfetch_sources },
77 { 0x47, "pc01_vfetch_01", g84_vfetch_sources },
78 { 0x48, "pc01_vfetch_02", g84_vfetch_sources },
79 { 0x49, "pc01_vfetch_03", g84_vfetch_sources },
80 { 0x4a, "pc01_vfetch_04", g84_vfetch_sources },
81 { 0x4b, "pc01_vfetch_05", g84_vfetch_sources },
82 { 0x4c, "pc01_vfetch_06", g84_vfetch_sources },
83 { 0x4d, "pc01_vfetch_07", g84_vfetch_sources },
84 { 0x4e, "pc01_vfetch_08", g84_vfetch_sources },
85 { 0x4f, "pc01_vfetch_09", g84_vfetch_sources },
86 { 0x50, "pc01_vfetch_0a", g84_vfetch_sources },
87 { 0x51, "pc01_vfetch_0b", g84_vfetch_sources },
88 { 0x52, "pc01_vfetch_0c", g84_vfetch_sources },
89 { 0x53, "pc01_vfetch_0d", g84_vfetch_sources },
90 { 0x54, "pc01_vfetch_0e", g84_vfetch_sources },
91 { 0x55, "pc01_vfetch_0f", g84_vfetch_sources },
92 { 0x56, "pc01_vfetch_10", g84_vfetch_sources },
93 { 0x57, "pc01_vfetch_11", g84_vfetch_sources },
94 { 0x58, "pc01_vfetch_12", g84_vfetch_sources },
95 { 0x59, "pc01_vfetch_13", g84_vfetch_sources },
96 { 0x5a, "pc01_vfetch_14", g84_vfetch_sources },
97 { 0x5b, "pc01_vfetch_15", g84_vfetch_sources },
98 { 0x5c, "pc01_vfetch_16", g84_vfetch_sources },
99 { 0x5d, "pc01_vfetch_17", g84_vfetch_sources },
100 { 0x5e, "pc01_vfetch_18", g84_vfetch_sources },
101 { 0x5f, "pc01_vfetch_19", g84_vfetch_sources },
102 { 0x07, "pc01_zcull_00", nv50_zcull_sources },
103 { 0x08, "pc01_zcull_01", nv50_zcull_sources },
104 { 0x09, "pc01_zcull_02", nv50_zcull_sources },
105 { 0x0a, "pc01_zcull_03", nv50_zcull_sources },
106 { 0x0b, "pc01_zcull_04", nv50_zcull_sources },
107 { 0x0c, "pc01_zcull_05", nv50_zcull_sources },
108
109 { 0xb0, "pc01_unk00" },
110 { 0xec, "pc01_trailer" },
111 {}
112 }, &nv40_perfctr_func },
113 { 0xf0, (const struct nvkm_specsig[]) {
114 { 0x55, "pc02_crop_00", gt200_crop_sources },
115 { 0x56, "pc02_crop_01", gt200_crop_sources },
116 { 0x57, "pc02_crop_02", gt200_crop_sources },
117 { 0x58, "pc02_crop_03", gt200_crop_sources },
118 { 0x00, "pc02_prop_00", gt200_prop_sources },
119 { 0x01, "pc02_prop_01", gt200_prop_sources },
120 { 0x02, "pc02_prop_02", gt200_prop_sources },
121 { 0x03, "pc02_prop_03", gt200_prop_sources },
122 { 0x04, "pc02_prop_04", gt200_prop_sources },
123 { 0x05, "pc02_prop_05", gt200_prop_sources },
124 { 0x06, "pc02_prop_06", gt200_prop_sources },
125 { 0x07, "pc02_prop_07", gt200_prop_sources },
126 { 0x78, "pc02_tex_00", gt200_tex_sources },
127 { 0x79, "pc02_tex_01", gt200_tex_sources },
128 { 0x7a, "pc02_tex_02", gt200_tex_sources },
129 { 0x7b, "pc02_tex_03", gt200_tex_sources },
130 { 0x32, "pc02_tex_04", gt200_tex_sources },
131 { 0x33, "pc02_tex_05", gt200_tex_sources },
132 { 0x34, "pc02_tex_06", gt200_tex_sources },
133 { 0x74, "pc02_zrop_00", nv50_zrop_sources },
134 { 0x75, "pc02_zrop_01", nv50_zrop_sources },
135 { 0x76, "pc02_zrop_02", nv50_zrop_sources },
136 { 0x77, "pc02_zrop_03", nv50_zrop_sources },
137 { 0xec, "pc02_trailer" },
138 {}
139 }, &nv40_perfctr_func },
140 { 0x20, (const struct nvkm_specsig[]) {
141 {}
142 }, &nv40_perfctr_func },
143 { 0x20, (const struct nvkm_specsig[]) {
144 {}
145 }, &nv40_perfctr_func },
146 { 0x20, (const struct nvkm_specsig[]) {
147 {}
148 }, &nv40_perfctr_func },
149 { 0x20, (const struct nvkm_specsig[]) {
150 {}
151 }, &nv40_perfctr_func },
152 { 0x20, (const struct nvkm_specsig[]) {
153 {}
154 }, &nv40_perfctr_func },
155 {}
156 };
157
158 int
gt200_pm_new(struct nvkm_device * device,int index,struct nvkm_pm ** ppm)159 gt200_pm_new(struct nvkm_device *device, int index, struct nvkm_pm **ppm)
160 {
161 return nv40_pm_new_(gt200_pm, device, index, ppm);
162 }
163