xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/gr/nouveau_nvkm_engine_gr_gp107.c (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: nouveau_nvkm_engine_gr_gp107.c,v 1.2 2021/12/18 23:45:36 riastradh Exp $	*/
2 
3 /*
4  * Copyright 2017 Red Hat Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors: Ben Skeggs <bskeggs@redhat.com>
25  */
26 #include <sys/cdefs.h>
27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_gr_gp107.c,v 1.2 2021/12/18 23:45:36 riastradh Exp $");
28 
29 #include "gf100.h"
30 #include "ctxgf100.h"
31 
32 #include <nvif/class.h>
33 
34 const struct gf100_gr_func
35 gp107_gr = {
36 	.oneinit_tiles = gm200_gr_oneinit_tiles,
37 	.oneinit_sm_id = gm200_gr_oneinit_sm_id,
38 	.init = gf100_gr_init,
39 	.init_gpc_mmu = gm200_gr_init_gpc_mmu,
40 	.init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
41 	.init_zcull = gf117_gr_init_zcull,
42 	.init_num_active_ltcs = gm200_gr_init_num_active_ltcs,
43 	.init_rop_active_fbps = gp100_gr_init_rop_active_fbps,
44 	.init_swdx_pes_mask = gp102_gr_init_swdx_pes_mask,
45 	.init_fecs_exceptions = gp100_gr_init_fecs_exceptions,
46 	.init_ds_hww_esr_2 = gm200_gr_init_ds_hww_esr_2,
47 	.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
48 	.init_419cc0 = gf100_gr_init_419cc0,
49 	.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
50 	.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
51 	.init_504430 = gm107_gr_init_504430,
52 	.init_shader_exceptions = gp100_gr_init_shader_exceptions,
53 	.trap_mp = gf100_gr_trap_mp,
54 	.rops = gm200_gr_rops,
55 	.gpc_nr = 2,
56 	.tpc_nr = 3,
57 	.ppc_nr = 1,
58 	.grctx = &gp107_grctx,
59 	.zbc = &gp102_gr_zbc,
60 	.sclass = {
61 		{ -1, -1, FERMI_TWOD_A },
62 		{ -1, -1, KEPLER_INLINE_TO_MEMORY_B },
63 		{ -1, -1, PASCAL_B, &gf100_fermi },
64 		{ -1, -1, PASCAL_COMPUTE_B },
65 		{}
66 	}
67 };
68 
69 MODULE_FIRMWARE("nvidia/gp107/gr/fecs_bl.bin");
70 MODULE_FIRMWARE("nvidia/gp107/gr/fecs_inst.bin");
71 MODULE_FIRMWARE("nvidia/gp107/gr/fecs_data.bin");
72 MODULE_FIRMWARE("nvidia/gp107/gr/fecs_sig.bin");
73 MODULE_FIRMWARE("nvidia/gp107/gr/gpccs_bl.bin");
74 MODULE_FIRMWARE("nvidia/gp107/gr/gpccs_inst.bin");
75 MODULE_FIRMWARE("nvidia/gp107/gr/gpccs_data.bin");
76 MODULE_FIRMWARE("nvidia/gp107/gr/gpccs_sig.bin");
77 MODULE_FIRMWARE("nvidia/gp107/gr/sw_ctx.bin");
78 MODULE_FIRMWARE("nvidia/gp107/gr/sw_nonctx.bin");
79 MODULE_FIRMWARE("nvidia/gp107/gr/sw_bundle_init.bin");
80 MODULE_FIRMWARE("nvidia/gp107/gr/sw_method_init.bin");
81 
82 static const struct gf100_gr_fwif
83 gp107_gr_fwif[] = {
84 	{ 0, gm200_gr_load, &gp107_gr, &gm200_gr_fecs_acr, &gm200_gr_gpccs_acr },
85 	{}
86 };
87 
88 int
gp107_gr_new(struct nvkm_device * device,int index,struct nvkm_gr ** pgr)89 gp107_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr)
90 {
91 	return gf100_gr_new_(gp107_gr_fwif, device, index, pgr);
92 }
93