1 /* $NetBSD: nouveau_nvkm_subdev_mc_gp100.c,v 1.3 2021/12/19 11:34:45 riastradh Exp $ */
2
3 /*
4 * Copyright 2012 Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Ben Skeggs
25 */
26 #include <sys/cdefs.h>
27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_subdev_mc_gp100.c,v 1.3 2021/12/19 11:34:45 riastradh Exp $");
28
29 #define gp100_mc(p) container_of((p), struct gp100_mc, base)
30 #include "priv.h"
31
32 struct gp100_mc {
33 struct nvkm_mc base;
34 spinlock_t lock;
35 bool intr;
36 u32 mask;
37 };
38
39 static void
gp100_mc_intr_update(struct gp100_mc * mc)40 gp100_mc_intr_update(struct gp100_mc *mc)
41 {
42 struct nvkm_device *device = mc->base.subdev.device;
43 u32 mask = mc->intr ? mc->mask : 0, i;
44 for (i = 0; i < 2; i++) {
45 nvkm_wr32(device, 0x000180 + (i * 0x04), ~mask);
46 nvkm_wr32(device, 0x000160 + (i * 0x04), mask);
47 }
48 }
49
50 void
gp100_mc_intr_unarm(struct nvkm_mc * base)51 gp100_mc_intr_unarm(struct nvkm_mc *base)
52 {
53 struct gp100_mc *mc = gp100_mc(base);
54 unsigned long flags;
55 spin_lock_irqsave(&mc->lock, flags);
56 mc->intr = false;
57 gp100_mc_intr_update(mc);
58 spin_unlock_irqrestore(&mc->lock, flags);
59 }
60
61 void
gp100_mc_intr_rearm(struct nvkm_mc * base)62 gp100_mc_intr_rearm(struct nvkm_mc *base)
63 {
64 struct gp100_mc *mc = gp100_mc(base);
65 unsigned long flags;
66 spin_lock_irqsave(&mc->lock, flags);
67 mc->intr = true;
68 gp100_mc_intr_update(mc);
69 spin_unlock_irqrestore(&mc->lock, flags);
70 }
71
72 void
gp100_mc_intr_mask(struct nvkm_mc * base,u32 mask,u32 intr)73 gp100_mc_intr_mask(struct nvkm_mc *base, u32 mask, u32 intr)
74 {
75 struct gp100_mc *mc = gp100_mc(base);
76 unsigned long flags;
77 spin_lock_irqsave(&mc->lock, flags);
78 mc->mask = (mc->mask & ~mask) | intr;
79 gp100_mc_intr_update(mc);
80 spin_unlock_irqrestore(&mc->lock, flags);
81 }
82
83 const struct nvkm_mc_map
84 gp100_mc_intr[] = {
85 { 0x04000000, NVKM_ENGINE_DISP },
86 { 0x00000100, NVKM_ENGINE_FIFO },
87 { 0x00000200, NVKM_SUBDEV_FAULT },
88 { 0x40000000, NVKM_SUBDEV_IBUS },
89 { 0x10000000, NVKM_SUBDEV_BUS },
90 { 0x08000000, NVKM_SUBDEV_FB },
91 { 0x02000000, NVKM_SUBDEV_LTC },
92 { 0x01000000, NVKM_SUBDEV_PMU },
93 { 0x00200000, NVKM_SUBDEV_GPIO },
94 { 0x00200000, NVKM_SUBDEV_I2C },
95 { 0x00100000, NVKM_SUBDEV_TIMER },
96 { 0x00040000, NVKM_SUBDEV_THERM },
97 { 0x00002000, NVKM_SUBDEV_FB },
98 {},
99 };
100
101 static void *
nv50_mc_dtor(struct nvkm_mc * mc)102 nv50_mc_dtor(struct nvkm_mc *mc)
103 {
104 spin_lock_destroy(&gp100_mc(mc)->lock);
105 return mc;
106 }
107
108 static const struct nvkm_mc_func
109 gp100_mc = {
110 .init = nv50_mc_init,
111 .dtor = nv50_mc_dtor,
112 .intr = gp100_mc_intr,
113 .intr_unarm = gp100_mc_intr_unarm,
114 .intr_rearm = gp100_mc_intr_rearm,
115 .intr_mask = gp100_mc_intr_mask,
116 .intr_stat = gf100_mc_intr_stat,
117 .reset = gk104_mc_reset,
118 };
119
120 int
gp100_mc_new_(const struct nvkm_mc_func * func,struct nvkm_device * device,int index,struct nvkm_mc ** pmc)121 gp100_mc_new_(const struct nvkm_mc_func *func, struct nvkm_device *device,
122 int index, struct nvkm_mc **pmc)
123 {
124 struct gp100_mc *mc;
125
126 if (!(mc = kzalloc(sizeof(*mc), GFP_KERNEL)))
127 return -ENOMEM;
128 nvkm_mc_ctor(func, device, index, &mc->base);
129 *pmc = &mc->base;
130
131 spin_lock_init(&mc->lock);
132 mc->intr = false;
133 mc->mask = 0x7fffffff;
134 return 0;
135 }
136
137 int
gp100_mc_new(struct nvkm_device * device,int index,struct nvkm_mc ** pmc)138 gp100_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
139 {
140 return gp100_mc_new_(&gp100_mc, device, index, pmc);
141 }
142