xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/ltc/nouveau_nvkm_subdev_ltc_gm107.c (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: nouveau_nvkm_subdev_ltc_gm107.c,v 1.3 2021/12/18 23:45:40 riastradh Exp $	*/
2 
3 /*
4  * Copyright 2014 Red Hat Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors: Ben Skeggs
25  */
26 #include <sys/cdefs.h>
27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_subdev_ltc_gm107.c,v 1.3 2021/12/18 23:45:40 riastradh Exp $");
28 
29 #include "priv.h"
30 
31 #include <subdev/fb.h>
32 #include <subdev/timer.h>
33 
34 void
gm107_ltc_cbc_clear(struct nvkm_ltc * ltc,u32 start,u32 limit)35 gm107_ltc_cbc_clear(struct nvkm_ltc *ltc, u32 start, u32 limit)
36 {
37 	struct nvkm_device *device = ltc->subdev.device;
38 	nvkm_wr32(device, 0x17e270, start);
39 	nvkm_wr32(device, 0x17e274, limit);
40 	nvkm_mask(device, 0x17e26c, 0x00000000, 0x00000004);
41 }
42 
43 void
gm107_ltc_cbc_wait(struct nvkm_ltc * ltc)44 gm107_ltc_cbc_wait(struct nvkm_ltc *ltc)
45 {
46 	struct nvkm_device *device = ltc->subdev.device;
47 	int c, s;
48 	for (c = 0; c < ltc->ltc_nr; c++) {
49 		for (s = 0; s < ltc->lts_nr; s++) {
50 			const u32 addr = 0x14046c + (c * 0x2000) + (s * 0x200);
51 			nvkm_wait_msec(device, 2000, addr,
52 				       0x00000004, 0x00000000);
53 		}
54 	}
55 }
56 
57 void
gm107_ltc_zbc_clear_color(struct nvkm_ltc * ltc,int i,const u32 color[4])58 gm107_ltc_zbc_clear_color(struct nvkm_ltc *ltc, int i, const u32 color[4])
59 {
60 	struct nvkm_device *device = ltc->subdev.device;
61 	nvkm_mask(device, 0x17e338, 0x0000000f, i);
62 	nvkm_wr32(device, 0x17e33c, color[0]);
63 	nvkm_wr32(device, 0x17e340, color[1]);
64 	nvkm_wr32(device, 0x17e344, color[2]);
65 	nvkm_wr32(device, 0x17e348, color[3]);
66 }
67 
68 void
gm107_ltc_zbc_clear_depth(struct nvkm_ltc * ltc,int i,const u32 depth)69 gm107_ltc_zbc_clear_depth(struct nvkm_ltc *ltc, int i, const u32 depth)
70 {
71 	struct nvkm_device *device = ltc->subdev.device;
72 	nvkm_mask(device, 0x17e338, 0x0000000f, i);
73 	nvkm_wr32(device, 0x17e34c, depth);
74 }
75 
76 void
gm107_ltc_intr_lts(struct nvkm_ltc * ltc,int c,int s)77 gm107_ltc_intr_lts(struct nvkm_ltc *ltc, int c, int s)
78 {
79 	struct nvkm_subdev *subdev = &ltc->subdev;
80 	struct nvkm_device *device = subdev->device;
81 	u32 base = 0x140400 + (c * 0x2000) + (s * 0x200);
82 	u32 intr = nvkm_rd32(device, base + 0x00c);
83 	u16 stat = intr & 0x0000ffff;
84 	char msg[128];
85 
86 	if (stat) {
87 		nvkm_snprintbf(msg, sizeof(msg), gf100_ltc_lts_intr_name, stat);
88 		nvkm_error(subdev, "LTC%d_LTS%d: %08x [%s]\n", c, s, intr, msg);
89 	}
90 
91 	nvkm_wr32(device, base + 0x00c, intr);
92 }
93 
94 void
gm107_ltc_intr(struct nvkm_ltc * ltc)95 gm107_ltc_intr(struct nvkm_ltc *ltc)
96 {
97 	struct nvkm_device *device = ltc->subdev.device;
98 	u32 mask;
99 
100 	mask = nvkm_rd32(device, 0x00017c);
101 	while (mask) {
102 		u32 s, c = __ffs(mask);
103 		for (s = 0; s < ltc->lts_nr; s++)
104 			gm107_ltc_intr_lts(ltc, c, s);
105 		mask &= ~(1 << c);
106 	}
107 }
108 
109 static int
gm107_ltc_oneinit(struct nvkm_ltc * ltc)110 gm107_ltc_oneinit(struct nvkm_ltc *ltc)
111 {
112 	struct nvkm_device *device = ltc->subdev.device;
113 	const u32 parts = nvkm_rd32(device, 0x022438);
114 	const u32  mask = nvkm_rd32(device, 0x021c14);
115 	const u32 slice = nvkm_rd32(device, 0x17e280) >> 28;
116 	int i;
117 
118 	for (i = 0; i < parts; i++) {
119 		if (!(mask & (1 << i)))
120 			ltc->ltc_nr++;
121 	}
122 	ltc->lts_nr = slice;
123 
124 	return gf100_ltc_oneinit_tag_ram(ltc);
125 }
126 
127 static void
gm107_ltc_init(struct nvkm_ltc * ltc)128 gm107_ltc_init(struct nvkm_ltc *ltc)
129 {
130 	struct nvkm_device *device = ltc->subdev.device;
131 	u32 lpg128 = !(nvkm_rd32(device, 0x100c80) & 0x00000001);
132 
133 	nvkm_wr32(device, 0x17e27c, ltc->ltc_nr);
134 	nvkm_wr32(device, 0x17e278, ltc->tag_base);
135 	nvkm_mask(device, 0x17e264, 0x00000002, lpg128 ? 0x00000002 : 0x00000000);
136 }
137 
138 static const struct nvkm_ltc_func
139 gm107_ltc = {
140 	.oneinit = gm107_ltc_oneinit,
141 	.init = gm107_ltc_init,
142 	.intr = gm107_ltc_intr,
143 	.cbc_clear = gm107_ltc_cbc_clear,
144 	.cbc_wait = gm107_ltc_cbc_wait,
145 	.zbc = 16,
146 	.zbc_clear_color = gm107_ltc_zbc_clear_color,
147 	.zbc_clear_depth = gm107_ltc_zbc_clear_depth,
148 	.invalidate = gf100_ltc_invalidate,
149 	.flush = gf100_ltc_flush,
150 };
151 
152 int
gm107_ltc_new(struct nvkm_device * device,int index,struct nvkm_ltc ** pltc)153 gm107_ltc_new(struct nvkm_device *device, int index, struct nvkm_ltc **pltc)
154 {
155 	return nvkm_ltc_new_(&gm107_ltc, device, index, pltc);
156 }
157