1 /* $NetBSD: nouveau_nvkm_engine_dma_usergf119.c,v 1.3 2021/12/18 23:45:35 riastradh Exp $ */
2
3 /*
4 * Copyright 2012 Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Ben Skeggs
25 */
26 #include <sys/cdefs.h>
27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_dma_usergf119.c,v 1.3 2021/12/18 23:45:35 riastradh Exp $");
28
29 #define gf119_dmaobj(p) container_of((p), struct gf119_dmaobj, base)
30 #include "user.h"
31
32 #include <core/client.h>
33 #include <core/gpuobj.h>
34 #include <subdev/fb.h>
35
36 #include <nvif/cl0002.h>
37 #include <nvif/unpack.h>
38
39 struct gf119_dmaobj {
40 struct nvkm_dmaobj base;
41 u32 flags0;
42 };
43
44 static int
gf119_dmaobj_bind(struct nvkm_dmaobj * base,struct nvkm_gpuobj * parent,int align,struct nvkm_gpuobj ** pgpuobj)45 gf119_dmaobj_bind(struct nvkm_dmaobj *base, struct nvkm_gpuobj *parent,
46 int align, struct nvkm_gpuobj **pgpuobj)
47 {
48 struct gf119_dmaobj *dmaobj = gf119_dmaobj(base);
49 struct nvkm_device *device = dmaobj->base.dma->engine.subdev.device;
50 int ret;
51
52 ret = nvkm_gpuobj_new(device, 24, align, false, parent, pgpuobj);
53 if (ret == 0) {
54 nvkm_kmap(*pgpuobj);
55 nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0);
56 nvkm_wo32(*pgpuobj, 0x04, dmaobj->base.start >> 8);
57 nvkm_wo32(*pgpuobj, 0x08, dmaobj->base.limit >> 8);
58 nvkm_wo32(*pgpuobj, 0x0c, 0x00000000);
59 nvkm_wo32(*pgpuobj, 0x10, 0x00000000);
60 nvkm_wo32(*pgpuobj, 0x14, 0x00000000);
61 nvkm_done(*pgpuobj);
62 }
63
64 return ret;
65 }
66
67 static const struct nvkm_dmaobj_func
68 gf119_dmaobj_func = {
69 .bind = gf119_dmaobj_bind,
70 };
71
72 int
gf119_dmaobj_new(struct nvkm_dma * dma,const struct nvkm_oclass * oclass,void * data,u32 size,struct nvkm_dmaobj ** pdmaobj)73 gf119_dmaobj_new(struct nvkm_dma *dma, const struct nvkm_oclass *oclass,
74 void *data, u32 size, struct nvkm_dmaobj **pdmaobj)
75 {
76 union {
77 struct gf119_dma_v0 v0;
78 } *args;
79 struct nvkm_object *parent = oclass->parent;
80 struct gf119_dmaobj *dmaobj;
81 u32 kind, page;
82 int ret;
83
84 if (!(dmaobj = kzalloc(sizeof(*dmaobj), GFP_KERNEL)))
85 return -ENOMEM;
86 *pdmaobj = &dmaobj->base;
87
88 ret = nvkm_dmaobj_ctor(&gf119_dmaobj_func, dma, oclass,
89 &data, &size, &dmaobj->base);
90 if (ret)
91 return ret;
92
93 ret = -ENOSYS;
94 args = data;
95
96 nvif_ioctl(parent, "create gf119 dma size %d\n", size);
97 if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) {
98 nvif_ioctl(parent,
99 "create gf100 dma vers %d page %d kind %02x\n",
100 args->v0.version, args->v0.page, args->v0.kind);
101 kind = args->v0.kind;
102 page = args->v0.page;
103 } else
104 if (size == 0) {
105 if (dmaobj->base.target != NV_MEM_TARGET_VM) {
106 kind = GF119_DMA_V0_KIND_PITCH;
107 page = GF119_DMA_V0_PAGE_SP;
108 } else {
109 kind = GF119_DMA_V0_KIND_VM;
110 page = GF119_DMA_V0_PAGE_LP;
111 }
112 } else
113 return ret;
114
115 if (page > 1)
116 return -EINVAL;
117 dmaobj->flags0 = (kind << 20) | (page << 6);
118
119 switch (dmaobj->base.target) {
120 case NV_MEM_TARGET_VRAM:
121 dmaobj->flags0 |= 0x00000009;
122 break;
123 case NV_MEM_TARGET_VM:
124 case NV_MEM_TARGET_PCI:
125 case NV_MEM_TARGET_PCI_NOSNOOP:
126 /* XXX: don't currently know how to construct a real one
127 * of these. we only use them to represent pushbufs
128 * on these chipsets, and the classes that use them
129 * deal with the target themselves.
130 */
131 break;
132 default:
133 return -EINVAL;
134 }
135
136 return 0;
137 }
138