xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/gr/nouveau_nvkm_engine_gr_gf104.c (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: nouveau_nvkm_engine_gr_gf104.c,v 1.3 2021/12/18 23:45:36 riastradh Exp $	*/
2 
3 /*
4  * Copyright 2013 Red Hat Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors: Ben Skeggs <bskeggs@redhat.com>
25  */
26 #include <sys/cdefs.h>
27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_gr_gf104.c,v 1.3 2021/12/18 23:45:36 riastradh Exp $");
28 
29 #include "gf100.h"
30 #include "ctxgf100.h"
31 
32 #include <nvif/class.h>
33 
34 /*******************************************************************************
35  * PGRAPH register lists
36  ******************************************************************************/
37 
38 const struct gf100_gr_init
39 gf104_gr_init_ds_0[] = {
40 	{ 0x405844,   1, 0x04, 0x00ffffff },
41 	{ 0x405850,   1, 0x04, 0x00000000 },
42 	{ 0x405900,   1, 0x04, 0x00002834 },
43 	{ 0x405908,   1, 0x04, 0x00000000 },
44 	{}
45 };
46 
47 const struct gf100_gr_init
48 gf104_gr_init_tex_0[] = {
49 	{ 0x419ab0,   1, 0x04, 0x00000000 },
50 	{ 0x419ac8,   1, 0x04, 0x00000000 },
51 	{ 0x419ab8,   1, 0x04, 0x000000e7 },
52 	{ 0x419abc,   2, 0x04, 0x00000000 },
53 	{}
54 };
55 
56 static const struct gf100_gr_init
57 gf104_gr_init_pe_0[] = {
58 	{ 0x41980c,   3, 0x04, 0x00000000 },
59 	{ 0x419844,   1, 0x04, 0x00000000 },
60 	{ 0x41984c,   1, 0x04, 0x00005bc5 },
61 	{ 0x419850,   4, 0x04, 0x00000000 },
62 	{ 0x419880,   1, 0x04, 0x00000002 },
63 	{}
64 };
65 
66 const struct gf100_gr_init
67 gf104_gr_init_sm_0[] = {
68 	{ 0x419e00,   1, 0x04, 0x00000000 },
69 	{ 0x419ea0,   1, 0x04, 0x00000000 },
70 	{ 0x419ea4,   1, 0x04, 0x00000100 },
71 	{ 0x419ea8,   1, 0x04, 0x00001100 },
72 	{ 0x419eac,   1, 0x04, 0x11100702 },
73 	{ 0x419eb0,   1, 0x04, 0x00000003 },
74 	{ 0x419eb4,   4, 0x04, 0x00000000 },
75 	{ 0x419ec8,   1, 0x04, 0x0e063818 },
76 	{ 0x419ecc,   1, 0x04, 0x0e060e06 },
77 	{ 0x419ed0,   1, 0x04, 0x00003818 },
78 	{ 0x419ed4,   1, 0x04, 0x011104f1 },
79 	{ 0x419edc,   1, 0x04, 0x00000000 },
80 	{ 0x419f00,   1, 0x04, 0x00000000 },
81 	{ 0x419f2c,   1, 0x04, 0x00000000 },
82 	{}
83 };
84 
85 static const struct gf100_gr_pack
86 gf104_gr_pack_mmio[] = {
87 	{ gf100_gr_init_main_0 },
88 	{ gf100_gr_init_fe_0 },
89 	{ gf100_gr_init_pri_0 },
90 	{ gf100_gr_init_rstr2d_0 },
91 	{ gf100_gr_init_pd_0 },
92 	{ gf104_gr_init_ds_0 },
93 	{ gf100_gr_init_scc_0 },
94 	{ gf100_gr_init_prop_0 },
95 	{ gf100_gr_init_gpc_unk_0 },
96 	{ gf100_gr_init_setup_0 },
97 	{ gf100_gr_init_crstr_0 },
98 	{ gf100_gr_init_setup_1 },
99 	{ gf100_gr_init_zcull_0 },
100 	{ gf100_gr_init_gpm_0 },
101 	{ gf100_gr_init_gpc_unk_1 },
102 	{ gf100_gr_init_gcc_0 },
103 	{ gf100_gr_init_tpccs_0 },
104 	{ gf104_gr_init_tex_0 },
105 	{ gf104_gr_init_pe_0 },
106 	{ gf100_gr_init_l1c_0 },
107 	{ gf100_gr_init_wwdx_0 },
108 	{ gf100_gr_init_tpccs_1 },
109 	{ gf100_gr_init_mpc_0 },
110 	{ gf104_gr_init_sm_0 },
111 	{ gf100_gr_init_be_0 },
112 	{ gf100_gr_init_fe_1 },
113 	{}
114 };
115 
116 /*******************************************************************************
117  * PGRAPH engine/subdev functions
118  ******************************************************************************/
119 
120 static const struct gf100_gr_func
121 gf104_gr = {
122 	.oneinit_tiles = gf100_gr_oneinit_tiles,
123 	.oneinit_sm_id = gf100_gr_oneinit_sm_id,
124 	.init = gf100_gr_init,
125 	.init_gpc_mmu = gf100_gr_init_gpc_mmu,
126 	.init_vsc_stream_master = gf100_gr_init_vsc_stream_master,
127 	.init_zcull = gf100_gr_init_zcull,
128 	.init_num_active_ltcs = gf100_gr_init_num_active_ltcs,
129 	.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
130 	.init_40601c = gf100_gr_init_40601c,
131 	.init_419cc0 = gf100_gr_init_419cc0,
132 	.init_419eb4 = gf100_gr_init_419eb4,
133 	.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
134 	.init_shader_exceptions = gf100_gr_init_shader_exceptions,
135 	.init_400054 = gf100_gr_init_400054,
136 	.trap_mp = gf100_gr_trap_mp,
137 	.mmio = gf104_gr_pack_mmio,
138 	.fecs.ucode = &gf100_gr_fecs_ucode,
139 	.gpccs.ucode = &gf100_gr_gpccs_ucode,
140 	.rops = gf100_gr_rops,
141 	.grctx = &gf104_grctx,
142 	.zbc = &gf100_gr_zbc,
143 	.sclass = {
144 		{ -1, -1, FERMI_TWOD_A },
145 		{ -1, -1, FERMI_MEMORY_TO_MEMORY_FORMAT_A },
146 		{ -1, -1, FERMI_A, &gf100_fermi },
147 		{ -1, -1, FERMI_COMPUTE_A },
148 		{}
149 	}
150 };
151 
152 static const struct gf100_gr_fwif
153 gf104_gr_fwif[] = {
154 	{ -1, gf100_gr_load, &gf104_gr },
155 	{ -1, gf100_gr_nofw, &gf104_gr },
156 	{}
157 };
158 
159 int
gf104_gr_new(struct nvkm_device * device,int index,struct nvkm_gr ** pgr)160 gf104_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr)
161 {
162 	return gf100_gr_new_(gf104_gr_fwif, device, index, pgr);
163 }
164