| /llvm-project/llvm/include/llvm/MC/ |
| H A D | MachineLocation.h | 47 unsigned getReg() const { return Register; } in getReg() function
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| H A D | MCInst.h | 69 unsigned getReg() const { getReg() function
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| /llvm-project/llvm/lib/CodeGen/ |
| H A D | MIRVRegNamerUtils.h | 45 Register getReg() const { return Reg; } in getReg() function
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| /llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | LiveRangeEdit.h | 145 Register getReg() const { return getParent().reg(); } in getReg() function
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| H A D | ScheduleDAG.h | 218 unsigned getReg() const { in getReg() function
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| H A D | MachineInstrBuilder.h | 96 Register getReg(unsigned Idx) const { return MI->getOperand(Idx).getReg(); } in getReg() function
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| H A D | MachineOperand.h | 369 Register getReg() const { in getReg() function
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| H A D | MachineFrameInfo.h | 61 Register getReg() const { return Reg; } in getReg() function
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| /llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | Utils.h | 401 Register getReg() const { getReg() function
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| H A D | GenericMachineInstrs.h | 38 Register getReg(unsigned Idx) const { return getOperand(Idx).getReg(); } in getReg() function
[all...] |
| H A D | MachineIRBuilder.h | 111 Register getReg() const { getReg() function
183 Register getReg() const { getReg() function
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| /llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsOptimizePICCall.cpp | 306 unsigned OptimizePICCall::getReg(ValueType Entry) { in getReg() function in OptimizePICCall
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| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonTfrCleanup.cpp | 104 bool HexagonTfrCleanup::getReg(unsigned Reg, uint64_t &Val, getReg() function in HexagonTfrCleanup
[all...] |
| /llvm-project/llvm/lib/Target/BPF/AsmParser/ |
| H A D | BPFAsmParser.cpp | 151 MCRegister getReg() const override { getReg() function
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| /llvm-project/llvm/lib/Target/MSP430/AsmParser/ |
| H A D | MSP430AsmParser.cpp | 186 MCRegister getReg() const override { getReg() function in __anon0a319ea10111::MSP430Operand
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| /llvm-project/libunwind/src/ |
| H A D | UnwindCursor.hpp | 434 virtual unw_word_t getReg(int) { _LIBUNWIND_ABORT("getReg not implemented"); } in getReg() function in libunwind::AbstractUnwindCursor
706 unw_word_t UnwindCursor<A, R>::getReg(int regNum) { in getReg() function in libunwind::UnwindCursor
1348 unw_word_t UnwindCursor<A, R>::getReg(int regNum) { getReg() function in libunwind::UnwindCursor
[all...] |
| /llvm-project/llvm/lib/Target/AVR/AsmParser/ |
| H A D | AVRAsmParser.cpp | 198 MCRegister getReg() const override { getReg() function in __anon6f0156450111::AVROperand
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| /llvm-project/llvm/utils/TableGen/ |
| H A D | FastISelEmitter.cpp | 100 static OpKind getReg() { in getReg() function in __anon9d8da9a30311::OperandsSignature::OpKind
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| /llvm-project/llvm/lib/Target/Xtensa/AsmParser/ |
| H A D | XtensaAsmParser.cpp | 261 MCRegister getReg() const override { getReg() function
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| /llvm-project/llvm/lib/Target/M68k/AsmParser/ |
| H A D | M68kAsmParser.cpp | 315 MCRegister M68kOperand::getReg() const { getReg() function in M68kOperand
[all...] |
| /llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFastISel.cpp | 87 unsigned getReg() const { getReg() function in __anon23491d1f0111::WebAssemblyFastISel::Address
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| /llvm-project/llvm/lib/Target/XCore/Disassembler/ |
| H A D | XCoreDisassembler.cpp | 69 static unsigned getReg(const MCDisassembler *D, unsigned RC, unsigned RegNo) { in getReg() function
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| /llvm-project/llvm/utils/TableGen/Common/ |
| H A D | CodeGenRegisters.cpp | 235 const CodeGenRegister *getReg() const { in getReg() function in __anon00249bb30111::RegUnitIterator
1344 CodeGenRegister *CodeGenRegBank::getReg(cons function in CodeGenRegBank
[all...] |
| /llvm-project/llvm/lib/Target/WebAssembly/AsmParser/ |
| H A D | WebAssemblyAsmParser.cpp | 103 MCRegister getReg() const override { getReg() function
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| /llvm-project/llvm/include/llvm/MCA/ |
| H A D | Instruction.h | 74 unsigned getReg() const { in getReg() function
|