1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2022 Intel Corporation 3 */ 4 5 #ifndef _RTE_ACC_COMMON_CFG_H_ 6 #define _RTE_ACC_COMMON_CFG_H_ 7 8 /** 9 * @file rte_acc_common_cfg.h 10 * 11 * Functions for configuring ACC HW, exposed directly to applications. 12 * Configuration related to encoding/decoding is done through the 13 * librte_bbdev library. 14 * 15 * @warning 16 * @b EXPERIMENTAL: this API may change without prior notice 17 */ 18 19 #include <stdint.h> 20 #include <stdbool.h> 21 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 26 /**< Maximum number of Virtual Functions ACC may support */ 27 #define RTE_ACC_NUM_VFS 64 28 29 /** 30 * Definition of Queue Topology for ACC Configuration 31 * Some level of details is abstracted out to expose a clean interface 32 * given that comprehensive flexibility is not required 33 */ 34 struct rte_acc_queue_topology { 35 /** Number of QGroups in incremental order of priority */ 36 uint16_t num_qgroups; 37 /** 38 * All QGroups have the same number of AQs here. 39 * Note : Could be made a 16-array if more flexibility is really 40 * required 41 */ 42 uint16_t num_aqs_per_groups; 43 /** 44 * Depth of the AQs is the same of all QGroups here. Log2 Enum : 2^N 45 * Note : Could be made a 16-array if more flexibility is really 46 * required 47 */ 48 uint16_t aq_depth_log2; 49 /** 50 * Index of the first Queue Group Index - assuming contiguity 51 * Initialized as -1 52 */ 53 int8_t first_qgroup_index; 54 }; 55 56 /** 57 * Definition of Arbitration related parameters for ACC Configuration 58 */ 59 struct rte_acc_arbitration { 60 /** Default Weight for VF Fairness Arbitration */ 61 uint16_t round_robin_weight; 62 uint32_t gbr_threshold1; /**< Guaranteed Bitrate Threshold 1 */ 63 uint32_t gbr_threshold2; /**< Guaranteed Bitrate Threshold 2 */ 64 }; 65 66 /** 67 * Structure to pass ACC configuration. 68 * Note: all VF Bundles will have the same configuration. 69 */ 70 struct rte_acc_conf { 71 bool pf_mode_en; /**< 1 if PF is used for dataplane, 0 for VFs */ 72 /** 1 if input '1' bit is represented by a positive LLR value, 0 if '1' 73 * bit is represented by a negative value. 74 */ 75 bool input_pos_llr_1_bit; 76 /** 1 if output '1' bit is represented by a positive value, 0 if '1' 77 * bit is represented by a negative value. 78 */ 79 bool output_pos_llr_1_bit; 80 uint16_t num_vf_bundles; /**< Number of VF bundles to setup */ 81 /** Queue topology for each operation type */ 82 struct rte_acc_queue_topology q_ul_4g; 83 struct rte_acc_queue_topology q_dl_4g; 84 struct rte_acc_queue_topology q_ul_5g; 85 struct rte_acc_queue_topology q_dl_5g; 86 struct rte_acc_queue_topology q_fft; 87 struct rte_acc_queue_topology q_mld; 88 /** Arbitration configuration for each operation type */ 89 struct rte_acc_arbitration arb_ul_4g[RTE_ACC_NUM_VFS]; 90 struct rte_acc_arbitration arb_dl_4g[RTE_ACC_NUM_VFS]; 91 struct rte_acc_arbitration arb_ul_5g[RTE_ACC_NUM_VFS]; 92 struct rte_acc_arbitration arb_dl_5g[RTE_ACC_NUM_VFS]; 93 struct rte_acc_arbitration arb_fft[RTE_ACC_NUM_VFS]; 94 struct rte_acc_arbitration arb_mld[RTE_ACC_NUM_VFS]; 95 }; 96 97 #ifdef __cplusplus 98 } 99 #endif 100 101 #endif /* _RTE_ACC_COMMON_CFG_H_ */ 102