1 #ifndef FPU_H 2 #define FPU_H 3 4 /* x87 FPU state, MMX Technolodgy. 5 * 108 bytes.*/ 6 struct fpu_regs_s { 7 u16_t fp_control; /* control */ 8 u16_t fp_unused_1; 9 u16_t fp_status; /* status */ 10 u16_t fp_unused_2; 11 u16_t fp_tag; /* register tags */ 12 u16_t fp_unused_3; 13 u32_t fp_eip; /* eip at failed instruction */ 14 u16_t fp_cs; /* cs at failed instruction */ 15 u16_t fp_opcode; /* opcode of failed instruction */ 16 u32_t fp_dp; /* data address */ 17 u16_t fp_ds; /* data segment */ 18 u16_t fp_unused_4; 19 u16_t fp_st_regs[8][5]; /* 8 80-bit FP registers */ 20 }; 21 22 /* x87 FPU, MMX Technolodgy and SSE state. 23 * 512 bytes (if you need size use FPU_XFP_SIZE). */ 24 struct xfp_save { 25 u16_t fp_control; /* control */ 26 u16_t fp_status; /* status */ 27 u16_t fp_tag; /* register tags */ 28 u16_t fp_opcode; /* opcode of failed instruction */ 29 u32_t fp_eip; /* eip at failed instruction */ 30 u16_t fp_cs; /* cs at failed instruction */ 31 u16_t fp_unused_1; 32 u32_t fp_dp; /* data address */ 33 u16_t fp_ds; /* data segment */ 34 u16_t fp_unused_2; 35 u32_t fp_mxcsr; /* MXCSR */ 36 u32_t fp_mxcsr_mask; /* MXCSR_MASK */ 37 u16_t fp_st_regs[8][8]; /* 128 bytes for ST/MM regs */ 38 u32_t fp_xreg_word[32]; /* space for 8 128-bit XMM registers */ 39 u32_t fp_padding[56]; 40 }; 41 42 /* Size of xfp_save structure. */ 43 #define FPU_XFP_SIZE 512 44 45 union fpu_state_u { 46 struct fpu_regs_s fpu_regs; 47 struct xfp_save xfp_regs; 48 }; 49 50 #endif /* #ifndef FPU_H */ 51