1 /* $NetBSD: intr.c,v 1.9 2020/12/19 21:27:52 thorpej Exp $ */
2
3 /*-
4 * Copyright (C) 2005 NONAKA Kimihiro <nonaka@netbsd.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */
27
28 #include <sys/cdefs.h>
29 __KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.9 2020/12/19 21:27:52 thorpej Exp $");
30
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/kernel.h>
34 #include <sys/kmem.h>
35 #include <sys/device.h>
36
37 #include <sh3/exception.h>
38
39 #include <machine/intr.h>
40
41 #define _N_EXTINTR 8
42
43 #define LANDISK_INTEN 0xb0000005
44 #define INTEN_ALL_MASK 0x00
45
46 struct intrhand {
47 int (*ih_fun)(void *);
48 void *ih_arg;
49 struct intrhand *ih_next;
50 int ih_enable;
51 int ih_level;
52 int ih_irq;
53 struct evcnt ih_evcnt;
54 };
55
56 struct extintr_handler {
57 int (*eih_func)(void *eih_arg);
58 void *eih_arg;
59 struct intrhand *eih_ih;
60 int eih_nih;
61 };
62
63 static struct extintr_handler extintr_handler[_N_EXTINTR];
64
65 static const char *extintr_names[_N_EXTINTR] = {
66 "irq5", "irq6", "irq7", "irq8",
67 "irq9", "irq10", "irq11", "irq12"
68 };
69
70 static int fakeintr(void *arg);
71 static int extintr_intr_handler(void *arg);
72
73 void
intc_intr(int ssr,int spc,int ssp)74 intc_intr(int ssr, int spc, int ssp)
75 {
76 struct intc_intrhand *ih;
77 struct clockframe cf;
78 int evtcode;
79
80 curcpu()->ci_data.cpu_nintr++;
81
82 evtcode = _reg_read_4(SH4_INTEVT);
83 ih = EVTCODE_IH(evtcode);
84 KDASSERT(ih->ih_func);
85
86 switch (evtcode) {
87 #if 0
88 #define IRL(irq) (0x200 + ((irq) << 5))
89 case IRL(5): case IRL(6): case IRL(7): case IRL(8):
90 case IRL(9): case IRL(10): case IRL(11): case IRL(12):
91 {
92 int level;
93 uint8_t inten, bit;
94
95 bit = 1 << (EVTCODE_TO_MAP_INDEX(evtcode) - 5);
96 inten = _reg_read_1(LANDISK_INTEN);
97 _reg_write_1(LANDISK_INTEN, inten & ~bit);
98 level = (_IPL_NSOFT + 1) << 4; /* disable softintr */
99 ssr &= 0xf0;
100 if (level < ssr)
101 level = ssr;
102 (void)_cpu_intr_resume(level);
103 (*ih->ih_func)(ih->ih_arg);
104 _reg_write_1(LANDISK_INTEN, inten);
105 break;
106 }
107 #endif
108 default:
109 (void)_cpu_intr_resume(ih->ih_level);
110 (*ih->ih_func)(ih->ih_arg);
111 break;
112
113 case SH_INTEVT_TMU0_TUNI0:
114 (void)_cpu_intr_resume(ih->ih_level);
115 cf.spc = spc;
116 cf.ssr = ssr;
117 cf.ssp = ssp;
118 (*ih->ih_func)(&cf);
119 break;
120
121 case SH_INTEVT_NMI:
122 printf("NMI ignored.\n");
123 break;
124 }
125 }
126
127 void
intr_init(void)128 intr_init(void)
129 {
130
131 _reg_write_1(LANDISK_INTEN, INTEN_ALL_MASK);
132 }
133
134 void *
extintr_establish(int irq,int level,int (* ih_fun)(void *),void * ih_arg)135 extintr_establish(int irq, int level, int (*ih_fun)(void *), void *ih_arg)
136 {
137 static struct intrhand fakehand = {fakeintr};
138 struct extintr_handler *eih;
139 struct intrhand **p, *q, *ih;
140 const char *name;
141 int evtcode;
142 int s;
143
144 KDASSERT(irq >= 5 && irq <= 12);
145
146 ih = kmem_alloc(sizeof(*ih), KM_SLEEP);
147
148 s = _cpu_intr_suspend();
149
150 switch (level) {
151 default:
152 #if defined(DEBUG)
153 panic("extintr_establish: unknown level %d", level);
154 /*NOTREACHED*/
155 #endif
156 case IPL_VM:
157 break;
158 }
159
160 eih = &extintr_handler[irq - 5];
161 if (eih->eih_func == NULL) {
162 evtcode = 0x200 + (irq << 5);
163 eih->eih_func = intc_intr_establish(evtcode, IST_LEVEL, level,
164 extintr_intr_handler, eih);
165 }
166
167 /*
168 * Figure out where to put the handler.
169 * This is O(N^2), but we want to preserve the order, and N is
170 * generally small.
171 */
172 for (p = &eih->eih_ih; (q = *p) != NULL; p = &q->ih_next)
173 continue;
174
175 /*
176 * Actually install a fake handler momentarily, since we might be doing
177 * this with interrupts enabled and don't want the real routine called
178 * until masking is set up.
179 */
180 fakehand.ih_level = level;
181 *p = &fakehand;
182
183 /*
184 * Poke the real handler in now.
185 */
186 memset(ih, 0, sizeof(*ih));
187 ih->ih_fun = ih_fun;
188 ih->ih_arg = ih_arg;
189 ih->ih_next = NULL;
190 ih->ih_enable = 1;
191 ih->ih_level = level;
192 ih->ih_irq = irq - 5;
193 name = extintr_names[irq - 5];
194 evcnt_attach_dynamic(&ih->ih_evcnt, EVCNT_TYPE_INTR,
195 NULL, "ext", name);
196 *p = ih;
197
198 if (++eih->eih_nih == 1) {
199 /* Unmask interrupt */
200 _reg_bset_1(LANDISK_INTEN, (1 << (irq - 5)));
201 }
202
203 splx(s);
204
205 return (ih);
206 }
207
208 void
extintr_disestablish(void * aux)209 extintr_disestablish(void *aux)
210 {
211 struct intrhand *ih = aux;
212 struct intrhand **p, *q;
213 struct extintr_handler *eih;
214 int irq;
215 int s;
216
217 KDASSERT(ih != NULL);
218
219 s = _cpu_intr_suspend();
220
221 irq = ih->ih_irq;
222 eih = &extintr_handler[irq];
223
224 /*
225 * Remove the handler from the chain.
226 * This is O(n^2), too.
227 */
228 for (p = &eih->eih_ih; (q = *p) != NULL && q != ih; p = &q->ih_next)
229 continue;
230 if (q == NULL)
231 panic("extintr_disestablish: handler not registered");
232
233 *p = q->ih_next;
234
235 evcnt_detach(&ih->ih_evcnt);
236
237 kmem_free((void *)ih, sizeof(*ih));
238
239 if (--eih->eih_nih == 0) {
240 intc_intr_disestablish(eih->eih_func);
241
242 /* Mask interrupt */
243 _reg_bclr_1(LANDISK_INTEN, (1 << irq));
244 }
245
246 splx(s);
247 }
248
249 void
extintr_enable(void * aux)250 extintr_enable(void *aux)
251 {
252 struct intrhand *ih = aux;
253 struct intrhand *p, *q __debugused;
254 struct extintr_handler *eih;
255 int irq;
256 int cnt;
257 int s;
258
259 KDASSERT(ih != NULL);
260
261 s = _cpu_intr_suspend();
262
263 irq = ih->ih_irq;
264 KDASSERT(irq >= 0 && irq < 8);
265 eih = &extintr_handler[irq];
266 for (cnt = 0, p = eih->eih_ih, q = NULL; p != NULL; p = p->ih_next) {
267 if (p->ih_enable) {
268 cnt++;
269 }
270 if (p == ih) {
271 q = p;
272 p->ih_enable = 1;
273 }
274 }
275 KDASSERT(q != NULL);
276
277 if (cnt == 0) {
278 /* Unmask interrupt */
279 _reg_bset_1(LANDISK_INTEN, (1 << irq));
280 }
281
282 splx(s);
283 }
284
285 void
extintr_disable(void * aux)286 extintr_disable(void *aux)
287 {
288 struct intrhand *ih = aux;
289 struct intrhand *p, *q __debugused;
290 struct extintr_handler *eih;
291 int irq;
292 int cnt;
293 int s;
294
295 KDASSERT(ih != NULL);
296
297 s = _cpu_intr_suspend();
298
299 irq = ih->ih_irq;
300 KDASSERT(irq >= 0 && irq < 8);
301 eih = &extintr_handler[irq];
302 for (cnt = 0, p = eih->eih_ih, q = NULL; p != NULL; p = p->ih_next) {
303 if (p == ih) {
304 q = p;
305 p->ih_enable = 0;
306 }
307 if (!ih->ih_enable) {
308 cnt++;
309 }
310 }
311 KDASSERT(q != NULL);
312
313 if (cnt == 0) {
314 /* Mask interrupt */
315 _reg_bclr_1(LANDISK_INTEN, (1 << irq));
316 }
317
318 splx(s);
319 }
320
321 void
extintr_disable_by_num(int irq)322 extintr_disable_by_num(int irq)
323 {
324 struct extintr_handler *eih;
325 struct intrhand *ih;
326 int s;
327
328 KDASSERT(irq >= 5 && irq <= 12);
329
330 s = _cpu_intr_suspend();
331 eih = &extintr_handler[irq - 5];
332 for (ih = eih->eih_ih; ih != NULL; ih = ih->ih_next) {
333 ih->ih_enable = 0;
334 }
335 /* Mask interrupt */
336 _reg_bclr_1(LANDISK_INTEN, (1 << irq));
337 splx(s);
338 }
339
340 static int
fakeintr(void * arg)341 fakeintr(void *arg)
342 {
343
344 return 0;
345 }
346
347 static int
extintr_intr_handler(void * arg)348 extintr_intr_handler(void *arg)
349 {
350 struct extintr_handler *eih = arg;
351 struct intrhand *ih;
352 int r;
353
354 if (__predict_true(eih != NULL)) {
355 for (ih = eih->eih_ih; ih != NULL; ih = ih->ih_next) {
356 if (__predict_true(ih->ih_enable)) {
357 r = (*ih->ih_fun)(ih->ih_arg);
358 if (__predict_true(r != 0)) {
359 ih->ih_evcnt.ev_count++;
360 }
361 }
362 }
363 return 1;
364 }
365 return 0;
366 }
367