xref: /netbsd-src/sys/dev/pci/if_ex_pci.c (revision d3cda6139a6a0678a420b8a6e1bef0e6269c13a3)
1 /*	$NetBSD: if_ex_pci.c,v 1.58 2018/12/09 11:14:02 jdolecek Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Frank van der Linden; Jason R. Thorpe of the Numerical Aerospace
9  * Simulation Facility, NASA Ames Research Center.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30  * POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: if_ex_pci.c,v 1.58 2018/12/09 11:14:02 jdolecek Exp $");
35 
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/mbuf.h>
39 #include <sys/socket.h>
40 #include <sys/ioctl.h>
41 #include <sys/errno.h>
42 #include <sys/syslog.h>
43 #include <sys/select.h>
44 #include <sys/device.h>
45 
46 #include <net/if.h>
47 #include <net/if_dl.h>
48 #include <net/if_ether.h>
49 #include <net/if_media.h>
50 
51 #include <sys/cpu.h>
52 #include <sys/bus.h>
53 #include <sys/intr.h>
54 
55 #include <dev/mii/miivar.h>
56 #include <dev/mii/mii.h>
57 
58 #include <dev/ic/elink3var.h>
59 #include <dev/ic/elink3reg.h>
60 #include <dev/ic/elinkxlreg.h>
61 #include <dev/ic/elinkxlvar.h>
62 
63 #include <dev/pci/pcivar.h>
64 #include <dev/pci/pcireg.h>
65 #include <dev/pci/pcidevs.h>
66 
67 struct ex_pci_softc {
68 	struct ex_softc sc_ex;
69 
70 	/* PCI function status space. 556,556B requests it. */
71 	bus_space_tag_t sc_funct;
72 	bus_space_handle_t sc_funch;
73 
74 	pci_chipset_tag_t psc_pc;	/* pci chipset tag */
75 	pcireg_t psc_regs[0x40>>2];	/* saved PCI config regs (sparse) */
76 	pcitag_t psc_tag;		/* pci device tag */
77 };
78 
79 /*
80  * PCI constants.
81  * XXX These should be in a common file!
82  */
83 #define PCI_CONN		0x48    /* Connector type */
84 #define PCI_CBIO PCI_BAR(0)    /* Configuration Base IO Address */
85 #define PCI_POWERCTL		0xe0
86 #define PCI_FUNCMEM PCI_BAR(2)
87 
88 #define PCI_INTR		4
89 #define PCI_INTRACK		0x00008000
90 
91 static int	ex_pci_match(device_t, cfdata_t, void *);
92 static void	ex_pci_attach(device_t, device_t, void *);
93 static void	ex_pci_intr_ack(struct ex_softc *);
94 
95 static int	ex_pci_enable(struct ex_softc *);
96 
97 static void	ex_pci_confreg_restore(struct ex_pci_softc *);
98 static int	ex_d3tod0(pci_chipset_tag_t, pcitag_t, device_t, pcireg_t);
99 
100 CFATTACH_DECL_NEW(ex_pci, sizeof(struct ex_pci_softc),
101     ex_pci_match, ex_pci_attach, NULL, NULL);
102 
103 static const struct ex_pci_product {
104 	uint32_t	epp_prodid;	/* PCI product ID */
105 	int		epp_flags;	/* initial softc flags */
106 	const char	*epp_name;	/* device name */
107 } ex_pci_products[] = {
108 	{ PCI_PRODUCT_3COM_3C900TPO,	0,
109 	  "3c900-TPO Ethernet" },
110 	{ PCI_PRODUCT_3COM_3C900COMBO,	0,
111 	  "3c900-COMBO Ethernet" },
112 
113 	{ PCI_PRODUCT_3COM_3C905TX,	EX_CONF_MII,
114 	  "3c905-TX 10/100 Ethernet" },
115 	{ PCI_PRODUCT_3COM_3C905T4,	EX_CONF_MII,
116 	  "3c905-T4 10/100 Ethernet" },
117 
118 	{ PCI_PRODUCT_3COM_3C900BTPO,	EX_CONF_90XB,
119 	  "3c900B-TPO Ethernet" },
120 	{ PCI_PRODUCT_3COM_3C900BCOMBO,	EX_CONF_90XB,
121 	  "3c900B-COMBO Ethernet" },
122 	{ PCI_PRODUCT_3COM_3C900BTPC,   EX_CONF_90XB,
123 	  "3c900B-TPC Ethernet" },
124 
125 	{ PCI_PRODUCT_3COM_3C905BTX,	EX_CONF_90XB|EX_CONF_MII|EX_CONF_INTPHY,
126 	  "3c905B-TX 10/100 Ethernet" },
127 	{ PCI_PRODUCT_3COM_3C905BT4,	EX_CONF_90XB|EX_CONF_MII,
128 	  "3c905B-T4 10/100 Ethernet" },
129 	{ PCI_PRODUCT_3COM_3C905BCOMBO,	EX_CONF_90XB/*|EX_CONF_MII|EX_CONF_INTPHY*/,
130 	  "3c905B-COMBO 10/100 Ethernet" },
131 	{ PCI_PRODUCT_3COM_3C905BFX,	EX_CONF_90XB,
132 	  "3c905B-FX 10/100 Ethernet" },
133 
134 	/* XXX Internal PHY? */
135 	{ PCI_PRODUCT_3COM_3C980SRV,	EX_CONF_90XB,
136 	  "3c980 Server Adapter 10/100 Ethernet" },
137 	{ PCI_PRODUCT_3COM_3C980CTXM,	EX_CONF_90XB|EX_CONF_MII,
138 	  "3c980C-TXM 10/100 Ethernet" },
139 
140 	{ PCI_PRODUCT_3COM_3C905CTX,	EX_CONF_90XB|EX_CONF_MII,
141 	  "3c905C-TX 10/100 Ethernet with mngmt" },
142 
143 	{ PCI_PRODUCT_3COM_3C450TX,		EX_CONF_90XB,
144 	  "3c450-TX 10/100 Ethernet" },
145 
146 	{ PCI_PRODUCT_3COM_3CSOHO100TX,	EX_CONF_90XB,
147 	  "3cSOHO100-TX 10/100 Ethernet" },
148 
149 	{ PCI_PRODUCT_3COM_3C555,
150 	   EX_CONF_90XB | EX_CONF_MII | EX_CONF_EEPROM_OFF |
151 	   EX_CONF_EEPROM_8BIT,
152 	  "3c555 MiniPCI 10/100 Ethernet" },
153 
154 	{ PCI_PRODUCT_3COM_3C556,
155 	   EX_CONF_90XB | EX_CONF_MII | EX_CONF_EEPROM_OFF |
156 	   EX_CONF_PCI_FUNCREG | EX_CONF_RESETHACK | EX_CONF_INV_LED_POLARITY |
157 	   EX_CONF_PHY_POWER | EX_CONF_EEPROM_8BIT,
158 	  "3c556 MiniPCI 10/100 Ethernet" },
159 
160 	{ PCI_PRODUCT_3COM_3C556B,
161 	   EX_CONF_90XB | EX_CONF_MII | EX_CONF_EEPROM_OFF |
162 	   EX_CONF_PCI_FUNCREG | EX_CONF_RESETHACK | EX_CONF_INV_LED_POLARITY |
163 	   EX_CONF_PHY_POWER | EX_CONF_NO_XCVR_PWR,
164 	  "3c556B MiniPCI 10/100 Ethernet" },
165 
166 	{ PCI_PRODUCT_3COM_3C905CXTX,	EX_CONF_90XB|EX_CONF_MII,
167 	  "3c905CX-TX 10/100 Ethernet with mngmt" },
168 
169 	{ PCI_PRODUCT_3COM_3C920BEMBW,	EX_CONF_90XB|EX_CONF_MII,
170 	  "3c920B-EMB-WNM Integrated Fast Ethernet" },
171 
172 	{ 0,				0,
173 	  NULL },
174 };
175 
176 static const struct ex_pci_product *
ex_pci_lookup(const struct pci_attach_args * pa)177 ex_pci_lookup(const struct pci_attach_args *pa)
178 {
179 	const struct ex_pci_product *epp;
180 
181 	if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_3COM)
182 		return (NULL);
183 
184 	for (epp = ex_pci_products; epp->epp_name != NULL; epp++)
185 		if (PCI_PRODUCT(pa->pa_id) == epp->epp_prodid)
186 			return (epp);
187 	return (NULL);
188 }
189 
190 static int
ex_pci_match(device_t parent,cfdata_t match,void * aux)191 ex_pci_match(device_t parent, cfdata_t match,
192     void *aux)
193 {
194 	struct pci_attach_args *pa = (struct pci_attach_args *) aux;
195 
196 	if (ex_pci_lookup(pa) != NULL)
197 		return (2);	/* beat ep_pci */
198 
199 	return (0);
200 }
201 
202 static void
ex_pci_attach(device_t parent,device_t self,void * aux)203 ex_pci_attach(device_t parent, device_t self, void *aux)
204 {
205 	struct ex_pci_softc *psc = device_private(self);
206 	struct ex_softc *sc = &psc->sc_ex;
207 	struct pci_attach_args *pa = aux;
208 	pci_chipset_tag_t pc = pa->pa_pc;
209 	pci_intr_handle_t ih;
210 	const struct ex_pci_product *epp;
211 	const char *intrstr = NULL;
212 	int rev;
213 	int error;
214 	char intrbuf[PCI_INTRSTR_LEN];
215 
216 	aprint_naive(": Ethernet controller\n");
217 
218 	sc->sc_dev = self;
219 
220 	if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0,
221 	    &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) {
222 		aprint_error(": can't map i/o space\n");
223 		return;
224 	}
225 
226 	epp = ex_pci_lookup(pa);
227 	if (epp == NULL) {
228 		printf("\n");
229 		panic("ex_pci_attach: impossible");
230 	}
231 
232 	rev = PCI_REVISION(pci_conf_read(pc, pa->pa_tag, PCI_CLASS_REG));
233 	aprint_normal(": 3Com %s (rev. 0x%x)\n", epp->epp_name, rev);
234 
235 	sc->sc_dmat = pa->pa_dmat;
236 
237 	sc->ex_conf = epp->epp_flags;
238 
239 	/* Enable the card. */
240 	pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
241 	    pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
242 	    PCI_COMMAND_MASTER_ENABLE);
243 
244 	psc->psc_pc = pc;
245 	psc->psc_tag = pa->pa_tag;
246 	psc->psc_regs[PCI_COMMAND_STATUS_REG>>2] =
247 	    pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
248 	psc->psc_regs[PCI_BHLC_REG>>2] =
249 	    pci_conf_read(pc, pa->pa_tag, PCI_BHLC_REG);
250 	psc->psc_regs[PCI_CBIO>>2] =
251 	    pci_conf_read(pc, pa->pa_tag, PCI_CBIO);
252 
253 	if (sc->ex_conf & EX_CONF_PCI_FUNCREG) {
254 		/* Map PCI function status window. */
255 		if (pci_mapreg_map(pa, PCI_FUNCMEM, PCI_MAPREG_TYPE_MEM, 0,
256 		    &psc->sc_funct, &psc->sc_funch, NULL, NULL)) {
257 			aprint_error_dev(self,
258 			    "unable to map function status window\n");
259 			return;
260 		}
261 		sc->intr_ack = ex_pci_intr_ack;
262 
263 		psc->psc_regs[PCI_FUNCMEM>>2] =
264 		    pci_conf_read(pc, pa->pa_tag, PCI_FUNCMEM);
265 	}
266 
267 	psc->psc_regs[PCI_INTERRUPT_REG>>2] =
268 	    pci_conf_read(pc, pa->pa_tag, PCI_INTERRUPT_REG);
269 	/* power up chip */
270 	error = pci_activate(pa->pa_pc, pa->pa_tag, self, ex_d3tod0);
271 	switch (error) {
272 	case EOPNOTSUPP:
273 		break;
274 	case 0:
275 		sc->enable = ex_pci_enable;
276 		sc->disable = NULL;
277 		break;
278 	default:
279 		aprint_error_dev(self, "cannot activate %d\n", error);
280 		return;
281 	}
282 	sc->enabled = 1;
283 
284 	/* Map and establish the interrupt. */
285 	if (pci_intr_map(pa, &ih)) {
286 		aprint_error_dev(self, "couldn't map interrupt\n");
287 		return;
288 	}
289 
290 	intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
291 	sc->sc_ih = pci_intr_establish_xname(pc, ih, IPL_NET, ex_intr, sc,
292 	    device_xname(self));
293 	if (sc->sc_ih == NULL) {
294 		aprint_error_dev(self, "couldn't establish interrupt");
295 		if (intrstr != NULL)
296 			aprint_error(" at %s", intrstr);
297 		aprint_error("\n");
298 		return;
299 	}
300 	aprint_normal_dev(self, "interrupting at %s\n", intrstr);
301 
302 	ex_config(sc);
303 
304 	if (sc->ex_conf & EX_CONF_PCI_FUNCREG)
305 		bus_space_write_4(psc->sc_funct, psc->sc_funch, PCI_INTR,
306 		    PCI_INTRACK);
307 
308 	if (sc->disable != NULL)
309 		ex_disable(sc);
310 }
311 
312 static void
ex_pci_intr_ack(struct ex_softc * sc)313 ex_pci_intr_ack(struct ex_softc *sc)
314 {
315 	struct ex_pci_softc *psc = (struct ex_pci_softc *)sc;
316 
317 	bus_space_write_4(psc->sc_funct, psc->sc_funch, PCI_INTR,
318 	    PCI_INTRACK);
319 }
320 
321 static int
ex_d3tod0(pci_chipset_tag_t pc,pcitag_t tag,device_t self,pcireg_t state)322 ex_d3tod0(pci_chipset_tag_t pc, pcitag_t tag, device_t self, pcireg_t state)
323 {
324 
325 #define PCI_CACHE_LAT_BIST	0x0c
326 #define PCI_EXP_ROM_BAR		0x30
327 #define PCI_INT_GNT_LAT		0x3c
328 
329 	uint32_t base0;
330 	uint32_t base1;
331 	uint32_t romaddr;
332 	uint32_t pci_int_lat;
333 	uint32_t pci_cache_lat;
334 
335 	if (state != PCI_PMCSR_STATE_D3)
336 		return 0;
337 
338 	aprint_normal_dev(self, "found in power state D%d, "
339 	    "attempting to recover.\n", state);
340 	/* XXX is this needed? */
341 	(void)pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
342 	base0 = pci_conf_read(pc, tag, PCI_BAR0);
343 	base1 = pci_conf_read(pc, tag, PCI_BAR1);
344 	romaddr	= pci_conf_read(pc, tag, PCI_EXP_ROM_BAR);
345 	pci_cache_lat= pci_conf_read(pc, tag, PCI_CACHE_LAT_BIST);
346 	pci_int_lat = pci_conf_read(pc, tag, PCI_INT_GNT_LAT);
347 
348 	pci_conf_write(pc, tag, PCI_POWERCTL, 0);
349 	pci_conf_write(pc, tag, PCI_BAR0, base0);
350 	pci_conf_write(pc, tag, PCI_BAR1, base1);
351 	pci_conf_write(pc, tag, PCI_EXP_ROM_BAR, romaddr);
352 	pci_conf_write(pc, tag, PCI_INT_GNT_LAT, pci_int_lat);
353 	pci_conf_write(pc, tag, PCI_CACHE_LAT_BIST, pci_cache_lat);
354 	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
355 	    (PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_IO_ENABLE));
356 	aprint_normal_dev(self, "changed power state to D0.\n");
357 	return 0;
358 }
359 
360 static void
ex_pci_confreg_restore(struct ex_pci_softc * psc)361 ex_pci_confreg_restore(struct ex_pci_softc *psc)
362 {
363 	struct ex_softc *sc = (void *) psc;
364 	pcireg_t reg;
365 
366 	reg = pci_conf_read(psc->psc_pc, psc->psc_tag, PCI_COMMAND_STATUS_REG);
367 
368 	pci_conf_write(psc->psc_pc, psc->psc_tag,
369 	    PCI_COMMAND_STATUS_REG,
370 	    (reg & 0xffff0000) |
371 	    (psc->psc_regs[PCI_COMMAND_STATUS_REG>>2] & 0xffff));
372 	pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_BHLC_REG,
373 	    psc->psc_regs[PCI_BHLC_REG>>2]);
374 	pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_CBIO,
375 	    psc->psc_regs[PCI_CBIO>>2]);
376 	if (sc->ex_conf & EX_CONF_PCI_FUNCREG)
377 		pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_FUNCMEM,
378 		    psc->psc_regs[PCI_FUNCMEM>>2]);
379 	pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_INTERRUPT_REG,
380 	    psc->psc_regs[PCI_INTERRUPT_REG>>2]);
381 }
382 
383 static int
ex_pci_enable(struct ex_softc * sc)384 ex_pci_enable(struct ex_softc *sc)
385 {
386 	struct ex_pci_softc *psc = (void *) sc;
387 
388 	aprint_debug_dev(sc->sc_dev, "going to power state D0\n");
389 
390 	/* Now restore the configuration registers. */
391 	ex_pci_confreg_restore(psc);
392 
393 	return (0);
394 }
395