1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2018 Intel Corporation 3 */ 4 #ifndef _QAT_DEVICE_H_ 5 #define _QAT_DEVICE_H_ 6 7 #include <bus_pci_driver.h> 8 9 #include "qat_common.h" 10 #include "qat_logs.h" 11 #include "qat_qp.h" 12 #include "adf_transport_access_macros.h" 13 #include "icp_qat_hw.h" 14 15 #define QAT_DETACHED (0) 16 #define QAT_ATTACHED (1) 17 18 #define QAT_DEV_NAME_MAX_LEN 64 19 #define MAX_QP_THRESHOLD_SIZE 32 20 #define QAT_LEGACY_CAPA "qat_legacy_capa" 21 22 struct qat_service { 23 const char *name; 24 int (*dev_create)(struct qat_pci_device *qat_pci_dev); 25 int (*dev_destroy)(struct qat_pci_device *qat_pci_dev); 26 }; 27 28 extern struct qat_service qat_service[]; 29 30 /** 31 * Function prototypes for GENx specific device operations. 32 **/ 33 typedef int (*qat_dev_reset_ring_pairs_t) 34 (struct qat_pci_device *); 35 typedef const struct rte_mem_resource* (*qat_dev_get_transport_bar_t) 36 (struct rte_pci_device *); 37 typedef int (*qat_dev_get_misc_bar_t) 38 (struct rte_mem_resource **, struct rte_pci_device *); 39 typedef int (*qat_dev_read_config_t) 40 (struct qat_pci_device *); 41 typedef int (*qat_dev_get_extra_size_t)(void); 42 typedef int (*qat_dev_get_slice_map_t)(uint32_t *map, 43 const struct rte_pci_device *pci_dev); 44 45 char *qat_dev_cmdline_get_val(struct qat_pci_device *qat_dev, const char *key); 46 47 struct qat_dev_hw_spec_funcs { 48 qat_dev_reset_ring_pairs_t qat_dev_reset_ring_pairs; 49 qat_dev_get_transport_bar_t qat_dev_get_transport_bar; 50 qat_dev_get_misc_bar_t qat_dev_get_misc_bar; 51 qat_dev_read_config_t qat_dev_read_config; 52 qat_dev_get_extra_size_t qat_dev_get_extra_size; 53 qat_dev_get_slice_map_t qat_dev_get_slice_map; 54 }; 55 56 extern struct qat_dev_hw_spec_funcs *qat_dev_hw_spec[]; 57 58 struct qat_dev_cmd_param { 59 const char *name; 60 uint16_t val; 61 }; 62 63 struct qat_device_info { 64 const struct rte_memzone *mz; 65 /**< mz to store the qat_pci_device so it can be 66 * shared across processes 67 */ 68 struct rte_pci_device *pci_dev; 69 struct rte_device sym_rte_dev; 70 /**< This represents the crypto sym subset of this pci device. 71 * Register with this rather than with the one in 72 * pci_dev so that its driver can have a crypto-specific name 73 */ 74 75 struct rte_device asym_rte_dev; 76 /**< This represents the crypto asym subset of this pci device. 77 * Register with this rather than with the one in 78 * pci_dev so that its driver can have a crypto-specific name 79 */ 80 81 struct rte_device comp_rte_dev; 82 /**< This represents the compression subset of this pci device. 83 * Register with this rather than with the one in 84 * pci_dev so that its driver can have a compression-specific name 85 */ 86 }; 87 88 extern struct qat_device_info qat_pci_devs[]; 89 90 struct qat_cryptodev_private; 91 struct qat_comp_dev_private; 92 93 /* 94 * This struct holds all the data about a QAT pci device 95 * including data about all services it supports. 96 * It contains 97 * - hw_data 98 * - config data 99 * - runtime data 100 * Note: as this data can be shared in a multi-process scenario, 101 * any pointers in it must also point to shared memory. 102 */ 103 struct qat_pci_device { 104 105 /* Data used by all services */ 106 char name[QAT_DEV_NAME_MAX_LEN]; 107 /**< Name of qat pci device */ 108 uint8_t qat_dev_id; 109 /**< Id of device instance for this qat pci device */ 110 enum qat_device_gen qat_dev_gen; 111 /**< QAT device generation */ 112 rte_spinlock_t arb_csr_lock; 113 /**< lock to protect accesses to the arbiter CSR */ 114 struct qat_qp *qps_in_use[QAT_MAX_SERVICES][ADF_MAX_QPS_ON_ANY_SERVICE]; 115 /**< links to qps set up for each service, index same as on API */ 116 int qat_sym_driver_id; 117 /**< Symmetric driver id used by this device */ 118 int qat_asym_driver_id; 119 /**< Symmetric driver id used by this device */ 120 void *misc_bar_io_addr; 121 /**< Address of misc bar */ 122 void *dev_private; 123 /**< Per generation specific information */ 124 char *command_line; 125 /**< Map of the crypto and compression slices */ 126 void *pmd[QAT_MAX_SERVICES]; 127 /**< link back to pmd private data */ 128 struct qat_options options; 129 /**< qat device options */ 130 }; 131 132 struct qat_gen_hw_data { 133 enum qat_device_gen dev_gen; 134 const struct qat_qp_hw_data (*qp_hw_data)[ADF_MAX_QPS_ON_ANY_SERVICE]; 135 struct qat_pf2vf_dev *pf2vf_dev; 136 }; 137 138 struct qat_pf2vf_dev { 139 uint32_t pf2vf_offset; 140 uint32_t vf2pf_offset; 141 int pf2vf_type_shift; 142 uint32_t pf2vf_type_mask; 143 int pf2vf_data_shift; 144 uint32_t pf2vf_data_mask; 145 }; 146 147 extern struct qat_gen_hw_data qat_gen_config[]; 148 149 #endif /* _QAT_DEVICE_H_ */ 150