1 /* $NetBSD: amdgpu_hw_factory_dcn10.c,v 1.2 2021/12/18 23:45:05 riastradh Exp $ */
2
3 /*
4 * Copyright 2013-15 Advanced Micro Devices, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: AMD
25 *
26 */
27
28 #include <sys/cdefs.h>
29 __KERNEL_RCSID(0, "$NetBSD: amdgpu_hw_factory_dcn10.c,v 1.2 2021/12/18 23:45:05 riastradh Exp $");
30
31 #include "dm_services.h"
32 #include "include/gpio_types.h"
33 #include "../hw_factory.h"
34
35
36 #include "../hw_gpio.h"
37 #include "../hw_ddc.h"
38 #include "../hw_hpd.h"
39 #include "../hw_generic.h"
40
41 #include "hw_factory_dcn10.h"
42
43 #include "dcn/dcn_1_0_offset.h"
44 #include "dcn/dcn_1_0_sh_mask.h"
45 #include "soc15_hw_ip.h"
46 #include "vega10_ip_offset.h"
47
48 #define block HPD
49 #define reg_num 0
50
51 /* set field name */
52 #define SF_HPD(reg_name, field_name, post_fix)\
53 .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix
54
55 #define BASE_INNER(seg) \
56 DCE_BASE__INST0_SEG ## seg
57
58 /* compile time expand base address. */
59 #define BASE(seg) \
60 BASE_INNER(seg)
61
62 #define REG(reg_name)\
63 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
64
65 #define REGI(reg_name, block, id)\
66 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
67 mm ## block ## id ## _ ## reg_name
68
69 #include "reg_helper.h"
70 #include "../hpd_regs.h"
71
72 #define hpd_regs(id) \
73 {\
74 HPD_REG_LIST(id)\
75 }
76
77 static const struct hpd_registers hpd_regs[] = {
78 hpd_regs(0),
79 hpd_regs(1),
80 hpd_regs(2),
81 hpd_regs(3),
82 hpd_regs(4),
83 hpd_regs(5)
84 };
85
86 static const struct hpd_sh_mask hpd_shift = {
87 HPD_MASK_SH_LIST(__SHIFT)
88 };
89
90 static const struct hpd_sh_mask hpd_mask = {
91 HPD_MASK_SH_LIST(_MASK)
92 };
93
94 #include "../ddc_regs.h"
95
96 /* set field name */
97 #define SF_DDC(reg_name, field_name, post_fix)\
98 .field_name = reg_name ## __ ## field_name ## post_fix
99
100 static const struct ddc_registers ddc_data_regs[] = {
101 ddc_data_regs(1),
102 ddc_data_regs(2),
103 ddc_data_regs(3),
104 ddc_data_regs(4),
105 ddc_data_regs(5),
106 ddc_data_regs(6),
107 ddc_vga_data_regs,
108 ddc_i2c_data_regs
109 };
110
111 static const struct ddc_registers ddc_clk_regs[] = {
112 ddc_clk_regs(1),
113 ddc_clk_regs(2),
114 ddc_clk_regs(3),
115 ddc_clk_regs(4),
116 ddc_clk_regs(5),
117 ddc_clk_regs(6),
118 ddc_vga_clk_regs,
119 ddc_i2c_clk_regs
120 };
121
122 static const struct ddc_sh_mask ddc_shift = {
123 DDC_MASK_SH_LIST(__SHIFT)
124 };
125
126 static const struct ddc_sh_mask ddc_mask = {
127 DDC_MASK_SH_LIST(_MASK)
128 };
129
130 #include "../generic_regs.h"
131
132 /* set field name */
133 #define SF_GENERIC(reg_name, field_name, post_fix)\
134 .field_name = reg_name ## __ ## field_name ## post_fix
135
136 #define generic_regs(id) \
137 {\
138 GENERIC_REG_LIST(id)\
139 }
140
141 static const struct generic_registers generic_regs[] = {
142 generic_regs(A),
143 generic_regs(B),
144 };
145
146 static const struct generic_sh_mask generic_shift[] = {
147 GENERIC_MASK_SH_LIST(__SHIFT, A),
148 GENERIC_MASK_SH_LIST(__SHIFT, B),
149 };
150
151 static const struct generic_sh_mask generic_mask[] = {
152 GENERIC_MASK_SH_LIST(_MASK, A),
153 GENERIC_MASK_SH_LIST(_MASK, B),
154 };
155
define_generic_registers(struct hw_gpio_pin * pin,uint32_t en)156 static void define_generic_registers(struct hw_gpio_pin *pin, uint32_t en)
157 {
158 struct hw_generic *generic = HW_GENERIC_FROM_BASE(pin);
159
160 generic->regs = &generic_regs[en];
161 generic->shifts = &generic_shift[en];
162 generic->masks = &generic_mask[en];
163 generic->base.regs = &generic_regs[en].gpio;
164 }
165
define_ddc_registers(struct hw_gpio_pin * pin,uint32_t en)166 static void define_ddc_registers(
167 struct hw_gpio_pin *pin,
168 uint32_t en)
169 {
170 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin);
171
172 switch (pin->id) {
173 case GPIO_ID_DDC_DATA:
174 ddc->regs = &ddc_data_regs[en];
175 ddc->base.regs = &ddc_data_regs[en].gpio;
176 break;
177 case GPIO_ID_DDC_CLOCK:
178 ddc->regs = &ddc_clk_regs[en];
179 ddc->base.regs = &ddc_clk_regs[en].gpio;
180 break;
181 default:
182 ASSERT_CRITICAL(false);
183 return;
184 }
185
186 ddc->shifts = &ddc_shift;
187 ddc->masks = &ddc_mask;
188
189 }
190
define_hpd_registers(struct hw_gpio_pin * pin,uint32_t en)191 static void define_hpd_registers(struct hw_gpio_pin *pin, uint32_t en)
192 {
193 struct hw_hpd *hpd = HW_HPD_FROM_BASE(pin);
194
195 hpd->regs = &hpd_regs[en];
196 hpd->shifts = &hpd_shift;
197 hpd->masks = &hpd_mask;
198 hpd->base.regs = &hpd_regs[en].gpio;
199 }
200
201
202 /* fucntion table */
203 static const struct hw_factory_funcs funcs = {
204 .init_ddc_data = dal_hw_ddc_init,
205 .init_generic = dal_hw_generic_init,
206 .init_hpd = dal_hw_hpd_init,
207 .get_ddc_pin = dal_hw_ddc_get_pin,
208 .get_hpd_pin = dal_hw_hpd_get_pin,
209 .get_generic_pin = dal_hw_generic_get_pin,
210 .define_hpd_registers = define_hpd_registers,
211 .define_ddc_registers = define_ddc_registers,
212 .define_generic_registers = define_generic_registers
213 };
214 /*
215 * dal_hw_factory_dcn10_init
216 *
217 * @brief
218 * Initialize HW factory function pointers and pin info
219 *
220 * @param
221 * struct hw_factory *factory - [out] struct of function pointers
222 */
dal_hw_factory_dcn10_init(struct hw_factory * factory)223 void dal_hw_factory_dcn10_init(struct hw_factory *factory)
224 {
225 /*TODO check ASIC CAPs*/
226 factory->number_of_pins[GPIO_ID_DDC_DATA] = 8;
227 factory->number_of_pins[GPIO_ID_DDC_CLOCK] = 8;
228 factory->number_of_pins[GPIO_ID_GENERIC] = 7;
229 factory->number_of_pins[GPIO_ID_HPD] = 6;
230 factory->number_of_pins[GPIO_ID_GPIO_PAD] = 31;
231 factory->number_of_pins[GPIO_ID_VIP_PAD] = 0;
232 factory->number_of_pins[GPIO_ID_SYNC] = 2;
233 factory->number_of_pins[GPIO_ID_GSL] = 4;
234
235 factory->funcs = &funcs;
236 }
237