1 /* Common hooks for ARM.
2 Copyright (C) 1991-2022 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published
8 by the Free Software Foundation; either version 3, or (at your
9 option) any later version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #define INCLUDE_LIST
21 #define INCLUDE_VECTOR
22 #define INCLUDE_ALGORITHM
23 #include "config.h"
24 #include "system.h"
25 #include "coretypes.h"
26 #include "tm.h"
27 #include "memmodel.h"
28 #include "tm_p.h"
29 #include "common/common-target.h"
30 #include "common/common-target-def.h"
31 #include "opts.h"
32 #include "flags.h"
33 #include "sbitmap.h"
34 #include "diagnostic.h"
35
36 #include "configargs.h"
37
38 /* Set default optimization options. */
39 static const struct default_options arm_option_optimization_table[] =
40 {
41 /* Enable section anchors by default at -O1 or higher. */
42 { OPT_LEVELS_1_PLUS, OPT_fsection_anchors, NULL, 1 },
43 { OPT_LEVELS_1_PLUS, OPT_fsched_pressure, NULL, 1 },
44 { OPT_LEVELS_NONE, 0, NULL, 0 }
45 };
46
47 /* Implement TARGET_EXCEPT_UNWIND_INFO. */
48
49 enum unwind_info_type
arm_except_unwind_info(struct gcc_options * opts)50 arm_except_unwind_info (struct gcc_options *opts)
51 {
52 /* Honor the --enable-sjlj-exceptions configure switch. */
53 #ifdef CONFIG_SJLJ_EXCEPTIONS
54 if (CONFIG_SJLJ_EXCEPTIONS)
55 return UI_SJLJ;
56 #endif
57
58 if (ARM_DWARF_UNWIND_TABLES)
59 return UI_DWARF2;
60
61 /* If not using ARM EABI unwind tables... */
62 if (ARM_UNWIND_INFO)
63 {
64 /* For simplicity elsewhere in this file, indicate that all unwind
65 info is disabled if we're not emitting unwind tables. */
66 if (!opts->x_flag_exceptions && !opts->x_flag_unwind_tables)
67 return UI_NONE;
68 else
69 return UI_TARGET;
70 }
71
72 /* ... honor target configurations requesting DWARF2 EH... */
73 #ifdef DWARF2_UNWIND_INFO
74 if (DWARF2_UNWIND_INFO)
75 return UI_DWARF2;
76 #endif
77
78 /* ... or fallback to sjlj exceptions for backwards compatibility. */
79 return UI_SJLJ;
80 }
81
82 #define ARM_CPU_NAME_LENGTH 20
83
84 /* Truncate NAME at the first '.' or '+' character seen, or return
85 NAME unmodified. */
86
87 const char *
arm_rewrite_selected_cpu(const char * name)88 arm_rewrite_selected_cpu (const char *name)
89 {
90 static char output_buf[ARM_CPU_NAME_LENGTH + 1] = {0};
91 char *arg_pos;
92
93 strncpy (output_buf, name, ARM_CPU_NAME_LENGTH);
94 output_buf[ARM_CPU_NAME_LENGTH] = 0;
95
96 arg_pos = strchr (output_buf, '.');
97
98 /* If we found a '.' truncate the entry at that point. */
99 if (arg_pos)
100 *arg_pos = '\0';
101
102 arg_pos = strchr (output_buf, '+');
103
104 /* If we found a '+' truncate the entry at that point. */
105 if (arg_pos)
106 *arg_pos = '\0';
107
108 return output_buf;
109 }
110
111 /* Called by the driver to rewrite a name passed to the -mcpu
112 argument in preparation to be passed to the assembler. The
113 names passed from the command line will be in ARGV, we want
114 to use the right-most argument, which should be in
115 ARGV[ARGC - 1]. ARGC should always be greater than 0. */
116
117 const char *
arm_rewrite_mcpu(int argc,const char ** argv)118 arm_rewrite_mcpu (int argc, const char **argv)
119 {
120 gcc_assert (argc);
121
122 #ifdef HAVE_GAS_ARM_EXTENDED_ARCH
123 return argv[argc - 1];
124 #else
125 return arm_rewrite_selected_cpu (argv[argc - 1]);
126 #endif
127 }
128
129 /* Comparator for arm_rewrite_selected_arch. Compare the two arch extension
130 strings FIRST and SECOND and return TRUE if FIRST is less than SECOND
131 alphabetically. */
132
133 static bool
compare_opt_names(const char * first,const char * second)134 compare_opt_names (const char *first, const char *second)
135 {
136 return strcmp (first, second) <= 0;
137 }
138
139 /* Rewrite the architecture string for passing to the assembler.
140 Although the syntax is similar we cannot assume that it supports
141 the newer FP related options. So strip any option that only
142 defines features in the standard -mfpu options out. We'll generate
143 a suitable -mfpu option elsewhere to carry that information. NAME
144 should already have been canonicalized, so we do not expect to
145 encounter +no.. options that remove features. A final problem is
146 that the assembler expects the feature extensions to be listed
147 alphabetically, so we build a list of required options and then
148 sort them into canonical order in the resulting string. */
149 const char *
arm_rewrite_selected_arch(const char * name)150 arm_rewrite_selected_arch (const char *name)
151 {
152 /* The result we return needs to be semi persistent, so handle being
153 re-invoked. */
154 static char *asm_arch = NULL;
155
156 if (asm_arch)
157 {
158 free (asm_arch);
159 asm_arch = NULL;
160 }
161
162 const char *arg_pos = strchr (name, '+');
163
164 /* No extension options? just return the original string. */
165 if (arg_pos == NULL)
166 return name;
167
168 const arch_option *arch_opt
169 = arm_parse_arch_option_name (all_architectures, "-march", name);
170
171 auto_sbitmap fpu_bits (isa_num_bits);
172 static const enum isa_feature fpu_bitlist[]
173 = { ISA_ALL_FPU_INTERNAL, isa_nobit };
174
175 arm_initialize_isa (fpu_bits, fpu_bitlist);
176
177 auto_sbitmap opt_bits (isa_num_bits);
178
179 /* Ensure that the resulting string is large enough for the result. We
180 never add options, so using strdup here will ensure that. */
181 asm_arch = xstrdup (name);
182 asm_arch[arg_pos - name] = '\0';
183
184 std::vector<const char *>optlist;
185
186 while (arg_pos)
187 {
188 const char *end = strchr (arg_pos + 1, '+');
189 size_t len = end ? end - arg_pos : strlen (arg_pos);
190
191 for (const cpu_arch_extension *entry = arch_opt->common.extensions;
192 entry->name != NULL;
193 entry++)
194 {
195 if (strncmp (entry->name, arg_pos + 1, len - 1) == 0
196 && entry->name[len - 1] == '\0')
197 {
198 /* Don't expect removal options. */
199 gcc_assert (!entry->remove);
200 arm_initialize_isa (opt_bits, entry->isa_bits);
201 if (!bitmap_subset_p (opt_bits, fpu_bits))
202 optlist.push_back (entry->name);
203 bitmap_clear (opt_bits);
204 break;
205 }
206 }
207
208 arg_pos = end;
209 }
210
211 std::sort (optlist.begin (), optlist.end (), compare_opt_names);
212
213 for (std::vector<const char *>::iterator opt_iter = optlist.begin ();
214 opt_iter != optlist.end ();
215 ++opt_iter)
216 {
217 strcat (asm_arch, "+");
218 strcat (asm_arch, (*opt_iter));
219 }
220
221 return asm_arch;
222 }
223
224 /* Called by the driver to rewrite a name passed to the -march
225 argument in preparation to be passed to the assembler. The
226 names passed from the command line will be in ARGV, we want
227 to use the right-most argument, which should be in
228 ARGV[ARGC - 1]. ARGC should always be greater than 0. */
229
230 const char *
arm_rewrite_march(int argc,const char ** argv)231 arm_rewrite_march (int argc, const char **argv)
232 {
233 gcc_assert (argc);
234
235 #ifdef HAVE_GAS_ARM_EXTENDED_ARCH
236 return argv[argc - 1];
237 #else
238 return arm_rewrite_selected_arch (argv[argc - 1]);
239 #endif
240 }
241
242 #include "arm-cpu-cdata.h"
243
244 /* Scan over a raw feature array BITS checking for BIT being present.
245 This is slower than the normal bitmask checks, but we would spend longer
246 initializing that than doing the check this way. Returns true iff
247 BIT is found. */
248 static bool
check_isa_bits_for(const enum isa_feature * bits,enum isa_feature bit)249 check_isa_bits_for (const enum isa_feature* bits, enum isa_feature bit)
250 {
251 while (*bits != isa_nobit)
252 if (*bits++ == bit)
253 return true;
254
255 return false;
256 }
257
258 /* Look up NAME in the configuration defaults for this build of the
259 the compiler. Return the value associated with that name, or NULL
260 if no value is found. */
261 static const char *
arm_config_default(const char * name)262 arm_config_default (const char *name)
263 {
264 unsigned i;
265
266 if (configure_default_options[0].name == NULL)
267 return NULL;
268
269 for (i = 0; i < ARRAY_SIZE (configure_default_options); i++)
270 if (strcmp (configure_default_options[i].name, name) == 0)
271 return configure_default_options[i].value;
272
273 return NULL;
274 }
275
276 /* Called by the driver to check whether the target denoted by current
277 command line options is a Thumb-only, or ARM-only, target. ARGV is
278 an array of tupples (normally only one) where the first element of
279 the tupple is 'cpu' or 'arch' and the second is the option passed
280 to the compiler for that. An architecture tupple is always taken
281 in preference to a cpu tupple and the last of each type always
282 overrides any earlier setting. */
283
284 const char *
arm_target_mode(int argc,const char ** argv)285 arm_target_mode (int argc, const char **argv)
286 {
287 const char *arch = NULL;
288 const char *cpu = NULL;
289
290 if (argc % 2 != 0)
291 fatal_error (input_location,
292 "%%:%<target_mode_check%> takes an even number of parameters");
293
294 while (argc)
295 {
296 if (strcmp (argv[0], "arch") == 0)
297 arch = argv[1];
298 else if (strcmp (argv[0], "cpu") == 0)
299 cpu = argv[1];
300 else
301 fatal_error (input_location, "unrecognized option passed to %%:"
302 "%<target_mode_check%>");
303 argc -= 2;
304 argv += 2;
305 }
306
307 /* No architecture, or CPU, has option extensions that change
308 whether or not we have a Thumb-only device, so there is no need
309 to scan any option extensions specified. */
310
311 /* If the architecture is specified, that overrides any CPU setting. */
312 if (arch)
313 {
314 const arch_option *arch_opt
315 = arm_parse_arch_option_name (all_architectures, "-march", arch,
316 false);
317
318 if (arch_opt && !check_isa_bits_for (arch_opt->common.isa_bits,
319 isa_bit_notm))
320 return "-mthumb";
321 if (arch_opt && !check_isa_bits_for (arch_opt->common.isa_bits,
322 isa_bit_thumb))
323 return "-marm";
324 }
325 else if (cpu)
326 {
327 const cpu_option *cpu_opt
328 = arm_parse_cpu_option_name (all_cores, "-mcpu", cpu, false);
329
330 if (cpu_opt && !check_isa_bits_for (cpu_opt->common.isa_bits,
331 isa_bit_notm))
332 return "-mthumb";
333 if (cpu_opt && !check_isa_bits_for (cpu_opt->common.isa_bits,
334 isa_bit_thumb))
335 return "-marm";
336 }
337
338 const char *default_mode = arm_config_default ("mode");
339 if (default_mode)
340 {
341 if (strcmp (default_mode, "thumb") == 0)
342 return "-mthumb";
343 else if (strcmp (default_mode, "arm") == 0)
344 return "-marm";
345 else
346 gcc_unreachable ();
347 }
348
349 /* Compiler hasn't been configured with a default, and the CPU
350 doesn't require Thumb, so default to ARM. */
351 return "-marm";
352 }
353
354 /* List the permitted CPU option names. If TARGET is a near miss for an
355 entry, print out the suggested alternative. */
356 static void
arm_print_hint_for_cpu_option(const char * target,const cpu_option * list)357 arm_print_hint_for_cpu_option (const char *target,
358 const cpu_option *list)
359 {
360 auto_vec<const char*> candidates;
361 for (; list->common.name != NULL; list++)
362 {
363 candidates.safe_push (list->common.name);
364 if (list->aliases)
365 {
366 for (const cpu_alias *alias = list->aliases; alias->name != NULL;
367 alias++)
368 if (alias->visible)
369 candidates.safe_push (alias->name);
370 }
371 }
372
373 #ifdef HAVE_LOCAL_CPU_DETECT
374 /* Add also "native" as possible value. */
375 candidates.safe_push ("native");
376 #endif
377
378 char *s;
379 const char *hint = candidates_list_and_hint (target, s, candidates);
380 if (hint)
381 inform (input_location, "valid arguments are: %s; did you mean %qs?",
382 s, hint);
383 else
384 inform (input_location, "valid arguments are: %s", s);
385
386 XDELETEVEC (s);
387 }
388
389 /* Parse the base component of a CPU selection in LIST. Return a
390 pointer to the entry in the architecture table. OPTNAME is the
391 name of the option we are parsing and can be used if a diagnostic
392 is needed. If COMPLAIN is true (the default) emit error
393 messages and hints on invalid input. */
394 const cpu_option *
arm_parse_cpu_option_name(const cpu_option * list,const char * optname,const char * target,bool complain)395 arm_parse_cpu_option_name (const cpu_option *list, const char *optname,
396 const char *target, bool complain)
397 {
398 const cpu_option *entry;
399 const char *end = strchr (target, '+');
400 size_t len = end ? end - target : strlen (target);
401
402 for (entry = list; entry->common.name != NULL; entry++)
403 {
404 if (strncmp (entry->common.name, target, len) == 0
405 && entry->common.name[len] == '\0')
406 return entry;
407
408 /* Match against any legal alias for this CPU candidate. */
409 if (entry->aliases)
410 {
411 for (const cpu_alias *alias = entry->aliases; alias->name != NULL;
412 alias++)
413 if (strncmp (alias->name, target, len) == 0
414 && alias->name[len] == '\0')
415 return entry;
416 }
417 }
418
419 if (complain)
420 {
421 error_at (input_location, "unrecognized %s target: %s", optname, target);
422 arm_print_hint_for_cpu_option (target, list);
423 }
424 return NULL;
425 }
426
427 /* List the permitted architecture option names. If TARGET is a near
428 miss for an entry, print out the suggested alternative. */
429 static void
arm_print_hint_for_arch_option(const char * target,const arch_option * list)430 arm_print_hint_for_arch_option (const char *target,
431 const arch_option *list)
432 {
433 auto_vec<const char*> candidates;
434 for (; list->common.name != NULL; list++)
435 candidates.safe_push (list->common.name);
436
437 #ifdef HAVE_LOCAL_CPU_DETECT
438 /* Add also "native" as possible value. */
439 candidates.safe_push ("native");
440 #endif
441
442 char *s;
443 const char *hint = candidates_list_and_hint (target, s, candidates);
444 if (hint)
445 inform (input_location, "valid arguments are: %s; did you mean %qs?",
446 s, hint);
447 else
448 inform (input_location, "valid arguments are: %s", s);
449
450 XDELETEVEC (s);
451 }
452
453 /* Parse the base component of a CPU or architecture selection in
454 LIST. Return a pointer to the entry in the architecture table.
455 OPTNAME is the name of the option we are parsing and can be used if
456 a diagnostic is needed. If COMPLAIN is true (the default) emit error
457 messages and hints on invalid input. */
458 const arch_option *
arm_parse_arch_option_name(const arch_option * list,const char * optname,const char * target,bool complain)459 arm_parse_arch_option_name (const arch_option *list, const char *optname,
460 const char *target, bool complain)
461 {
462 const arch_option *entry;
463 const char *end = strchr (target, '+');
464 size_t len = end ? end - target : strlen (target);
465
466 for (entry = list; entry->common.name != NULL; entry++)
467 {
468 if (strncmp (entry->common.name, target, len) == 0
469 && entry->common.name[len] == '\0')
470 return entry;
471 }
472
473 if (complain)
474 {
475 error_at (input_location, "unrecognized %s target: %s", optname, target);
476 arm_print_hint_for_arch_option (target, list);
477 }
478 return NULL;
479 }
480
481 /* List the permitted architecture option names. If TARGET is a near
482 miss for an entry, print out the suggested alternative. */
483 static void
arm_print_hint_for_fpu_option(const char * target)484 arm_print_hint_for_fpu_option (const char *target)
485 {
486 auto_vec<const char*> candidates;
487 for (int i = 0; i < TARGET_FPU_auto; i++)
488 candidates.safe_push (all_fpus[i].name);
489 char *s;
490 const char *hint = candidates_list_and_hint (target, s, candidates);
491 if (hint)
492 inform (input_location, "valid arguments are: %s; did you mean %qs?",
493 s, hint);
494 else
495 inform (input_location, "valid arguments are: %s", s);
496
497 XDELETEVEC (s);
498 }
499
500 static const arm_fpu_desc *
arm_parse_fpu_option(const char * opt)501 arm_parse_fpu_option (const char *opt)
502 {
503 int i;
504
505 for (i = 0; i < TARGET_FPU_auto; i++)
506 {
507 if (strcmp (all_fpus[i].name, opt) == 0)
508 return all_fpus + i;
509 }
510
511 error_at (input_location, "unrecognized %<-mfpu%> target: %s", opt);
512 arm_print_hint_for_fpu_option (opt);
513 return NULL;
514 }
515
516 /* Convert a static initializer array of feature bits to sbitmap
517 representation. */
518 void
arm_initialize_isa(sbitmap isa,const enum isa_feature * isa_bits)519 arm_initialize_isa (sbitmap isa, const enum isa_feature *isa_bits)
520 {
521 bitmap_clear (isa);
522 while (*isa_bits != isa_nobit)
523 bitmap_set_bit (isa, *(isa_bits++));
524 }
525
526 /* OPT isn't a recognized feature. Print a suitable error message and
527 suggest a possible value. Always print the list of permitted
528 values. */
529 static void
arm_unrecognized_feature(const char * opt,size_t len,const cpu_arch_option * target)530 arm_unrecognized_feature (const char *opt, size_t len,
531 const cpu_arch_option *target)
532 {
533 char *this_opt = XALLOCAVEC (char, len+1);
534 auto_vec<const char*> candidates;
535
536 strncpy (this_opt, opt, len);
537 this_opt[len] = 0;
538
539 error_at (input_location, "%qs does not support feature %qs", target->name,
540 this_opt);
541 for (const cpu_arch_extension *list = target->extensions;
542 list->name != NULL;
543 list++)
544 candidates.safe_push (list->name);
545
546 char *s;
547 const char *hint = candidates_list_and_hint (this_opt, s, candidates);
548
549 if (hint)
550 inform (input_location, "valid feature names are: %s; did you mean %qs?",
551 s, hint);
552 else
553 inform (input_location, "valid feature names are: %s", s);
554
555 XDELETEVEC (s);
556 }
557
558 /* Parse any feature extensions to add to (or remove from) the
559 permitted ISA selection. */
560 void
arm_parse_option_features(sbitmap isa,const cpu_arch_option * target,const char * opts_in)561 arm_parse_option_features (sbitmap isa, const cpu_arch_option *target,
562 const char *opts_in)
563 {
564 const char *opts = opts_in;
565
566 if (!opts)
567 return;
568
569 if (!target->extensions)
570 {
571 error_at (input_location, "%s does not take any feature options",
572 target->name);
573 return;
574 }
575
576 while (opts)
577 {
578 gcc_assert (*opts == '+');
579 const struct cpu_arch_extension *entry;
580 const char *end = strchr (++opts, '+');
581 size_t len = end ? end - opts : strlen (opts);
582 bool matched = false;
583
584 for (entry = target->extensions;
585 !matched && entry->name != NULL;
586 entry++)
587 {
588 if (strncmp (entry->name, opts, len) == 0
589 && entry->name[len] == '\0')
590 {
591 if (isa)
592 {
593 const enum isa_feature *f = entry->isa_bits;
594 if (entry->remove)
595 {
596 while (*f != isa_nobit)
597 bitmap_clear_bit (isa, *(f++));
598 }
599 else
600 {
601 while (*f != isa_nobit)
602 bitmap_set_bit (isa, *(f++));
603 }
604 }
605 matched = true;
606 }
607 }
608
609 if (!matched)
610 arm_unrecognized_feature (opts, len, target);
611
612 opts = end;
613 }
614 }
615
616 class candidate_extension
617 {
618 public:
619 const cpu_arch_extension *extension;
620 sbitmap isa_bits;
621 bool required;
622
candidate_extension(const cpu_arch_extension * ext,sbitmap bits)623 candidate_extension (const cpu_arch_extension *ext, sbitmap bits)
624 : extension (ext), isa_bits (bits), required (true)
625 {}
~candidate_extension()626 ~candidate_extension ()
627 {
628 sbitmap_free (isa_bits);
629 }
630 };
631
632 /* Generate a canonical representation of the -march option from the
633 current -march string (if given) and other options on the command
634 line that might affect the architecture. This aids multilib selection
635 by ensuring that:
636 a) the option is always present
637 b) only the minimal set of options are used
638 c) when there are multiple extensions, they are in a consistent order.
639
640 The options array consists of couplets of information where the
641 first item in each couplet is the string describing which option
642 name was selected (arch, cpu, fpu) and the second is the value
643 passed for that option.
644
645 arch_for_multilib is boolean variable taking value true or false.
646 arch_for_multilib is false when the canonical representation is for -march
647 option and it is true when canonical representation is for -mlibarch option.
648 On passing arch_for_multilib true the canonical string generated will be
649 without the compiler options which are not required for multilib linking. */
650 static const char *
arm_canon_arch_option_1(int argc,const char ** argv,bool arch_for_multilib)651 arm_canon_arch_option_1 (int argc, const char **argv, bool arch_for_multilib)
652 {
653 const char *arch = NULL;
654 const char *cpu = NULL;
655 const char *fpu = NULL;
656 const char *abi = NULL;
657 static char *canonical_arch = NULL;
658
659 /* Just in case we're called more than once. */
660 if (canonical_arch)
661 {
662 free (canonical_arch);
663 canonical_arch = NULL;
664 }
665
666 if (argc & 1)
667 fatal_error (input_location,
668 "%%:%<canon_for_mlib%> takes 1 or more pairs of parameters");
669
670 while (argc)
671 {
672 if (strcmp (argv[0], "arch") == 0)
673 arch = argv[1];
674 else if (strcmp (argv[0], "cpu") == 0)
675 cpu = argv[1];
676 else if (strcmp (argv[0], "fpu") == 0)
677 fpu = argv[1];
678 else if (strcmp (argv[0], "abi") == 0)
679 abi = argv[1];
680 else
681 fatal_error (input_location,
682 "unrecognized operand to %%:%<canon_for_mlib%>");
683
684 argc -= 2;
685 argv += 2;
686 }
687
688 auto_sbitmap target_isa (isa_num_bits);
689 auto_sbitmap base_isa (isa_num_bits);
690 auto_sbitmap fpu_isa (isa_num_bits);
691
692 bitmap_clear (fpu_isa);
693
694 const arch_option *selected_arch = NULL;
695
696 /* At least one of these must be defined by either the specs or the
697 user. */
698 gcc_assert (cpu || arch);
699
700 if (!fpu)
701 fpu = FPUTYPE_AUTO;
702
703 if (!abi)
704 {
705 if (TARGET_DEFAULT_FLOAT_ABI == ARM_FLOAT_ABI_SOFT)
706 abi = "soft";
707 else if (TARGET_DEFAULT_FLOAT_ABI == ARM_FLOAT_ABI_SOFTFP)
708 abi = "softfp";
709 else if (TARGET_DEFAULT_FLOAT_ABI == ARM_FLOAT_ABI_HARD)
710 abi = "hard";
711 }
712
713 /* First build up a bitmap describing the target architecture. */
714 if (arch)
715 {
716 selected_arch = arm_parse_arch_option_name (all_architectures, "-march",
717 arch, !arch_for_multilib);
718
719 if (selected_arch == NULL)
720 return "";
721
722 arm_initialize_isa (target_isa, selected_arch->common.isa_bits);
723 arm_parse_option_features (target_isa, &selected_arch->common,
724 strchr (arch, '+'));
725 if (arch_for_multilib)
726 {
727 const enum isa_feature removable_bits[] = {ISA_IGNORE_FOR_MULTILIB,
728 isa_nobit};
729 sbitmap isa_bits = sbitmap_alloc (isa_num_bits);
730 arm_initialize_isa (isa_bits, removable_bits);
731 bitmap_and_compl (target_isa, target_isa, isa_bits);
732 }
733
734 if (fpu && strcmp (fpu, "auto") != 0)
735 {
736 /* We assume that architectures do not have any FPU bits
737 enabled by default. If they did, we would need to strip
738 these out first. */
739 const arm_fpu_desc *target_fpu = arm_parse_fpu_option (fpu);
740 if (target_fpu == NULL)
741 return "";
742
743 arm_initialize_isa (fpu_isa, target_fpu->isa_bits);
744 bitmap_ior (target_isa, target_isa, fpu_isa);
745 }
746 }
747 else if (cpu)
748 {
749 const cpu_option *selected_cpu
750 = arm_parse_cpu_option_name (all_cores, "-mcpu", cpu,
751 !arch_for_multilib);
752
753 if (selected_cpu == NULL)
754 return "";
755
756 arm_initialize_isa (target_isa, selected_cpu->common.isa_bits);
757 arm_parse_option_features (target_isa, &selected_cpu->common,
758 strchr (cpu, '+'));
759 if (fpu && strcmp (fpu, "auto") != 0)
760 {
761 /* The easiest and safest way to remove the default fpu
762 capabilities is to look for a '+no..' option that removes
763 the base FPU bit (isa_bit_vfpv2). If that doesn't exist
764 then the best we can do is strip out all the bits that
765 might be part of the most capable FPU we know about,
766 which is "crypto-neon-fp-armv8". */
767 bool default_fpu_found = false;
768 if (selected_cpu->common.extensions)
769 {
770 const cpu_arch_extension *ext;
771 for (ext = selected_cpu->common.extensions; ext->name != NULL;
772 ++ext)
773 {
774 if (ext->remove
775 && check_isa_bits_for (ext->isa_bits, isa_bit_vfpv2))
776 {
777 arm_initialize_isa (fpu_isa, ext->isa_bits);
778 bitmap_and_compl (target_isa, target_isa, fpu_isa);
779 default_fpu_found = true;
780 }
781 }
782
783 }
784
785 if (!default_fpu_found)
786 {
787 arm_initialize_isa
788 (fpu_isa,
789 all_fpus[TARGET_FPU_crypto_neon_fp_armv8].isa_bits);
790 bitmap_and_compl (target_isa, target_isa, fpu_isa);
791 }
792
793 const arm_fpu_desc *target_fpu = arm_parse_fpu_option (fpu);
794 if (target_fpu == NULL)
795 return "";
796
797 arm_initialize_isa (fpu_isa, target_fpu->isa_bits);
798 bitmap_ior (target_isa, target_isa, fpu_isa);
799 }
800
801 selected_arch = all_architectures + selected_cpu->arch;
802 }
803
804 /* If we have a soft-float ABI, disable the FPU. */
805 if (abi && strcmp (abi, "soft") == 0)
806 {
807 /* Clearing the VFPv2 bit is sufficient to stop any extention that
808 builds on the FPU from matching. */
809 bitmap_clear_bit (target_isa, isa_bit_vfpv2);
810 }
811
812 /* If we don't have a selected architecture by now, something's
813 badly wrong. */
814 gcc_assert (selected_arch);
815
816 arm_initialize_isa (base_isa, selected_arch->common.isa_bits);
817
818 /* Architecture has no extension options, so just return the canonical
819 architecture name. */
820 if (selected_arch->common.extensions == NULL)
821 return selected_arch->common.name;
822
823 /* We're only interested in extension bits. */
824 bitmap_and_compl (target_isa, target_isa, base_isa);
825
826 /* There are no extensions needed. Just return the canonical architecture
827 name. */
828 if (bitmap_empty_p (target_isa))
829 return selected_arch->common.name;
830
831 /* What is left is the architecture that the compiler will target. We
832 now need to map that back into a suitable option+features list.
833
834 The list is built in two passes. First we scan every additive
835 option feature supported by the architecture. If the option
836 provides a subset of the features we need we add it to the list
837 of candidates. We then scan backwards over the list of
838 candidates and if we find a feature that adds nothing to one that
839 was later in the list we mark it as redundant. The result is a
840 minimal list of required features for the target
841 architecture. */
842
843 std::list<candidate_extension *> extensions;
844
845 auto_sbitmap target_isa_unsatisfied (isa_num_bits);
846 bitmap_copy (target_isa_unsatisfied, target_isa);
847
848 sbitmap isa_bits = NULL;
849 for (const cpu_arch_extension *cand = selected_arch->common.extensions;
850 cand->name != NULL;
851 cand++)
852 {
853 if (cand->remove || cand->alias)
854 continue;
855
856 if (isa_bits == NULL)
857 isa_bits = sbitmap_alloc (isa_num_bits);
858
859 arm_initialize_isa (isa_bits, cand->isa_bits);
860 if (bitmap_subset_p (isa_bits, target_isa))
861 {
862 extensions.push_back (new candidate_extension (cand, isa_bits));
863 bitmap_and_compl (target_isa_unsatisfied, target_isa_unsatisfied,
864 isa_bits);
865 isa_bits = NULL;
866 }
867 }
868
869 /* There's one extra case to consider, which is that the user has
870 specified an FPU that is less capable than this architecture
871 supports. In that case the code above will fail to find a
872 suitable feature. We handle this by scanning the list of options
873 again, matching the first option that provides an FPU that is
874 more capable than the selected FPU.
875
876 Note that the other case (user specified a more capable FPU than
877 this architecture supports) should end up selecting the most
878 capable FPU variant that we do support. This is sufficient for
879 multilib selection. */
880
881 if (bitmap_bit_p (target_isa_unsatisfied, isa_bit_vfpv2)
882 && bitmap_bit_p (fpu_isa, isa_bit_vfpv2))
883 {
884 std::list<candidate_extension *>::iterator ipoint = extensions.begin ();
885
886 for (const cpu_arch_extension *cand = selected_arch->common.extensions;
887 cand->name != NULL;
888 cand++)
889 {
890 if (cand->remove || cand->alias)
891 continue;
892
893 if (isa_bits == NULL)
894 isa_bits = sbitmap_alloc (isa_num_bits);
895
896 /* We need to keep the features in canonical order, so move the
897 insertion point if this feature is a candidate. */
898 if (ipoint != extensions.end ()
899 && (*ipoint)->extension == cand)
900 ++ipoint;
901
902 arm_initialize_isa (isa_bits, cand->isa_bits);
903 if (bitmap_subset_p (fpu_isa, isa_bits))
904 {
905 extensions.insert (ipoint,
906 new candidate_extension (cand, isa_bits));
907 isa_bits = NULL;
908 break;
909 }
910 }
911 }
912
913 if (isa_bits)
914 sbitmap_free (isa_bits);
915
916 bitmap_clear (target_isa);
917 size_t len = 1;
918 for (std::list<candidate_extension *>::reverse_iterator riter
919 = extensions.rbegin ();
920 riter != extensions.rend (); ++riter)
921 {
922 if (bitmap_subset_p ((*riter)->isa_bits, target_isa))
923 (*riter)->required = false;
924 else
925 {
926 bitmap_ior (target_isa, target_isa, (*riter)->isa_bits);
927 len += strlen ((*riter)->extension->name) + 1;
928 }
929 }
930
931 canonical_arch
932 = (char *) xmalloc (len + strlen (selected_arch->common.name));
933
934 strcpy (canonical_arch, selected_arch->common.name);
935
936 for (std::list<candidate_extension *>::iterator iter = extensions.begin ();
937 iter != extensions.end (); ++iter)
938 {
939 if ((*iter)->required)
940 {
941 strcat (canonical_arch, "+");
942 strcat (canonical_arch, (*iter)->extension->name);
943 }
944 delete (*iter);
945 }
946
947 return canonical_arch;
948 }
949
950 /* If building big-endian on a BE8 target generate a --be8 option for
951 the linker. Takes four types of option: "little" - little-endian;
952 "big" - big-endian; "be8" - force be8 iff big-endian; and "arch"
953 "<arch-name>" (two arguments) - the target architecture. The
954 parameter names are generated by the driver from the command-line
955 options. */
956 const char *
arm_be8_option(int argc,const char ** argv)957 arm_be8_option (int argc, const char **argv)
958 {
959 int endian = TARGET_ENDIAN_DEFAULT;
960 const char *arch = NULL;
961 int arg;
962 bool force = false;
963
964 for (arg = 0; arg < argc; arg++)
965 {
966 if (strcmp (argv[arg], "little") == 0)
967 endian = 0;
968 else if (strcmp (argv[arg], "big") == 0)
969 endian = 1;
970 else if (strcmp (argv[arg], "be8") == 0)
971 force = true;
972 else if (strcmp (argv[arg], "arch") == 0)
973 {
974 arg++;
975 gcc_assert (arg < argc);
976 arch = argv[arg];
977 }
978 else
979 gcc_unreachable ();
980 }
981
982 /* Little endian - no be8 option. */
983 if (!endian)
984 return "";
985
986 if (force)
987 return "--be8";
988
989 /* Arch might not be set iff arm_canon_arch (above) detected an
990 error. Do nothing in that case. */
991 if (!arch)
992 return "";
993
994 const arch_option *selected_arch
995 = arm_parse_arch_option_name (all_architectures, "-march", arch);
996
997 /* Similarly if the given arch option was itself invalid. */
998 if (!selected_arch)
999 return "";
1000
1001 if (check_isa_bits_for (selected_arch->common.isa_bits, isa_bit_be8))
1002 return "--be8";
1003
1004 return "";
1005 }
1006
1007 /* Generate a -mfpu= option for passing to the assembler. This is
1008 only called when -mfpu was set (possibly defaulted) to auto and is
1009 needed to ensure that the assembler knows the correct FPU to use.
1010 It wouldn't really be needed except that the compiler can be used
1011 to invoke the assembler directly on hand-written files that lack
1012 the necessary internal .fpu directives. We assume that the architecture
1013 canonicalization calls have already been made so that we have a final
1014 -march= option to derive the fpu from. */
1015 const char*
arm_asm_auto_mfpu(int argc,const char ** argv)1016 arm_asm_auto_mfpu (int argc, const char **argv)
1017 {
1018 static char *auto_fpu = NULL;
1019 const char *arch = NULL;
1020 static const enum isa_feature fpu_bitlist[]
1021 = { ISA_ALL_FPU_INTERNAL, isa_nobit };
1022 const arch_option *selected_arch;
1023 static const char* fpuname = "softvfp";
1024
1025 /* Handle multiple calls to this routine. */
1026 if (auto_fpu)
1027 {
1028 free (auto_fpu);
1029 auto_fpu = NULL;
1030 }
1031
1032 while (argc)
1033 {
1034 if (strcmp (argv[0], "arch") == 0)
1035 arch = argv[1];
1036 else
1037 fatal_error (input_location,
1038 "unrecognized operand to %%:%<asm_auto_mfpu%>");
1039 argc -= 2;
1040 argv += 2;
1041 }
1042
1043 auto_sbitmap target_isa (isa_num_bits);
1044 auto_sbitmap fpubits (isa_num_bits);
1045
1046 gcc_assert (arch != NULL);
1047 selected_arch = arm_parse_arch_option_name (all_architectures,
1048 "-march", arch);
1049 if (selected_arch == NULL)
1050 return "";
1051
1052 arm_initialize_isa (target_isa, selected_arch->common.isa_bits);
1053 arm_parse_option_features (target_isa, &selected_arch->common,
1054 strchr (arch, '+'));
1055 arm_initialize_isa (fpubits, fpu_bitlist);
1056
1057 bitmap_and (fpubits, fpubits, target_isa);
1058
1059 /* The logic below is essentially identical to that in
1060 arm.cc:arm_identify_fpu_from_isa(), but that only works in the main
1061 part of the compiler. */
1062
1063 /* If there are no FPU capability bits, we just pass -mfpu=softvfp. */
1064 if (!bitmap_empty_p (fpubits))
1065 {
1066 unsigned int i;
1067 auto_sbitmap cand_fpubits (isa_num_bits);
1068 for (i = 0; i < TARGET_FPU_auto; i++)
1069 {
1070 arm_initialize_isa (cand_fpubits, all_fpus[i].isa_bits);
1071 if (bitmap_equal_p (fpubits, cand_fpubits))
1072 {
1073 fpuname = all_fpus[i].name;
1074 break;
1075 }
1076 }
1077
1078 gcc_assert (i != TARGET_FPU_auto
1079 || bitmap_bit_p (target_isa, isa_bit_vfp_base));
1080 }
1081
1082 auto_fpu = (char *) xmalloc (strlen (fpuname) + sizeof ("-mfpu="));
1083 strcpy (auto_fpu, "-mfpu=");
1084 strcat (auto_fpu, fpuname);
1085 return auto_fpu;
1086 }
1087
1088 #undef ARM_CPU_NAME_LENGTH
1089
1090
1091 #undef TARGET_DEFAULT_TARGET_FLAGS
1092 #define TARGET_DEFAULT_TARGET_FLAGS (TARGET_DEFAULT | MASK_SCHED_PROLOG)
1093
1094 #undef TARGET_OPTION_OPTIMIZATION_TABLE
1095 #define TARGET_OPTION_OPTIMIZATION_TABLE arm_option_optimization_table
1096
1097 #undef TARGET_EXCEPT_UNWIND_INFO
1098 #define TARGET_EXCEPT_UNWIND_INFO arm_except_unwind_info
1099
1100 struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
1101
1102 /* Returns a canonical representation of the -march option from the current
1103 -march string (if given) and other options on the command line that might
1104 affect the architecture. */
1105 const char *
arm_canon_arch_option(int argc,const char ** argv)1106 arm_canon_arch_option (int argc, const char **argv)
1107 {
1108 return arm_canon_arch_option_1 (argc, argv, false);
1109 }
1110
1111 /* Returns a canonical representation of the -mlibarch option from the current
1112 -march string (if given) and other options on the command line that might
1113 affect the architecture after removing the compiler extension options which
1114 are not required for multilib linking. */
1115 const char *
arm_canon_arch_multilib_option(int argc,const char ** argv)1116 arm_canon_arch_multilib_option (int argc, const char **argv)
1117 {
1118 return arm_canon_arch_option_1 (argc, argv, true);
1119 }
1120