1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright (c) Amazon.com, Inc. or its affiliates.
3 * All rights reserved.
4 */
5
6 #ifndef ENA_COM
7 #define ENA_COM
8
9 #include "ena_plat.h"
10
11 #define ENA_MAX_NUM_IO_QUEUES 128U
12 /* We need to queues for each IO (on for Tx and one for Rx) */
13 #define ENA_TOTAL_NUM_QUEUES (2 * (ENA_MAX_NUM_IO_QUEUES))
14
15 #define ENA_MAX_HANDLERS 256
16
17 #define ENA_MAX_PHYS_ADDR_SIZE_BITS 48
18
19 /* Unit in usec */
20 #define ENA_REG_READ_TIMEOUT 200000
21
22 #define ADMIN_SQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_aq_entry))
23 #define ADMIN_CQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_acq_entry))
24 #define ADMIN_AENQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_aenq_entry))
25
26 /* Macros used to extract LSB/MSB from the
27 * enums defining the reset reasons
28 */
29 #define ENA_RESET_REASON_LSB_OFFSET 0
30 #define ENA_RESET_REASON_LSB_MASK 0xf
31 #define ENA_RESET_REASON_MSB_OFFSET 4
32 #define ENA_RESET_REASON_MSB_MASK 0xf0
33
34 #define ENA_CUSTOMER_METRICS_BUFFER_SIZE 512
35
36 /*****************************************************************************/
37 /*****************************************************************************/
38 /* ENA adaptive interrupt moderation settings */
39
40 #define ENA_INTR_INITIAL_TX_INTERVAL_USECS ENA_INTR_INITIAL_TX_INTERVAL_USECS_PLAT
41 #define ENA_INTR_INITIAL_RX_INTERVAL_USECS ENA_INTR_INITIAL_RX_INTERVAL_USECS_PLAT
42 #define ENA_DEFAULT_INTR_DELAY_RESOLUTION 1
43
44 #define ENA_HASH_KEY_SIZE 40
45
46 #define ENA_HW_HINTS_NO_TIMEOUT 0xFFFF
47
48 #define ENA_FEATURE_MAX_QUEUE_EXT_VER 1
49
50 struct ena_llq_configurations {
51 enum ena_admin_llq_header_location llq_header_location;
52 enum ena_admin_llq_ring_entry_size llq_ring_entry_size;
53 enum ena_admin_llq_stride_ctrl llq_stride_ctrl;
54 enum ena_admin_llq_num_descs_before_header llq_num_decs_before_header;
55 u16 llq_ring_entry_size_value;
56 };
57
58 enum queue_direction {
59 ENA_COM_IO_QUEUE_DIRECTION_TX,
60 ENA_COM_IO_QUEUE_DIRECTION_RX
61 };
62
63 struct ena_com_buf {
64 dma_addr_t paddr; /**< Buffer physical address */
65 u16 len; /**< Buffer length in bytes */
66 };
67
68 struct ena_com_rx_buf_info {
69 u16 len;
70 u16 req_id;
71 };
72
73 struct ena_com_io_desc_addr {
74 u8 __iomem *pbuf_dev_addr; /* LLQ address */
75 u8 *virt_addr;
76 dma_addr_t phys_addr;
77 ena_mem_handle_t mem_handle;
78 };
79
80 struct ena_com_tx_meta {
81 u16 mss;
82 u16 l3_hdr_len;
83 u16 l3_hdr_offset;
84 u16 l4_hdr_len; /* In words */
85 };
86
87 struct ena_com_llq_info {
88 u16 header_location_ctrl;
89 u16 desc_stride_ctrl;
90 u16 desc_list_entry_size_ctrl;
91 u16 desc_list_entry_size;
92 u16 descs_num_before_header;
93 u16 descs_per_entry;
94 u16 max_entries_in_tx_burst;
95 bool disable_meta_caching;
96 };
97
98 struct ena_com_io_cq {
99 struct ena_com_io_desc_addr cdesc_addr;
100 void *bus;
101
102 /* Interrupt unmask register */
103 u32 __iomem *unmask_reg;
104
105
106 /* numa configuration register (for TPH) */
107 u32 __iomem *numa_node_cfg_reg;
108
109 /* The value to write to the above register to unmask
110 * the interrupt of this queue
111 */
112 u32 msix_vector ____cacheline_aligned;
113
114 enum queue_direction direction;
115
116 /* holds the number of cdesc of the current packet */
117 u16 cur_rx_pkt_cdesc_count;
118 /* save the first cdesc idx of the current packet */
119 u16 cur_rx_pkt_cdesc_start_idx;
120
121 u16 q_depth;
122 /* Caller qid */
123 u16 qid;
124
125 /* Device queue index */
126 u16 idx;
127 u16 head;
128 u8 phase;
129 u8 cdesc_entry_size_in_bytes;
130
131 } ____cacheline_aligned;
132
133 struct ena_com_io_bounce_buffer_control {
134 u8 *base_buffer;
135 u16 next_to_use;
136 u16 buffer_size;
137 u16 buffers_num; /* Must be a power of 2 */
138 };
139
140 /* This struct is to keep tracking the current location of the next llq entry */
141 struct ena_com_llq_pkt_ctrl {
142 u8 *curr_bounce_buf;
143 u16 idx;
144 u16 descs_left_in_line;
145 };
146
147 struct ena_com_io_sq {
148 struct ena_com_io_desc_addr desc_addr;
149 void *bus;
150
151 u32 __iomem *db_addr;
152
153 enum queue_direction direction;
154 enum ena_admin_placement_policy_type mem_queue_type;
155
156 bool disable_meta_caching;
157
158 u32 msix_vector;
159 struct ena_com_tx_meta cached_tx_meta;
160 struct ena_com_llq_info llq_info;
161 struct ena_com_llq_pkt_ctrl llq_buf_ctrl;
162 struct ena_com_io_bounce_buffer_control bounce_buf_ctrl;
163
164 u16 q_depth;
165 u16 qid;
166
167 u16 idx;
168 u16 tail;
169 u16 next_to_comp;
170 u16 llq_last_copy_tail;
171 u32 tx_max_header_size;
172 u8 phase;
173 u8 desc_entry_size;
174 u8 dma_addr_bits;
175 u16 entries_in_tx_burst_left;
176 } ____cacheline_aligned;
177
178 struct ena_com_admin_cq {
179 struct ena_admin_acq_entry *entries;
180 ena_mem_handle_t mem_handle;
181 dma_addr_t dma_addr;
182
183 u16 head;
184 u8 phase;
185 };
186
187 struct ena_com_admin_sq {
188 struct ena_admin_aq_entry *entries;
189 ena_mem_handle_t mem_handle;
190 dma_addr_t dma_addr;
191
192 u32 __iomem *db_addr;
193
194 u16 head;
195 u16 tail;
196 u8 phase;
197
198 };
199
200 struct ena_com_stats_admin {
201 u64 aborted_cmd;
202 u64 submitted_cmd;
203 u64 completed_cmd;
204 u64 out_of_space;
205 u64 no_completion;
206 };
207
208 struct ena_com_stats_phc {
209 u64 phc_cnt;
210 u64 phc_exp;
211 u64 phc_skp;
212 u64 phc_err;
213 };
214
215 struct ena_com_admin_queue {
216 void *q_dmadev;
217 void *bus;
218 struct ena_com_dev *ena_dev;
219 ena_spinlock_t q_lock; /* spinlock for the admin queue */
220
221 struct ena_comp_ctx *comp_ctx;
222 u32 completion_timeout;
223 u16 q_depth;
224 struct ena_com_admin_cq cq;
225 struct ena_com_admin_sq sq;
226
227 /* Indicate if the admin queue should poll for completion */
228 bool polling;
229
230 /* Define if fallback to polling mode should occur */
231 bool auto_polling;
232
233 u16 curr_cmd_id;
234
235 /* Indicate that the ena was initialized and can
236 * process new admin commands
237 */
238 bool running_state;
239
240 bool is_missing_admin_interrupt;
241
242 /* Count the number of outstanding admin commands */
243 ena_atomic32_t outstanding_cmds;
244
245 struct ena_com_stats_admin stats;
246 };
247
248 struct ena_aenq_handlers;
249
250 struct ena_com_aenq {
251 u16 head;
252 u8 phase;
253 struct ena_admin_aenq_entry *entries;
254 dma_addr_t dma_addr;
255 ena_mem_handle_t mem_handle;
256 u16 q_depth;
257 struct ena_aenq_handlers *aenq_handlers;
258 };
259
260 struct ena_com_mmio_read {
261 struct ena_admin_ena_mmio_req_read_less_resp *read_resp;
262 dma_addr_t read_resp_dma_addr;
263 ena_mem_handle_t read_resp_mem_handle;
264 u32 reg_read_to; /* in us */
265 u16 seq_num;
266 bool readless_supported;
267 /* spin lock to ensure a single outstanding read */
268 ena_spinlock_t lock;
269 };
270
271 /* PTP hardware clock (PHC) MMIO read data info */
272 struct ena_com_phc_info {
273 /* Internal PHC statistics */
274 struct ena_com_stats_phc stats;
275
276 /* PHC shared memory - virtual address */
277 struct ena_admin_phc_resp *virt_addr;
278
279 /* System time of last PHC request */
280 ena_time_high_res_t system_time;
281
282 /* Spin lock to ensure a single outstanding PHC read */
283 ena_spinlock_t lock;
284
285 /* PHC doorbell address as an offset to PCIe MMIO REG BAR */
286 u32 doorbell_offset;
287
288 /* Shared memory read expire timeout (usec)
289 * Max time for valid PHC retrieval, passing this threshold will fail the get time request
290 * and block new PHC requests for block_timeout_usec in order to prevent floods on busy
291 * device
292 */
293 u32 expire_timeout_usec;
294
295 /* Shared memory read abort timeout (usec)
296 * PHC requests block period, blocking starts once PHC request expired in order to prevent
297 * floods on busy device, any PHC requests during block period will be skipped
298 */
299 u32 block_timeout_usec;
300
301 /* PHC shared memory - physical address */
302 dma_addr_t phys_addr;
303
304 /* PHC shared memory handle */
305 ena_mem_handle_t mem_handle;
306
307 /* Cached error bound per timestamp sample */
308 u32 error_bound;
309
310 /* Request id sent to the device */
311 u16 req_id;
312
313 /* True if PHC is active in the device */
314 bool active;
315 };
316
317 struct ena_rss {
318 /* Indirect table */
319 u16 *host_rss_ind_tbl;
320 struct ena_admin_rss_ind_table_entry *rss_ind_tbl;
321 dma_addr_t rss_ind_tbl_dma_addr;
322 ena_mem_handle_t rss_ind_tbl_mem_handle;
323 u16 tbl_log_size;
324
325 /* Hash key */
326 enum ena_admin_hash_functions hash_func;
327 struct ena_admin_feature_rss_flow_hash_control *hash_key;
328 dma_addr_t hash_key_dma_addr;
329 ena_mem_handle_t hash_key_mem_handle;
330 u32 hash_init_val;
331
332 /* Flow Control */
333 struct ena_admin_feature_rss_hash_control *hash_ctrl;
334 dma_addr_t hash_ctrl_dma_addr;
335 ena_mem_handle_t hash_ctrl_mem_handle;
336
337 };
338
339 struct ena_customer_metrics {
340 /* in correlation with ENA_ADMIN_CUSTOMER_METRICS_SUPPORT_MASK
341 * and ena_admin_customer_metrics_id
342 */
343 uint64_t supported_metrics;
344 dma_addr_t buffer_dma_addr;
345 void *buffer_virt_addr;
346 ena_mem_handle_t buffer_dma_handle;
347 u32 buffer_len;
348 };
349
350 struct ena_host_attribute {
351 /* Debug area */
352 u8 *debug_area_virt_addr;
353 dma_addr_t debug_area_dma_addr;
354 ena_mem_handle_t debug_area_dma_handle;
355 u32 debug_area_size;
356
357 /* Host information */
358 struct ena_admin_host_info *host_info;
359 dma_addr_t host_info_dma_addr;
360 ena_mem_handle_t host_info_dma_handle;
361 };
362
363 /* Each ena_dev is a PCI function. */
364 struct ena_com_dev {
365 struct ena_com_admin_queue admin_queue;
366 struct ena_com_aenq aenq;
367 struct ena_com_io_cq io_cq_queues[ENA_TOTAL_NUM_QUEUES];
368 struct ena_com_io_sq io_sq_queues[ENA_TOTAL_NUM_QUEUES];
369 u8 __iomem *reg_bar;
370 void __iomem *mem_bar;
371 void *dmadev;
372 void *bus;
373 ena_netdev *net_device;
374
375 enum ena_admin_placement_policy_type tx_mem_queue_type;
376 u32 tx_max_header_size;
377 u16 stats_func; /* Selected function for extended statistic dump */
378 u16 stats_queue; /* Selected queue for extended statistic dump */
379
380 u32 ena_min_poll_delay_us;
381
382 struct ena_com_mmio_read mmio_read;
383 struct ena_com_phc_info phc;
384
385 struct ena_rss rss;
386 u32 supported_features;
387 u32 capabilities;
388 u32 dma_addr_bits;
389
390 struct ena_host_attribute host_attr;
391 bool adaptive_coalescing;
392 u16 intr_delay_resolution;
393
394 /* interrupt moderation intervals are in usec divided by
395 * intr_delay_resolution, which is supplied by the device.
396 */
397 u32 intr_moder_tx_interval;
398 u32 intr_moder_rx_interval;
399
400 struct ena_intr_moder_entry *intr_moder_tbl;
401
402 struct ena_com_llq_info llq_info;
403
404 struct ena_customer_metrics customer_metrics;
405 };
406
407 struct ena_com_dev_get_features_ctx {
408 struct ena_admin_queue_feature_desc max_queues;
409 struct ena_admin_queue_ext_feature_desc max_queue_ext;
410 struct ena_admin_device_attr_feature_desc dev_attr;
411 struct ena_admin_feature_aenq_desc aenq;
412 struct ena_admin_feature_offload_desc offload;
413 struct ena_admin_ena_hw_hints hw_hints;
414 struct ena_admin_feature_llq_desc llq;
415 };
416
417 struct ena_com_create_io_ctx {
418 enum ena_admin_placement_policy_type mem_queue_type;
419 enum queue_direction direction;
420 int numa_node;
421 u32 msix_vector;
422 u16 queue_size;
423 u16 qid;
424 };
425
426 typedef void (*ena_aenq_handler)(void *data,
427 struct ena_admin_aenq_entry *aenq_e);
428
429 /* Holds aenq handlers. Indexed by AENQ event group */
430 struct ena_aenq_handlers {
431 ena_aenq_handler handlers[ENA_MAX_HANDLERS];
432 ena_aenq_handler unimplemented_handler;
433 };
434
435 /*****************************************************************************/
436 /*****************************************************************************/
437 #if defined(__cplusplus)
438 extern "C" {
439 #endif
440
441 /* ena_com_mmio_reg_read_request_init - Init the mmio reg read mechanism
442 * @ena_dev: ENA communication layer struct
443 *
444 * Initialize the register read mechanism.
445 *
446 * @note: This method must be the first stage in the initialization sequence.
447 *
448 * @return - 0 on success, negative value on failure.
449 */
450 int ena_com_mmio_reg_read_request_init(struct ena_com_dev *ena_dev);
451
452 /* ena_com_phc_init - Allocate and initialize PHC feature
453 * @ena_dev: ENA communication layer struct
454 * @note: This method assumes PHC is supported by the device
455 * @return - 0 on success, negative value on failure
456 */
457 int ena_com_phc_init(struct ena_com_dev *ena_dev);
458
459 /* ena_com_phc_supported - Return if PHC feature is supported by the device
460 * @ena_dev: ENA communication layer struct
461 * @note: This method must be called after getting supported features
462 * @return - supported or not
463 */
464 bool ena_com_phc_supported(struct ena_com_dev *ena_dev);
465
466 /* ena_com_phc_config - Configure PHC feature
467 * @ena_dev: ENA communication layer struct
468 * Configure PHC feature in driver and device
469 * @note: This method assumes PHC is supported by the device
470 * @return - 0 on success, negative value on failure
471 */
472 int ena_com_phc_config(struct ena_com_dev *ena_dev);
473
474 /* ena_com_phc_destroy - Destroy PHC feature
475 * @ena_dev: ENA communication layer struct
476 */
477 void ena_com_phc_destroy(struct ena_com_dev *ena_dev);
478
479 /* ena_com_phc_get_timestamp - Retrieve PHC timestamp
480 * @ena_dev: ENA communication layer struct
481 * @timestamp: Retrieved PHC timestamp
482 * @return - 0 on success, negative value on failure
483 */
484 int ena_com_phc_get_timestamp(struct ena_com_dev *ena_dev, u64 *timestamp);
485
486 /* ena_com_phc_get_error_bound - Retrieve cached PHC error bound
487 * @ena_dev: ENA communication layer struct
488 * @error_bound: Cached PHC error bound
489 * @return - 0 on success, negative value on failure
490 */
491 int ena_com_phc_get_error_bound(struct ena_com_dev *ena_dev, u32 *error_bound);
492
493 /* ena_com_set_mmio_read_mode - Enable/disable the indirect mmio reg read mechanism
494 * @ena_dev: ENA communication layer struct
495 * @readless_supported: readless mode (enable/disable)
496 */
497 void ena_com_set_mmio_read_mode(struct ena_com_dev *ena_dev,
498 bool readless_supported);
499
500 /* ena_com_mmio_reg_read_request_write_dev_addr - Write the mmio reg read return
501 * value physical address.
502 * @ena_dev: ENA communication layer struct
503 */
504 void ena_com_mmio_reg_read_request_write_dev_addr(struct ena_com_dev *ena_dev);
505
506 /* ena_com_mmio_reg_read_request_destroy - Destroy the mmio reg read mechanism
507 * @ena_dev: ENA communication layer struct
508 */
509 void ena_com_mmio_reg_read_request_destroy(struct ena_com_dev *ena_dev);
510
511 /* ena_com_admin_init - Init the admin and the async queues
512 * @ena_dev: ENA communication layer struct
513 * @aenq_handlers: Those handlers to be called upon event.
514 *
515 * Initialize the admin submission and completion queues.
516 * Initialize the asynchronous events notification queues.
517 *
518 * @return - 0 on success, negative value on failure.
519 */
520 int ena_com_admin_init(struct ena_com_dev *ena_dev,
521 struct ena_aenq_handlers *aenq_handlers);
522
523 /* ena_com_admin_destroy - Destroy the admin and the async events queues.
524 * @ena_dev: ENA communication layer struct
525 *
526 * @note: Before calling this method, the caller must validate that the device
527 * won't send any additional admin completions/aenq.
528 * To achieve that, a FLR is recommended.
529 */
530 void ena_com_admin_destroy(struct ena_com_dev *ena_dev);
531
532 /* ena_com_dev_reset - Perform device FLR to the device.
533 * @ena_dev: ENA communication layer struct
534 * @reset_reason: Specify what is the trigger for the reset in case of an error.
535 *
536 * @return - 0 on success, negative value on failure.
537 */
538 int ena_com_dev_reset(struct ena_com_dev *ena_dev,
539 enum ena_regs_reset_reason_types reset_reason);
540
541 /* ena_com_create_io_queue - Create io queue.
542 * @ena_dev: ENA communication layer struct
543 * @ctx - create context structure
544 *
545 * Create the submission and the completion queues.
546 *
547 * @return - 0 on success, negative value on failure.
548 */
549 int ena_com_create_io_queue(struct ena_com_dev *ena_dev,
550 struct ena_com_create_io_ctx *ctx);
551
552 /* ena_com_destroy_io_queue - Destroy IO queue with the queue id - qid.
553 * @ena_dev: ENA communication layer struct
554 * @qid - the caller virtual queue id.
555 */
556 void ena_com_destroy_io_queue(struct ena_com_dev *ena_dev, u16 qid);
557
558 /* ena_com_get_io_handlers - Return the io queue handlers
559 * @ena_dev: ENA communication layer struct
560 * @qid - the caller virtual queue id.
561 * @io_sq - IO submission queue handler
562 * @io_cq - IO completion queue handler.
563 *
564 * @return - 0 on success, negative value on failure.
565 */
566 int ena_com_get_io_handlers(struct ena_com_dev *ena_dev, u16 qid,
567 struct ena_com_io_sq **io_sq,
568 struct ena_com_io_cq **io_cq);
569
570 /* ena_com_admin_aenq_enable - ENAble asynchronous event notifications
571 * @ena_dev: ENA communication layer struct
572 *
573 * After this method, aenq event can be received via AENQ.
574 */
575 void ena_com_admin_aenq_enable(struct ena_com_dev *ena_dev);
576
577 /* ena_com_set_admin_running_state - Set the state of the admin queue
578 * @ena_dev: ENA communication layer struct
579 *
580 * Change the state of the admin queue (enable/disable)
581 */
582 void ena_com_set_admin_running_state(struct ena_com_dev *ena_dev, bool state);
583
584 /* ena_com_get_admin_running_state - Get the admin queue state
585 * @ena_dev: ENA communication layer struct
586 *
587 * Retrieve the state of the admin queue (enable/disable)
588 *
589 * @return - current polling mode (enable/disable)
590 */
591 bool ena_com_get_admin_running_state(struct ena_com_dev *ena_dev);
592
593 /* ena_com_set_admin_polling_mode - Set the admin completion queue polling mode
594 * @ena_dev: ENA communication layer struct
595 * @polling: ENAble/Disable polling mode
596 *
597 * Set the admin completion mode.
598 */
599 void ena_com_set_admin_polling_mode(struct ena_com_dev *ena_dev, bool polling);
600
601 /* ena_com_get_admin_polling_mode - Get the admin completion queue polling mode
602 * @ena_dev: ENA communication layer struct
603 *
604 * Get the admin completion mode.
605 * If polling mode is on, ena_com_execute_admin_command will perform a
606 * polling on the admin completion queue for the commands completion,
607 * otherwise it will wait on wait event.
608 *
609 * @return state
610 */
611 bool ena_com_get_admin_polling_mode(struct ena_com_dev *ena_dev);
612
613 /* ena_com_set_admin_auto_polling_mode - Enable autoswitch to polling mode
614 * @ena_dev: ENA communication layer struct
615 * @polling: Enable/Disable polling mode
616 *
617 * Set the autopolling mode.
618 * If autopolling is on:
619 * In case of missing interrupt when data is available switch to polling.
620 */
621 void ena_com_set_admin_auto_polling_mode(struct ena_com_dev *ena_dev,
622 bool polling);
623
624 /* ena_com_admin_q_comp_intr_handler - admin queue interrupt handler
625 * @ena_dev: ENA communication layer struct
626 *
627 * This method goes over the admin completion queue and wakes up all the pending
628 * threads that wait on the commands wait event.
629 *
630 * @note: Should be called after MSI-X interrupt.
631 */
632 void ena_com_admin_q_comp_intr_handler(struct ena_com_dev *ena_dev);
633
634 /* ena_com_aenq_intr_handler - AENQ interrupt handler
635 * @ena_dev: ENA communication layer struct
636 *
637 * This method goes over the async event notification queue and calls the proper
638 * aenq handler.
639 */
640 void ena_com_aenq_intr_handler(struct ena_com_dev *ena_dev, void *data);
641
642 /* ena_com_aenq_has_keep_alive - Retrieve if there is a keep alive notification in the aenq
643 * @ena_dev: ENA communication layer struct
644 *
645 * This method goes over the async event notification queue and returns if there
646 * is a keep alive notification.
647 *
648 * @return - true if there is a keep alive notification in the aenq or false otherwise
649 */
650 bool ena_com_aenq_has_keep_alive(struct ena_com_dev *ena_dev);
651
652 /* ena_com_abort_admin_commands - Abort all the outstanding admin commands.
653 * @ena_dev: ENA communication layer struct
654 *
655 * This method aborts all the outstanding admin commands.
656 * The caller should then call ena_com_wait_for_abort_completion to make sure
657 * all the commands were completed.
658 */
659 void ena_com_abort_admin_commands(struct ena_com_dev *ena_dev);
660
661 /* ena_com_wait_for_abort_completion - Wait for admin commands abort.
662 * @ena_dev: ENA communication layer struct
663 *
664 * This method waits until all the outstanding admin commands are completed.
665 */
666 void ena_com_wait_for_abort_completion(struct ena_com_dev *ena_dev);
667
668 /* ena_com_validate_version - Validate the device parameters
669 * @ena_dev: ENA communication layer struct
670 *
671 * This method verifies the device parameters are the same as the saved
672 * parameters in ena_dev.
673 * This method is useful after device reset, to validate the device mac address
674 * and the device offloads are the same as before the reset.
675 *
676 * @return - 0 on success negative value otherwise.
677 */
678 int ena_com_validate_version(struct ena_com_dev *ena_dev);
679
680 /* ena_com_get_link_params - Retrieve physical link parameters.
681 * @ena_dev: ENA communication layer struct
682 * @resp: Link parameters
683 *
684 * Retrieve the physical link parameters,
685 * like speed, auto-negotiation and full duplex support.
686 *
687 * @return - 0 on Success negative value otherwise.
688 */
689 int ena_com_get_link_params(struct ena_com_dev *ena_dev,
690 struct ena_admin_get_feat_resp *resp);
691
692 /* ena_com_get_dma_width - Retrieve physical dma address width the device
693 * supports.
694 * @ena_dev: ENA communication layer struct
695 *
696 * Retrieve the maximum physical address bits the device can handle.
697 *
698 * @return: > 0 on Success and negative value otherwise.
699 */
700 int ena_com_get_dma_width(struct ena_com_dev *ena_dev);
701
702 /* ena_com_set_aenq_config - Set aenq groups configurations
703 * @ena_dev: ENA communication layer struct
704 * @groups flag: bit fields flags of enum ena_admin_aenq_group.
705 *
706 * Configure which aenq event group the driver would like to receive.
707 *
708 * @return: 0 on Success and negative value otherwise.
709 */
710 int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag);
711
712 /* ena_com_get_dev_attr_feat - Get device features
713 * @ena_dev: ENA communication layer struct
714 * @get_feat_ctx: returned context that contain the get features.
715 *
716 * @return: 0 on Success and negative value otherwise.
717 */
718 int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,
719 struct ena_com_dev_get_features_ctx *get_feat_ctx);
720
721 /* ena_com_get_dev_basic_stats - Get device basic statistics
722 * @ena_dev: ENA communication layer struct
723 * @stats: stats return value
724 *
725 * @return: 0 on Success and negative value otherwise.
726 */
727 int ena_com_get_dev_basic_stats(struct ena_com_dev *ena_dev,
728 struct ena_admin_basic_stats *stats);
729
730 /* ena_com_get_eni_stats - Get extended network interface statistics
731 * @ena_dev: ENA communication layer struct
732 * @stats: stats return value
733 *
734 * @return: 0 on Success and negative value otherwise.
735 */
736 int ena_com_get_eni_stats(struct ena_com_dev *ena_dev,
737 struct ena_admin_eni_stats *stats);
738
739 /* ena_com_get_ena_srd_info - Get ENA SRD network interface statistics
740 * @ena_dev: ENA communication layer struct
741 * @info: ena srd stats and flags
742 *
743 * @return: 0 on Success and negative value otherwise.
744 */
745 int ena_com_get_ena_srd_info(struct ena_com_dev *ena_dev,
746 struct ena_admin_ena_srd_info *info);
747
748 /* ena_com_get_customer_metrics - Get customer metrics for network interface
749 * @ena_dev: ENA communication layer struct
750 * @buffer: buffer for returned customer metrics
751 * @len: size of the buffer
752 *
753 * @return: 0 on Success and negative value otherwise.
754 */
755 int ena_com_get_customer_metrics(struct ena_com_dev *ena_dev, char *buffer, u32 len);
756
757 /* ena_com_set_dev_mtu - Configure the device mtu.
758 * @ena_dev: ENA communication layer struct
759 * @mtu: mtu value
760 *
761 * @return: 0 on Success and negative value otherwise.
762 */
763 int ena_com_set_dev_mtu(struct ena_com_dev *ena_dev, u32 mtu);
764
765 /* ena_com_get_offload_settings - Retrieve the device offloads capabilities
766 * @ena_dev: ENA communication layer struct
767 * @offlad: offload return value
768 *
769 * @return: 0 on Success and negative value otherwise.
770 */
771 int ena_com_get_offload_settings(struct ena_com_dev *ena_dev,
772 struct ena_admin_feature_offload_desc *offload);
773
774 /* ena_com_rss_init - Init RSS
775 * @ena_dev: ENA communication layer struct
776 * @log_size: indirection log size
777 *
778 * Allocate RSS/RFS resources.
779 * The caller then can configure rss using ena_com_set_hash_function,
780 * ena_com_set_hash_ctrl and ena_com_indirect_table_set.
781 *
782 * @return: 0 on Success and negative value otherwise.
783 */
784 int ena_com_rss_init(struct ena_com_dev *ena_dev, u16 log_size);
785
786 /* ena_com_rss_destroy - Destroy rss
787 * @ena_dev: ENA communication layer struct
788 *
789 * Free all the RSS/RFS resources.
790 */
791 void ena_com_rss_destroy(struct ena_com_dev *ena_dev);
792
793 /* ena_com_get_current_hash_function - Get RSS hash function
794 * @ena_dev: ENA communication layer struct
795 *
796 * Return the current hash function.
797 * @return: 0 or one of the ena_admin_hash_functions values.
798 */
799 int ena_com_get_current_hash_function(struct ena_com_dev *ena_dev);
800
801 /* ena_com_fill_hash_function - Fill RSS hash function
802 * @ena_dev: ENA communication layer struct
803 * @func: The hash function (Toeplitz or crc)
804 * @key: Hash key (for toeplitz hash)
805 * @key_len: key length (max length 10 DW)
806 * @init_val: initial value for the hash function
807 *
808 * Fill the ena_dev resources with the desire hash function, hash key, key_len
809 * and key initial value (if needed by the hash function).
810 * To flush the key into the device the caller should call
811 * ena_com_set_hash_function.
812 *
813 * @return: 0 on Success and negative value otherwise.
814 */
815 int ena_com_fill_hash_function(struct ena_com_dev *ena_dev,
816 enum ena_admin_hash_functions func,
817 const u8 *key, u16 key_len, u32 init_val);
818
819 /* ena_com_set_hash_function - Flush the hash function and it dependencies to
820 * the device.
821 * @ena_dev: ENA communication layer struct
822 *
823 * Flush the hash function and it dependencies (key, key length and
824 * initial value) if needed.
825 *
826 * @note: Prior to this method the caller should call ena_com_fill_hash_function
827 *
828 * @return: 0 on Success and negative value otherwise.
829 */
830 int ena_com_set_hash_function(struct ena_com_dev *ena_dev);
831
832 /* ena_com_get_hash_function - Retrieve the hash function from the device.
833 * @ena_dev: ENA communication layer struct
834 * @func: hash function
835 *
836 * Retrieve the hash function from the device.
837 *
838 * @note: If the caller called ena_com_fill_hash_function but didn't flush
839 * it to the device, the new configuration will be lost.
840 *
841 * @return: 0 on Success and negative value otherwise.
842 */
843 int ena_com_get_hash_function(struct ena_com_dev *ena_dev,
844 enum ena_admin_hash_functions *func);
845
846 /* ena_com_get_hash_key - Retrieve the hash key
847 * @ena_dev: ENA communication layer struct
848 * @key: hash key
849 *
850 * Retrieve the hash key.
851 *
852 * @note: If the caller called ena_com_fill_hash_key but didn't flush
853 * it to the device, the new configuration will be lost.
854 *
855 * @return: 0 on Success and negative value otherwise.
856 */
857 int ena_com_get_hash_key(struct ena_com_dev *ena_dev, u8 *key);
858 /* ena_com_fill_hash_ctrl - Fill RSS hash control
859 * @ena_dev: ENA communication layer struct.
860 * @proto: The protocol to configure.
861 * @hash_fields: bit mask of ena_admin_flow_hash_fields
862 *
863 * Fill the ena_dev resources with the desire hash control (the ethernet
864 * fields that take part of the hash) for a specific protocol.
865 * To flush the hash control to the device, the caller should call
866 * ena_com_set_hash_ctrl.
867 *
868 * @return: 0 on Success and negative value otherwise.
869 */
870 int ena_com_fill_hash_ctrl(struct ena_com_dev *ena_dev,
871 enum ena_admin_flow_hash_proto proto,
872 u16 hash_fields);
873
874 /* ena_com_set_hash_ctrl - Flush the hash control resources to the device.
875 * @ena_dev: ENA communication layer struct
876 *
877 * Flush the hash control (the ethernet fields that take part of the hash)
878 *
879 * @note: Prior to this method the caller should call ena_com_fill_hash_ctrl.
880 *
881 * @return: 0 on Success and negative value otherwise.
882 */
883 int ena_com_set_hash_ctrl(struct ena_com_dev *ena_dev);
884
885 /* ena_com_get_hash_ctrl - Retrieve the hash control from the device.
886 * @ena_dev: ENA communication layer struct
887 * @proto: The protocol to retrieve.
888 * @fields: bit mask of ena_admin_flow_hash_fields.
889 *
890 * Retrieve the hash control from the device.
891 *
892 * @note: If the caller called ena_com_fill_hash_ctrl but didn't flush
893 * it to the device, the new configuration will be lost.
894 *
895 * @return: 0 on Success and negative value otherwise.
896 */
897 int ena_com_get_hash_ctrl(struct ena_com_dev *ena_dev,
898 enum ena_admin_flow_hash_proto proto,
899 u16 *fields);
900
901 /* ena_com_set_default_hash_ctrl - Set the hash control to a default
902 * configuration.
903 * @ena_dev: ENA communication layer struct
904 *
905 * Fill the ena_dev resources with the default hash control configuration.
906 * To flush the hash control to the device, the caller should call
907 * ena_com_set_hash_ctrl.
908 *
909 * @return: 0 on Success and negative value otherwise.
910 */
911 int ena_com_set_default_hash_ctrl(struct ena_com_dev *ena_dev);
912
913 /* ena_com_indirect_table_fill_entry - Fill a single entry in the RSS
914 * indirection table
915 * @ena_dev: ENA communication layer struct.
916 * @entry_idx - indirection table entry.
917 * @entry_value - redirection value
918 *
919 * Fill a single entry of the RSS indirection table in the ena_dev resources.
920 * To flush the indirection table to the device, the called should call
921 * ena_com_indirect_table_set.
922 *
923 * @return: 0 on Success and negative value otherwise.
924 */
925 int ena_com_indirect_table_fill_entry(struct ena_com_dev *ena_dev,
926 u16 entry_idx, u16 entry_value);
927
928 /* ena_com_indirect_table_set - Flush the indirection table to the device.
929 * @ena_dev: ENA communication layer struct
930 *
931 * Flush the indirection hash control to the device.
932 * Prior to this method the caller should call ena_com_indirect_table_fill_entry
933 *
934 * @return: 0 on Success and negative value otherwise.
935 */
936 int ena_com_indirect_table_set(struct ena_com_dev *ena_dev);
937
938 /* ena_com_indirect_table_get - Retrieve the indirection table from the device.
939 * @ena_dev: ENA communication layer struct
940 * @ind_tbl: indirection table
941 *
942 * Retrieve the RSS indirection table from the device.
943 *
944 * @note: If the caller called ena_com_indirect_table_fill_entry but didn't flush
945 * it to the device, the new configuration will be lost.
946 *
947 * @return: 0 on Success and negative value otherwise.
948 */
949 int ena_com_indirect_table_get(struct ena_com_dev *ena_dev, u32 *ind_tbl);
950
951 /* ena_com_allocate_host_info - Allocate host info resources.
952 * @ena_dev: ENA communication layer struct
953 *
954 * @return: 0 on Success and negative value otherwise.
955 */
956 int ena_com_allocate_host_info(struct ena_com_dev *ena_dev);
957
958 /* ena_com_allocate_debug_area - Allocate debug area.
959 * @ena_dev: ENA communication layer struct
960 * @debug_area_size - debug area size.
961 *
962 * @return: 0 on Success and negative value otherwise.
963 */
964 int ena_com_allocate_debug_area(struct ena_com_dev *ena_dev,
965 u32 debug_area_size);
966
967 /* ena_com_allocate_customer_metrics_buffer - Allocate customer metrics resources.
968 * @ena_dev: ENA communication layer struct
969 *
970 * @return: 0 on Success and negative value otherwise.
971 */
972 int ena_com_allocate_customer_metrics_buffer(struct ena_com_dev *ena_dev);
973
974 /* ena_com_delete_debug_area - Free the debug area resources.
975 * @ena_dev: ENA communication layer struct
976 *
977 * Free the allocated debug area.
978 */
979 void ena_com_delete_debug_area(struct ena_com_dev *ena_dev);
980
981 /* ena_com_delete_host_info - Free the host info resources.
982 * @ena_dev: ENA communication layer struct
983 *
984 * Free the allocated host info.
985 */
986 void ena_com_delete_host_info(struct ena_com_dev *ena_dev);
987
988 /* ena_com_delete_customer_metrics_buffer - Free the customer metrics resources.
989 * @ena_dev: ENA communication layer struct
990 *
991 * Free the allocated customer metrics area.
992 */
993 void ena_com_delete_customer_metrics_buffer(struct ena_com_dev *ena_dev);
994
995 /* ena_com_set_host_attributes - Update the device with the host
996 * attributes (debug area and host info) base address.
997 * @ena_dev: ENA communication layer struct
998 *
999 * @return: 0 on Success and negative value otherwise.
1000 */
1001 int ena_com_set_host_attributes(struct ena_com_dev *ena_dev);
1002
1003 /* ena_com_create_io_cq - Create io completion queue.
1004 * @ena_dev: ENA communication layer struct
1005 * @io_cq - io completion queue handler
1006
1007 * Create IO completion queue.
1008 *
1009 * @return - 0 on success, negative value on failure.
1010 */
1011 int ena_com_create_io_cq(struct ena_com_dev *ena_dev,
1012 struct ena_com_io_cq *io_cq);
1013
1014 /* ena_com_destroy_io_cq - Destroy io completion queue.
1015 * @ena_dev: ENA communication layer struct
1016 * @io_cq - io completion queue handler
1017
1018 * Destroy IO completion queue.
1019 *
1020 * @return - 0 on success, negative value on failure.
1021 */
1022 int ena_com_destroy_io_cq(struct ena_com_dev *ena_dev,
1023 struct ena_com_io_cq *io_cq);
1024
1025 /* ena_com_execute_admin_command - Execute admin command
1026 * @admin_queue: admin queue.
1027 * @cmd: the admin command to execute.
1028 * @cmd_size: the command size.
1029 * @cmd_completion: command completion return value.
1030 * @cmd_comp_size: command completion size.
1031
1032 * Submit an admin command and then wait until the device returns a
1033 * completion.
1034 * The completion will be copied into cmd_comp.
1035 *
1036 * @return - 0 on success, negative value on failure.
1037 */
1038 int ena_com_execute_admin_command(struct ena_com_admin_queue *admin_queue,
1039 struct ena_admin_aq_entry *cmd,
1040 size_t cmd_size,
1041 struct ena_admin_acq_entry *cmd_comp,
1042 size_t cmd_comp_size);
1043
1044 /* ena_com_init_interrupt_moderation - Init interrupt moderation
1045 * @ena_dev: ENA communication layer struct
1046 *
1047 * @return - 0 on success, negative value on failure.
1048 */
1049 int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev);
1050
1051 /* ena_com_interrupt_moderation_supported - Return if interrupt moderation
1052 * capability is supported by the device.
1053 *
1054 * @return - supported or not.
1055 */
1056 bool ena_com_interrupt_moderation_supported(struct ena_com_dev *ena_dev);
1057
1058 /* ena_com_update_nonadaptive_moderation_interval_tx - Update the
1059 * non-adaptive interval in Tx direction.
1060 * @ena_dev: ENA communication layer struct
1061 * @tx_coalesce_usecs: Interval in usec.
1062 *
1063 * @return - 0 on success, negative value on failure.
1064 */
1065 int ena_com_update_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev,
1066 u32 tx_coalesce_usecs);
1067
1068 /* ena_com_update_nonadaptive_moderation_interval_rx - Update the
1069 * non-adaptive interval in Rx direction.
1070 * @ena_dev: ENA communication layer struct
1071 * @rx_coalesce_usecs: Interval in usec.
1072 *
1073 * @return - 0 on success, negative value on failure.
1074 */
1075 int ena_com_update_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev,
1076 u32 rx_coalesce_usecs);
1077
1078 /* ena_com_get_nonadaptive_moderation_interval_tx - Retrieve the
1079 * non-adaptive interval in Tx direction.
1080 * @ena_dev: ENA communication layer struct
1081 *
1082 * @return - interval in usec
1083 */
1084 unsigned int ena_com_get_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev);
1085
1086 /* ena_com_get_nonadaptive_moderation_interval_rx - Retrieve the
1087 * non-adaptive interval in Rx direction.
1088 * @ena_dev: ENA communication layer struct
1089 *
1090 * @return - interval in usec
1091 */
1092 unsigned int ena_com_get_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev);
1093
1094 /* ena_com_config_dev_mode - Configure the placement policy of the device.
1095 * @ena_dev: ENA communication layer struct
1096 * @llq_features: LLQ feature descriptor, retrieve via
1097 * ena_com_get_dev_attr_feat.
1098 * @ena_llq_config: The default driver LLQ parameters configurations
1099 */
1100 int ena_com_config_dev_mode(struct ena_com_dev *ena_dev,
1101 struct ena_admin_feature_llq_desc *llq_features,
1102 struct ena_llq_configurations *llq_default_config);
1103
1104 /* ena_com_get_missing_admin_interrupt - Return if there is a missing admin interrupt
1105 * @ena_dev: ENA communication layer struct
1106 *
1107 * @return - true if there is a missing admin interrupt or false otherwise
1108 */
ena_com_get_missing_admin_interrupt(struct ena_com_dev * ena_dev)1109 static inline bool ena_com_get_missing_admin_interrupt(struct ena_com_dev *ena_dev)
1110 {
1111 return ena_dev->admin_queue.is_missing_admin_interrupt;
1112 }
1113
1114 /* ena_com_io_sq_to_ena_dev - Extract ena_com_dev using contained field io_sq.
1115 * @io_sq: IO submit queue struct
1116 *
1117 * @return - ena_com_dev struct extracted from io_sq
1118 */
ena_com_io_sq_to_ena_dev(struct ena_com_io_sq * io_sq)1119 static inline struct ena_com_dev *ena_com_io_sq_to_ena_dev(struct ena_com_io_sq *io_sq)
1120 {
1121 return container_of(io_sq, struct ena_com_dev, io_sq_queues[io_sq->qid]);
1122 }
1123
1124 /* ena_com_io_cq_to_ena_dev - Extract ena_com_dev using contained field io_cq.
1125 * @io_sq: IO submit queue struct
1126 *
1127 * @return - ena_com_dev struct extracted from io_sq
1128 */
ena_com_io_cq_to_ena_dev(struct ena_com_io_cq * io_cq)1129 static inline struct ena_com_dev *ena_com_io_cq_to_ena_dev(struct ena_com_io_cq *io_cq)
1130 {
1131 return container_of(io_cq, struct ena_com_dev, io_cq_queues[io_cq->qid]);
1132 }
1133
ena_com_get_adaptive_moderation_enabled(struct ena_com_dev * ena_dev)1134 static inline bool ena_com_get_adaptive_moderation_enabled(struct ena_com_dev *ena_dev)
1135 {
1136 return ena_dev->adaptive_coalescing;
1137 }
1138
ena_com_enable_adaptive_moderation(struct ena_com_dev * ena_dev)1139 static inline void ena_com_enable_adaptive_moderation(struct ena_com_dev *ena_dev)
1140 {
1141 ena_dev->adaptive_coalescing = true;
1142 }
1143
ena_com_disable_adaptive_moderation(struct ena_com_dev * ena_dev)1144 static inline void ena_com_disable_adaptive_moderation(struct ena_com_dev *ena_dev)
1145 {
1146 ena_dev->adaptive_coalescing = false;
1147 }
1148
1149 /* ena_com_get_cap - query whether device supports a capability.
1150 * @ena_dev: ENA communication layer struct
1151 * @cap_id: enum value representing the capability
1152 *
1153 * @return - true if capability is supported or false otherwise
1154 */
ena_com_get_cap(struct ena_com_dev * ena_dev,enum ena_admin_aq_caps_id cap_id)1155 static inline bool ena_com_get_cap(struct ena_com_dev *ena_dev,
1156 enum ena_admin_aq_caps_id cap_id)
1157 {
1158 return !!(ena_dev->capabilities & BIT(cap_id));
1159 }
1160
1161 /* ena_com_get_customer_metric_support - query whether device supports a given customer metric.
1162 * @ena_dev: ENA communication layer struct
1163 * @metric_id: enum value representing the customer metric
1164 *
1165 * @return - true if customer metric is supported or false otherwise
1166 */
ena_com_get_customer_metric_support(struct ena_com_dev * ena_dev,enum ena_admin_customer_metrics_id metric_id)1167 static inline bool ena_com_get_customer_metric_support(struct ena_com_dev *ena_dev,
1168 enum ena_admin_customer_metrics_id metric_id)
1169 {
1170 return !!(ena_dev->customer_metrics.supported_metrics & BIT64(metric_id));
1171 }
1172
1173 /* ena_com_get_customer_metric_count - return the number of supported customer metrics.
1174 * @ena_dev: ENA communication layer struct
1175 *
1176 * @return - the number of supported customer metrics
1177 */
ena_com_get_customer_metric_count(struct ena_com_dev * ena_dev)1178 static inline int ena_com_get_customer_metric_count(struct ena_com_dev *ena_dev)
1179 {
1180 return ENA_BITS_PER_U64(ena_dev->customer_metrics.supported_metrics);
1181 }
1182
1183 /* ena_com_update_intr_reg - Prepare interrupt register
1184 * @intr_reg: interrupt register to update.
1185 * @rx_delay_interval: Rx interval in usecs
1186 * @tx_delay_interval: Tx interval in usecs
1187 * @unmask: unmask enable/disable
1188 * @no_moderation_update: 0 - Indicates that any of the TX/RX intervals was
1189 * updated, 1 - otherwise
1190 *
1191 * Prepare interrupt update register with the supplied parameters.
1192 */
ena_com_update_intr_reg(struct ena_eth_io_intr_reg * intr_reg,u32 rx_delay_interval,u32 tx_delay_interval,bool unmask,bool no_moderation_update)1193 static inline void ena_com_update_intr_reg(struct ena_eth_io_intr_reg *intr_reg,
1194 u32 rx_delay_interval,
1195 u32 tx_delay_interval,
1196 bool unmask,
1197 bool no_moderation_update)
1198 {
1199 intr_reg->intr_control = 0;
1200 intr_reg->intr_control |= rx_delay_interval &
1201 ENA_ETH_IO_INTR_REG_RX_INTR_DELAY_MASK;
1202
1203 intr_reg->intr_control |=
1204 ENA_FIELD_PREP(tx_delay_interval,
1205 ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_MASK,
1206 ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_SHIFT);
1207
1208 if (unmask)
1209 intr_reg->intr_control |= ENA_ETH_IO_INTR_REG_INTR_UNMASK_MASK;
1210
1211 intr_reg->intr_control |=
1212 ENA_FIELD_PREP(((u32)no_moderation_update),
1213 ENA_ETH_IO_INTR_REG_NO_MODERATION_UPDATE_MASK,
1214 ENA_ETH_IO_INTR_REG_NO_MODERATION_UPDATE_SHIFT);
1215 }
1216
ena_com_get_next_bounce_buffer(struct ena_com_io_bounce_buffer_control * bounce_buf_ctrl)1217 static inline u8 *ena_com_get_next_bounce_buffer(struct ena_com_io_bounce_buffer_control *bounce_buf_ctrl)
1218 {
1219 u16 size, buffers_num;
1220 u8 *buf;
1221
1222 size = bounce_buf_ctrl->buffer_size;
1223 buffers_num = bounce_buf_ctrl->buffers_num;
1224
1225 buf = bounce_buf_ctrl->base_buffer +
1226 (bounce_buf_ctrl->next_to_use++ & (buffers_num - 1)) * size;
1227
1228 prefetchw(bounce_buf_ctrl->base_buffer +
1229 (bounce_buf_ctrl->next_to_use & (buffers_num - 1)) * size);
1230
1231 return buf;
1232 }
1233
1234 #if defined(__cplusplus)
1235 }
1236 #endif /* __cplusplus */
1237 #endif /* !(ENA_COM) */
1238