1 /* Definitions of target machine for GNU compiler, for the HP Spectrum. 2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 3 2001, 2002 Free Software Foundation, Inc. 4 Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support 5 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for 6 Software Science at the University of Utah. 7 8 This file is part of GNU CC. 9 10 GNU CC is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 2, or (at your option) 13 any later version. 14 15 GNU CC is distributed in the hope that it will be useful, 16 but WITHOUT ANY WARRANTY; without even the implied warranty of 17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 GNU General Public License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with GNU CC; see the file COPYING. If not, write to 22 the Free Software Foundation, 59 Temple Place - Suite 330, 23 Boston, MA 02111-1307, USA. */ 24 25 enum cmp_type /* comparison type */ 26 { 27 CMP_SI, /* compare integers */ 28 CMP_SF, /* compare single precision floats */ 29 CMP_DF, /* compare double precision floats */ 30 CMP_MAX /* max comparison type */ 31 }; 32 33 /* For long call handling. */ 34 extern unsigned long total_code_bytes; 35 36 /* Which processor to schedule for. */ 37 38 enum processor_type 39 { 40 PROCESSOR_700, 41 PROCESSOR_7100, 42 PROCESSOR_7100LC, 43 PROCESSOR_7200, 44 PROCESSOR_7300, 45 PROCESSOR_8000 46 }; 47 48 /* For -mschedule= option. */ 49 extern const char *pa_cpu_string; 50 extern enum processor_type pa_cpu; 51 52 #define pa_cpu_attr ((enum attr_cpu)pa_cpu) 53 54 /* Which architecture to generate code for. */ 55 56 enum architecture_type 57 { 58 ARCHITECTURE_10, 59 ARCHITECTURE_11, 60 ARCHITECTURE_20 61 }; 62 63 struct rtx_def; 64 65 /* For -march= option. */ 66 extern const char *pa_arch_string; 67 extern enum architecture_type pa_arch; 68 69 /* Print subsidiary information on the compiler version in use. */ 70 71 #define TARGET_VERSION fputs (" (hppa)", stderr); 72 73 /* Run-time compilation parameters selecting different hardware subsets. */ 74 75 extern int target_flags; 76 77 /* compile code for HP-PA 1.1 ("Snake"). */ 78 79 #define MASK_PA_11 1 80 81 /* Disable all FP registers (they all become fixed). This may be necessary 82 for compiling kernels which perform lazy context switching of FP regs. 83 Note if you use this option and try to perform floating point operations 84 the compiler will abort! */ 85 86 #define MASK_DISABLE_FPREGS 2 87 #define TARGET_DISABLE_FPREGS (target_flags & MASK_DISABLE_FPREGS) 88 89 /* Generate code which assumes that all space register are equivalent. 90 Triggers aggressive unscaled index addressing and faster 91 builtin_return_address. */ 92 #define MASK_NO_SPACE_REGS 4 93 #define TARGET_NO_SPACE_REGS (target_flags & MASK_NO_SPACE_REGS) 94 95 /* Allow unconditional jumps in the delay slots of call instructions. */ 96 #define MASK_JUMP_IN_DELAY 8 97 #define TARGET_JUMP_IN_DELAY (target_flags & MASK_JUMP_IN_DELAY) 98 99 /* Disable indexed addressing modes. */ 100 #define MASK_DISABLE_INDEXING 32 101 #define TARGET_DISABLE_INDEXING (target_flags & MASK_DISABLE_INDEXING) 102 103 /* Emit code which follows the new portable runtime calling conventions 104 HP wants everyone to use for ELF objects. If at all possible you want 105 to avoid this since it's a performance loss for non-prototyped code. 106 107 Note TARGET_PORTABLE_RUNTIME also forces all calls to use inline 108 long-call stubs which is quite expensive. */ 109 #define MASK_PORTABLE_RUNTIME 64 110 #define TARGET_PORTABLE_RUNTIME (target_flags & MASK_PORTABLE_RUNTIME) 111 112 /* Emit directives only understood by GAS. This allows parameter 113 relocations to work for static functions. There is no way 114 to make them work the HP assembler at this time. */ 115 #define MASK_GAS 128 116 #define TARGET_GAS (target_flags & MASK_GAS) 117 118 /* Emit code for processors which do not have an FPU. */ 119 #define MASK_SOFT_FLOAT 256 120 #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT) 121 122 /* Use 3-insn load/store sequences for access to large data segments 123 in shared libraries on hpux10. */ 124 #define MASK_LONG_LOAD_STORE 512 125 #define TARGET_LONG_LOAD_STORE (target_flags & MASK_LONG_LOAD_STORE) 126 127 /* Use a faster sequence for indirect calls. This assumes that calls 128 through function pointers will never cross a space boundary, and 129 that the executable is not dynamically linked. Such assumptions 130 are generally safe for building kernels and statically linked 131 executables. Code compiled with this option will fail miserably if 132 the executable is dynamically linked or uses nested functions! */ 133 #define MASK_FAST_INDIRECT_CALLS 1024 134 #define TARGET_FAST_INDIRECT_CALLS (target_flags & MASK_FAST_INDIRECT_CALLS) 135 136 /* Generate code with big switch statements to avoid out of range branches 137 occurring within the switch table. */ 138 #define MASK_BIG_SWITCH 2048 139 #define TARGET_BIG_SWITCH (target_flags & MASK_BIG_SWITCH) 140 141 /* Generate code for the HPPA 2.0 architecture. TARGET_PA_11 should also be 142 true when this is true. */ 143 #define MASK_PA_20 4096 144 145 /* Generate cpp defines for server I/O. */ 146 #define MASK_SIO 8192 147 #define TARGET_SIO (target_flags & MASK_SIO) 148 149 /* Assume GNU linker by default. */ 150 #define MASK_GNU_LD 16384 151 #ifndef TARGET_GNU_LD 152 #define TARGET_GNU_LD (target_flags & MASK_GNU_LD) 153 #endif 154 155 /* Force generation of long calls. */ 156 #define MASK_LONG_CALLS 32768 157 #ifndef TARGET_LONG_CALLS 158 #define TARGET_LONG_CALLS (target_flags & MASK_LONG_CALLS) 159 #endif 160 161 #ifndef TARGET_PA_10 162 #define TARGET_PA_10 (target_flags & (MASK_PA_11 | MASK_PA_20) == 0) 163 #endif 164 165 #ifndef TARGET_PA_11 166 #define TARGET_PA_11 (target_flags & MASK_PA_11) 167 #endif 168 169 #ifndef TARGET_PA_20 170 #define TARGET_PA_20 (target_flags & MASK_PA_20) 171 #endif 172 173 /* Generate code for the HPPA 2.0 architecture in 64bit mode. */ 174 #ifndef TARGET_64BIT 175 #define TARGET_64BIT 0 176 #endif 177 178 /* Generate code for ELF32 ABI. */ 179 #ifndef TARGET_ELF32 180 #define TARGET_ELF32 0 181 #endif 182 183 /* Generate code for SOM 32bit ABI. */ 184 #ifndef TARGET_SOM 185 #define TARGET_SOM 0 186 #endif 187 188 /* The following three defines are potential target switches. The current 189 defines are optimal given the current capabilities of GAS and GNU ld. */ 190 191 /* Define to a C expression evaluating to true to use long absolute calls. 192 Currently, only the HP assembler and SOM linker support long absolute 193 calls. They are used only in non-pic code. */ 194 #define TARGET_LONG_ABS_CALL (TARGET_SOM && !TARGET_GAS) 195 196 /* Define to a C expression evaluating to true to use long pic symbol 197 difference calls. This is a call variant similar to the long pic 198 pc-relative call. Long pic symbol difference calls are only used with 199 the HP SOM linker. Currently, only the HP assembler supports these 200 calls. GAS doesn't allow an arbritrary difference of two symbols. */ 201 #define TARGET_LONG_PIC_SDIFF_CALL (!TARGET_GAS) 202 203 /* Define to a C expression evaluating to true to use long pic 204 pc-relative calls. Long pic pc-relative calls are only used with 205 GAS. Currently, they are usable for calls within a module but 206 not for external calls. */ 207 #define TARGET_LONG_PIC_PCREL_CALL 0 208 209 /* Define to a C expression evaluating to true to use SOM secondary 210 definition symbols for weak support. Linker support for secondary 211 definition symbols is buggy prior to HP-UX 11.X. */ 212 #define TARGET_SOM_SDEF 0 213 214 /* Define to a C expression evaluating to true to save the entry value 215 of SP in the current frame marker. This is normally unnecessary. 216 However, the HP-UX unwind library looks at the SAVE_SP callinfo flag. 217 HP compilers don't use this flag but it is supported by the assembler. 218 We set this flag to indicate that register %r3 has been saved at the 219 start of the frame. Thus, when the HP unwind library is used, we 220 need to generate additional code to save SP into the frame marker. */ 221 #define TARGET_HPUX_UNWIND_LIBRARY 0 222 223 /* Macro to define tables used to set the flags. This is a 224 list in braces of target switches with each switch being 225 { "NAME", VALUE, "HELP_STRING" }. VALUE is the bits to set, 226 or minus the bits to clear. An empty string NAME is used to 227 identify the default VALUE. Do not mark empty strings for 228 translation. */ 229 230 #define TARGET_SWITCHES \ 231 {{ "snake", MASK_PA_11, \ 232 N_("Generate PA1.1 code") }, \ 233 { "nosnake", -(MASK_PA_11 | MASK_PA_20), \ 234 N_("Generate PA1.0 code") }, \ 235 { "pa-risc-1-0", -(MASK_PA_11 | MASK_PA_20), \ 236 N_("Generate PA1.0 code") }, \ 237 { "pa-risc-1-1", MASK_PA_11, \ 238 N_("Generate PA1.1 code") }, \ 239 { "pa-risc-2-0", MASK_PA_20, \ 240 N_("Generate PA2.0 code (requires binutils 2.10 or later)") }, \ 241 { "disable-fpregs", MASK_DISABLE_FPREGS, \ 242 N_("Disable FP regs") }, \ 243 { "no-disable-fpregs", -MASK_DISABLE_FPREGS, \ 244 N_("Do not disable FP regs") }, \ 245 { "no-space-regs", MASK_NO_SPACE_REGS, \ 246 N_("Disable space regs") }, \ 247 { "space-regs", -MASK_NO_SPACE_REGS, \ 248 N_("Do not disable space regs") }, \ 249 { "jump-in-delay", MASK_JUMP_IN_DELAY, \ 250 N_("Put jumps in call delay slots") }, \ 251 { "no-jump-in-delay", -MASK_JUMP_IN_DELAY, \ 252 N_("Do not put jumps in call delay slots") }, \ 253 { "disable-indexing", MASK_DISABLE_INDEXING, \ 254 N_("Disable indexed addressing") }, \ 255 { "no-disable-indexing", -MASK_DISABLE_INDEXING, \ 256 N_("Do not disable indexed addressing") }, \ 257 { "portable-runtime", MASK_PORTABLE_RUNTIME, \ 258 N_("Use portable calling conventions") }, \ 259 { "no-portable-runtime", -MASK_PORTABLE_RUNTIME, \ 260 N_("Do not use portable calling conventions") }, \ 261 { "gas", MASK_GAS, \ 262 N_("Assume code will be assembled by GAS") }, \ 263 { "no-gas", -MASK_GAS, \ 264 N_("Do not assume code will be assembled by GAS") }, \ 265 { "soft-float", MASK_SOFT_FLOAT, \ 266 N_("Use software floating point") }, \ 267 { "no-soft-float", -MASK_SOFT_FLOAT, \ 268 N_("Do not use software floating point") }, \ 269 { "long-load-store", MASK_LONG_LOAD_STORE, \ 270 N_("Emit long load/store sequences") }, \ 271 { "no-long-load-store", -MASK_LONG_LOAD_STORE, \ 272 N_("Do not emit long load/store sequences") }, \ 273 { "fast-indirect-calls", MASK_FAST_INDIRECT_CALLS, \ 274 N_("Generate fast indirect calls") }, \ 275 { "no-fast-indirect-calls", -MASK_FAST_INDIRECT_CALLS, \ 276 N_("Do not generate fast indirect calls") }, \ 277 { "big-switch", MASK_BIG_SWITCH, \ 278 N_("Generate code for huge switch statements") }, \ 279 { "no-big-switch", -MASK_BIG_SWITCH, \ 280 N_("Do not generate code for huge switch statements") }, \ 281 { "long-calls", MASK_LONG_CALLS, \ 282 N_("Always generate long calls") }, \ 283 { "no-long-calls", -MASK_LONG_CALLS, \ 284 N_("Generate long calls only when needed") }, \ 285 { "linker-opt", 0, \ 286 N_("Enable linker optimizations") }, \ 287 SUBTARGET_SWITCHES \ 288 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT, \ 289 NULL }} 290 291 #ifndef TARGET_DEFAULT 292 #define TARGET_DEFAULT (MASK_GAS | MASK_JUMP_IN_DELAY) 293 #endif 294 295 #ifndef TARGET_CPU_DEFAULT 296 #define TARGET_CPU_DEFAULT 0 297 #endif 298 299 #ifndef SUBTARGET_SWITCHES 300 #define SUBTARGET_SWITCHES 301 #endif 302 303 #ifndef TARGET_SCHED_DEFAULT 304 #define TARGET_SCHED_DEFAULT "8000" 305 #endif 306 307 #define TARGET_OPTIONS \ 308 { \ 309 { "schedule=", &pa_cpu_string, \ 310 N_("Specify CPU for scheduling purposes") }, \ 311 { "arch=", &pa_arch_string, \ 312 N_("Specify architecture for code generation. Values are 1.0, 1.1, and 2.0. 2.0 requires gas snapshot 19990413 or later.") }\ 313 } 314 315 /* Specify the dialect of assembler to use. New mnemonics is dialect one 316 and the old mnemonics are dialect zero. */ 317 #define ASSEMBLER_DIALECT (TARGET_PA_20 ? 1 : 0) 318 319 #define OVERRIDE_OPTIONS override_options () 320 321 /* stabs-in-som is nearly identical to stabs-in-elf. To avoid useless 322 code duplication we simply include this file and override as needed. */ 323 #include "dbxelf.h" 324 325 /* We do not have to be compatible with dbx, so we enable gdb extensions 326 by default. */ 327 #define DEFAULT_GDB_EXTENSIONS 1 328 329 /* This used to be zero (no max length), but big enums and such can 330 cause huge strings which killed gas. 331 332 We also have to avoid lossage in dbxout.c -- it does not compute the 333 string size accurately, so we are real conservative here. */ 334 #undef DBX_CONTIN_LENGTH 335 #define DBX_CONTIN_LENGTH 3000 336 337 /* Only labels should ever begin in column zero. */ 338 #define ASM_STABS_OP "\t.stabs\t" 339 #define ASM_STABN_OP "\t.stabn\t" 340 341 /* GDB always assumes the current function's frame begins at the value 342 of the stack pointer upon entry to the current function. Accessing 343 local variables and parameters passed on the stack is done using the 344 base of the frame + an offset provided by GCC. 345 346 For functions which have frame pointers this method works fine; 347 the (frame pointer) == (stack pointer at function entry) and GCC provides 348 an offset relative to the frame pointer. 349 350 This loses for functions without a frame pointer; GCC provides an offset 351 which is relative to the stack pointer after adjusting for the function's 352 frame size. GDB would prefer the offset to be relative to the value of 353 the stack pointer at the function's entry. Yuk! */ 354 #define DEBUGGER_AUTO_OFFSET(X) \ 355 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \ 356 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0))) 357 358 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \ 359 ((GET_CODE (X) == PLUS ? OFFSET : 0) \ 360 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0))) 361 362 #define TARGET_CPU_CPP_BUILTINS() \ 363 do { \ 364 builtin_assert("cpu=hppa"); \ 365 builtin_assert("machine=hppa"); \ 366 builtin_define("__hppa"); \ 367 builtin_define("__hppa__"); \ 368 if (TARGET_64BIT) \ 369 { \ 370 builtin_define("_LP64"); \ 371 builtin_define("__LP64__"); \ 372 } \ 373 if (TARGET_PA_20) \ 374 builtin_define("_PA_RISC2_0"); \ 375 else if (TARGET_PA_11) \ 376 builtin_define("_PA_RISC1_1"); \ 377 else \ 378 builtin_define("_PA_RISC1_0"); \ 379 } while (0) 380 381 /* An old set of OS defines for various BSD-like systems. */ 382 #define TARGET_OS_CPP_BUILTINS() \ 383 do \ 384 { \ 385 builtin_define_std ("REVARGV"); \ 386 builtin_define_std ("hp800"); \ 387 builtin_define_std ("hp9000"); \ 388 builtin_define_std ("hp9k8"); \ 389 if (c_language != clk_cplusplus \ 390 && !flag_iso) \ 391 builtin_define ("hppa"); \ 392 builtin_define_std ("spectrum"); \ 393 builtin_define_std ("unix"); \ 394 builtin_assert ("system=bsd"); \ 395 builtin_assert ("system=unix"); \ 396 } \ 397 while (0) 398 399 #define CC1_SPEC "%{pg:} %{p:}" 400 401 #define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}" 402 403 /* We don't want -lg. */ 404 #ifndef LIB_SPEC 405 #define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}" 406 #endif 407 408 /* This macro defines command-line switches that modify the default 409 target name. 410 411 The definition is be an initializer for an array of structures. Each 412 array element has have three elements: the switch name, one of the 413 enumeration codes ADD or DELETE to indicate whether the string should be 414 inserted or deleted, and the string to be inserted or deleted. */ 415 #define MODIFY_TARGET_NAME {{"-32", DELETE, "64"}, {"-64", ADD, "64"}} 416 417 /* Make gcc agree with <machine/ansi.h> */ 418 419 #define SIZE_TYPE "unsigned int" 420 #define PTRDIFF_TYPE "int" 421 #define WCHAR_TYPE "unsigned int" 422 #define WCHAR_TYPE_SIZE 32 423 424 /* Show we can debug even without a frame pointer. */ 425 #define CAN_DEBUG_WITHOUT_FP 426 427 /* Machine dependent reorg pass. */ 428 #define MACHINE_DEPENDENT_REORG(X) pa_reorg(X) 429 430 431 /* target machine storage layout */ 432 433 /* Define this macro if it is advisable to hold scalars in registers 434 in a wider mode than that declared by the program. In such cases, 435 the value is constrained to be within the bounds of the declared 436 type, but kept valid in the wider mode. The signedness of the 437 extension may differ from that of the type. */ 438 439 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ 440 if (GET_MODE_CLASS (MODE) == MODE_INT \ 441 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ 442 (MODE) = word_mode; 443 444 /* Define this if most significant bit is lowest numbered 445 in instructions that operate on numbered bit-fields. */ 446 #define BITS_BIG_ENDIAN 1 447 448 /* Define this if most significant byte of a word is the lowest numbered. */ 449 /* That is true on the HP-PA. */ 450 #define BYTES_BIG_ENDIAN 1 451 452 /* Define this if most significant word of a multiword number is lowest 453 numbered. */ 454 #define WORDS_BIG_ENDIAN 1 455 456 #define MAX_BITS_PER_WORD 64 457 #define MAX_LONG_TYPE_SIZE 32 458 459 /* Width of a word, in units (bytes). */ 460 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4) 461 #define MIN_UNITS_PER_WORD 4 462 463 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 464 #define PARM_BOUNDARY BITS_PER_WORD 465 466 /* Largest alignment required for any stack parameter, in bits. 467 Don't define this if it is equal to PARM_BOUNDARY */ 468 #define MAX_PARM_BOUNDARY BIGGEST_ALIGNMENT 469 470 /* Boundary (in *bits*) on which stack pointer is always aligned; 471 certain optimizations in combine depend on this. 472 473 The HP-UX runtime documents mandate 64-byte and 16-byte alignment for 474 the stack on the 32 and 64-bit ports, respectively. However, we 475 are only guaranteed that the stack is aligned to BIGGEST_ALIGNMENT 476 in main. Thus, we treat the former as the preferred alignment. */ 477 #define STACK_BOUNDARY BIGGEST_ALIGNMENT 478 #define PREFERRED_STACK_BOUNDARY (TARGET_64BIT ? 128 : 512) 479 480 /* Allocation boundary (in *bits*) for the code of a function. */ 481 #define FUNCTION_BOUNDARY BITS_PER_WORD 482 483 /* Alignment of field after `int : 0' in a structure. */ 484 #define EMPTY_FIELD_BOUNDARY 32 485 486 /* Every structure's size must be a multiple of this. */ 487 #define STRUCTURE_SIZE_BOUNDARY 8 488 489 /* A bit-field declared as `int' forces `int' alignment for the struct. */ 490 #define PCC_BITFIELD_TYPE_MATTERS 1 491 492 /* No data type wants to be aligned rounder than this. */ 493 #define BIGGEST_ALIGNMENT (2 * BITS_PER_WORD) 494 495 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */ 496 #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \ 497 ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN)) 498 499 /* Make arrays of chars word-aligned for the same reasons. */ 500 #define DATA_ALIGNMENT(TYPE, ALIGN) \ 501 (TREE_CODE (TYPE) == ARRAY_TYPE \ 502 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ 503 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 504 505 /* Set this nonzero if move instructions will actually fail to work 506 when given unaligned data. */ 507 #define STRICT_ALIGNMENT 1 508 509 /* Generate calls to memcpy, memcmp and memset. */ 510 #define TARGET_MEM_FUNCTIONS 511 512 /* Value is 1 if it is a good idea to tie two pseudo registers 513 when one has mode MODE1 and one has mode MODE2. 514 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 515 for any hard reg, then this must be 0 for correct output. */ 516 #define MODES_TIEABLE_P(MODE1, MODE2) \ 517 (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2)) 518 519 /* Specify the registers used for certain standard purposes. 520 The values of these macros are register numbers. */ 521 522 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */ 523 /* #define PC_REGNUM */ 524 525 /* Register to use for pushing function arguments. */ 526 #define STACK_POINTER_REGNUM 30 527 528 /* Base register for access to local variables of the function. */ 529 #define FRAME_POINTER_REGNUM 3 530 531 /* Value should be nonzero if functions must have frame pointers. */ 532 #define FRAME_POINTER_REQUIRED \ 533 (current_function_calls_alloca) 534 535 /* C statement to store the difference between the frame pointer 536 and the stack pointer values immediately after the function prologue. 537 538 Note, we always pretend that this is a leaf function because if 539 it's not, there's no point in trying to eliminate the 540 frame pointer. If it is a leaf function, we guessed right! */ 541 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \ 542 do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0) 543 544 /* Base register for access to arguments of the function. */ 545 #define ARG_POINTER_REGNUM 3 546 547 /* Register in which static-chain is passed to a function. */ 548 #define STATIC_CHAIN_REGNUM 29 549 550 /* Register which holds offset table for position-independent 551 data references. */ 552 553 #define PIC_OFFSET_TABLE_REGNUM (TARGET_64BIT ? 27 : 19) 554 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1 555 556 /* Function to return the rtx used to save the pic offset table register 557 across function calls. */ 558 extern struct rtx_def *hppa_pic_save_rtx PARAMS ((void)); 559 560 #define DEFAULT_PCC_STRUCT_RETURN 0 561 562 /* SOM ABI says that objects larger than 64 bits are returned in memory. 563 PA64 ABI says that objects larger than 128 bits are returned in memory. 564 Note, int_size_in_bytes can return -1 if the size of the object is 565 variable or larger than the maximum value that can be expressed as 566 a HOST_WIDE_INT. It can also return zero for an empty type. The 567 simplest way to handle variable and empty types is to pass them in 568 memory. This avoids problems in defining the boundaries of argument 569 slots, allocating registers, etc. */ 570 #define RETURN_IN_MEMORY(TYPE) \ 571 (int_size_in_bytes (TYPE) > (TARGET_64BIT ? 16 : 8) \ 572 || int_size_in_bytes (TYPE) <= 0) 573 574 /* Register in which address to store a structure value 575 is passed to a function. */ 576 #define STRUCT_VALUE_REGNUM 28 577 578 /* Describe how we implement __builtin_eh_return. */ 579 #define EH_RETURN_DATA_REGNO(N) \ 580 ((N) < 3 ? (N) + 20 : (N) == 3 ? 31 : INVALID_REGNUM) 581 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 29) 582 #define EH_RETURN_HANDLER_RTX \ 583 gen_rtx_MEM (word_mode, \ 584 gen_rtx_PLUS (word_mode, frame_pointer_rtx, \ 585 TARGET_64BIT ? GEN_INT (-16) : GEN_INT (-20))) 586 587 588 /* Offset from the argument pointer register value to the top of 589 stack. This is different from FIRST_PARM_OFFSET because of the 590 frame marker. */ 591 #define ARG_POINTER_CFA_OFFSET(FNDECL) 0 592 593 /* The letters I, J, K, L and M in a register constraint string 594 can be used to stand for particular ranges of immediate operands. 595 This macro defines what the ranges are. 596 C is the letter, and VALUE is a constant value. 597 Return 1 if VALUE is in the range specified by C. 598 599 `I' is used for the 11 bit constants. 600 `J' is used for the 14 bit constants. 601 `K' is used for values that can be moved with a zdepi insn. 602 `L' is used for the 5 bit constants. 603 `M' is used for 0. 604 `N' is used for values with the least significant 11 bits equal to zero 605 and when sign extended from 32 to 64 bits the 606 value does not change. 607 `O' is used for numbers n such that n+1 is a power of 2. 608 */ 609 610 #define CONST_OK_FOR_LETTER_P(VALUE, C) \ 611 ((C) == 'I' ? VAL_11_BITS_P (VALUE) \ 612 : (C) == 'J' ? VAL_14_BITS_P (VALUE) \ 613 : (C) == 'K' ? zdepi_cint_p (VALUE) \ 614 : (C) == 'L' ? VAL_5_BITS_P (VALUE) \ 615 : (C) == 'M' ? (VALUE) == 0 \ 616 : (C) == 'N' ? (((VALUE) & (((HOST_WIDE_INT) -1 << 31) | 0x7ff)) == 0 \ 617 || (((VALUE) & (((HOST_WIDE_INT) -1 << 31) | 0x7ff)) \ 618 == (HOST_WIDE_INT) -1 << 31)) \ 619 : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \ 620 : (C) == 'P' ? and_mask_p (VALUE) \ 621 : 0) 622 623 /* Similar, but for floating or large integer constants, and defining letters 624 G and H. Here VALUE is the CONST_DOUBLE rtx itself. 625 626 For PA, `G' is the floating-point constant zero. `H' is undefined. */ 627 628 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 629 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \ 630 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \ 631 : 0) 632 633 /* The class value for index registers, and the one for base regs. */ 634 #define INDEX_REG_CLASS GENERAL_REGS 635 #define BASE_REG_CLASS GENERAL_REGS 636 637 #define FP_REG_CLASS_P(CLASS) \ 638 ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS) 639 640 /* True if register is floating-point. */ 641 #define FP_REGNO_P(N) ((N) >= FP_REG_FIRST && (N) <= FP_REG_LAST) 642 643 /* Given an rtx X being reloaded into a reg required to be 644 in class CLASS, return the class of reg to actually use. 645 In general this is just CLASS; but on some machines 646 in some cases it is preferable to use a more restrictive class. */ 647 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS) 648 649 /* Return the register class of a scratch register needed to copy IN into 650 or out of a register in CLASS in MODE. If it can be done directly 651 NO_REGS is returned. 652 653 Avoid doing any work for the common case calls. */ 654 655 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \ 656 ((CLASS == BASE_REG_CLASS && GET_CODE (IN) == REG \ 657 && REGNO (IN) < FIRST_PSEUDO_REGISTER) \ 658 ? NO_REGS : secondary_reload_class (CLASS, MODE, IN)) 659 660 #define MAYBE_FP_REG_CLASS_P(CLASS) \ 661 reg_classes_intersect_p ((CLASS), FP_REGS) 662 663 /* On the PA it is not possible to directly move data between 664 GENERAL_REGS and FP_REGS. */ 665 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \ 666 (MAYBE_FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2) \ 667 || MAYBE_FP_REG_CLASS_P (CLASS2) != FP_REG_CLASS_P (CLASS1)) 668 669 /* Return the stack location to use for secondary memory needed reloads. */ 670 #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \ 671 gen_rtx_MEM (MODE, gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (-16))) 672 673 674 /* Stack layout; function entry, exit and calling. */ 675 676 /* Define this if pushing a word on the stack 677 makes the stack pointer a smaller address. */ 678 /* #define STACK_GROWS_DOWNWARD */ 679 680 /* Believe it or not. */ 681 #define ARGS_GROW_DOWNWARD 682 683 /* Define this if the nominal address of the stack frame 684 is at the high-address end of the local variables; 685 that is, each additional local variable allocated 686 goes at a more negative offset in the frame. */ 687 /* #define FRAME_GROWS_DOWNWARD */ 688 689 /* Offset within stack frame to start allocating local variables at. 690 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 691 first local allocated. Otherwise, it is the offset to the BEGINNING 692 of the first local allocated. The start of the locals must lie on 693 a STACK_BOUNDARY or else the frame size of leaf functions will not 694 be zero. */ 695 #define STARTING_FRAME_OFFSET (TARGET_64BIT ? 16 : 8) 696 697 /* If we generate an insn to push BYTES bytes, 698 this says how many the stack pointer really advances by. 699 On the HP-PA, don't define this because there are no push insns. */ 700 /* #define PUSH_ROUNDING(BYTES) */ 701 702 /* Offset of first parameter from the argument pointer register value. 703 This value will be negated because the arguments grow down. 704 Also note that on STACK_GROWS_UPWARD machines (such as this one) 705 this is the distance from the frame pointer to the end of the first 706 argument, not it's beginning. To get the real offset of the first 707 argument, the size of the argument must be added. */ 708 709 #define FIRST_PARM_OFFSET(FNDECL) (TARGET_64BIT ? -64 : -32) 710 711 /* When a parameter is passed in a register, stack space is still 712 allocated for it. */ 713 #define REG_PARM_STACK_SPACE(DECL) (TARGET_64BIT ? 64 : 16) 714 715 /* Define this if the above stack space is to be considered part of the 716 space allocated by the caller. */ 717 #define OUTGOING_REG_PARM_STACK_SPACE 718 719 /* Keep the stack pointer constant throughout the function. 720 This is both an optimization and a necessity: longjmp 721 doesn't behave itself when the stack pointer moves within 722 the function! */ 723 #define ACCUMULATE_OUTGOING_ARGS 1 724 725 /* The weird HPPA calling conventions require a minimum of 48 bytes on 726 the stack: 16 bytes for register saves, and 32 bytes for magic. 727 This is the difference between the logical top of stack and the 728 actual sp. 729 730 On the 64-bit port, the HP C compiler allocates a 48-byte frame 731 marker, although the runtime documentation only describes a 16 732 byte marker. For compatibility, we allocate 48 bytes. */ 733 #define STACK_POINTER_OFFSET \ 734 (TARGET_64BIT ? -(current_function_outgoing_args_size + 48): -32) 735 736 #define STACK_DYNAMIC_OFFSET(FNDECL) \ 737 (TARGET_64BIT \ 738 ? (STACK_POINTER_OFFSET) \ 739 : ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)) 740 741 /* Value is 1 if returning from a function call automatically 742 pops the arguments described by the number-of-args field in the call. 743 FUNDECL is the declaration node of the function (as a tree), 744 FUNTYPE is the data type of the function (as a tree), 745 or for a library call it is an identifier node for the subroutine name. */ 746 747 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 748 749 /* Define how to find the value returned by a function. 750 VALTYPE is the data type of the value (as a tree). 751 If the precise function being called is known, FUNC is its FUNCTION_DECL; 752 otherwise, FUNC is 0. */ 753 754 #define FUNCTION_VALUE(VALTYPE, FUNC) function_value (VALTYPE, FUNC) 755 756 /* Define how to find the value returned by a library function 757 assuming the value has mode MODE. */ 758 759 #define LIBCALL_VALUE(MODE) \ 760 gen_rtx_REG (MODE, \ 761 (! TARGET_SOFT_FLOAT \ 762 && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28)) 763 764 /* 1 if N is a possible register number for a function value 765 as seen by the caller. */ 766 767 #define FUNCTION_VALUE_REGNO_P(N) \ 768 ((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32)) 769 770 771 /* Define a data type for recording info about an argument list 772 during the scan of that argument list. This data type should 773 hold all necessary information about the function itself 774 and about the args processed so far, enough to enable macros 775 such as FUNCTION_ARG to determine where the next arg should go. 776 777 On the HP-PA, the WORDS field holds the number of words 778 of arguments scanned so far (including the invisible argument, 779 if any, which holds the structure-value-address). Thus, 4 or 780 more means all following args should go on the stack. 781 782 The INCOMING field tracks whether this is an "incoming" or 783 "outgoing" argument. 784 785 The INDIRECT field indicates whether this is is an indirect 786 call or not. 787 788 The NARGS_PROTOTYPE field indicates that an argument does not 789 have a prototype when it less than or equal to 0. */ 790 791 struct hppa_args {int words, nargs_prototype, incoming, indirect; }; 792 793 #define CUMULATIVE_ARGS struct hppa_args 794 795 /* Initialize a variable CUM of type CUMULATIVE_ARGS 796 for a call to a function whose data type is FNTYPE. 797 For a library call, FNTYPE is 0. */ 798 799 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \ 800 (CUM).words = 0, \ 801 (CUM).incoming = 0, \ 802 (CUM).indirect = INDIRECT, \ 803 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \ 804 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \ 805 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \ 806 || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \ 807 : 0) 808 809 810 811 /* Similar, but when scanning the definition of a procedure. We always 812 set NARGS_PROTOTYPE large so we never return a PARALLEL. */ 813 814 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \ 815 (CUM).words = 0, \ 816 (CUM).incoming = 1, \ 817 (CUM).indirect = 0, \ 818 (CUM).nargs_prototype = 1000 819 820 /* Figure out the size in words of the function argument. The size 821 returned by this macro should always be greater than zero because 822 we pass variable and zero sized objects by reference. */ 823 824 #define FUNCTION_ARG_SIZE(MODE, TYPE) \ 825 ((((MODE) != BLKmode \ 826 ? (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \ 827 : int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 828 829 /* Update the data in CUM to advance over an argument 830 of mode MODE and data type TYPE. 831 (TYPE is null for libcalls where that information may not be available.) */ 832 833 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 834 { (CUM).nargs_prototype--; \ 835 (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE) \ 836 + (((CUM).words & 01) && (TYPE) != 0 \ 837 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1); \ 838 } 839 840 /* Determine where to put an argument to a function. 841 Value is zero to push the argument on the stack, 842 or a hard register in which to store the argument. 843 844 MODE is the argument's machine mode. 845 TYPE is the data type of the argument (as a tree). 846 This is null for libcalls where that information may 847 not be available. 848 CUM is a variable of type CUMULATIVE_ARGS which gives info about 849 the preceding args and about the function being called. 850 NAMED is nonzero if this argument is a named parameter 851 (otherwise it is an extra parameter matching an ellipsis). 852 853 On the HP-PA the first four words of args are normally in registers 854 and the rest are pushed. But any arg that won't entirely fit in regs 855 is pushed. 856 857 Arguments passed in registers are either 1 or 2 words long. 858 859 The caller must make a distinction between calls to explicitly named 860 functions and calls through pointers to functions -- the conventions 861 are different! Calls through pointers to functions only use general 862 registers for the first four argument words. 863 864 Of course all this is different for the portable runtime model 865 HP wants everyone to use for ELF. Ugh. Here's a quick description 866 of how it's supposed to work. 867 868 1) callee side remains unchanged. It expects integer args to be 869 in the integer registers, float args in the float registers and 870 unnamed args in integer registers. 871 872 2) caller side now depends on if the function being called has 873 a prototype in scope (rather than if it's being called indirectly). 874 875 2a) If there is a prototype in scope, then arguments are passed 876 according to their type (ints in integer registers, floats in float 877 registers, unnamed args in integer registers. 878 879 2b) If there is no prototype in scope, then floating point arguments 880 are passed in both integer and float registers. egad. 881 882 FYI: The portable parameter passing conventions are almost exactly like 883 the standard parameter passing conventions on the RS6000. That's why 884 you'll see lots of similar code in rs6000.h. */ 885 886 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE)) 887 888 /* Do not expect to understand this without reading it several times. I'm 889 tempted to try and simply it, but I worry about breaking something. */ 890 891 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 892 function_arg (&CUM, MODE, TYPE, NAMED) 893 894 /* Nonzero if we do not know how to pass TYPE solely in registers. */ 895 #define MUST_PASS_IN_STACK(MODE,TYPE) \ 896 ((TYPE) != 0 \ 897 && (TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST \ 898 || TREE_ADDRESSABLE (TYPE))) 899 900 /* For an arg passed partly in registers and partly in memory, 901 this is the number of registers used. 902 For args passed entirely in registers or entirely in memory, zero. */ 903 904 /* For PA32 there are never split arguments. PA64, on the other hand, can 905 pass arguments partially in registers and partially in memory. */ 906 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ 907 (TARGET_64BIT ? function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED) : 0) 908 909 /* If defined, a C expression that gives the alignment boundary, in 910 bits, of an argument with the specified mode and type. If it is 911 not defined, `PARM_BOUNDARY' is used for all arguments. */ 912 913 /* Arguments larger than one word are double word aligned. */ 914 915 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ 916 (((TYPE) \ 917 ? (integer_zerop (TYPE_SIZE (TYPE)) \ 918 || !TREE_CONSTANT (TYPE_SIZE (TYPE)) \ 919 || int_size_in_bytes (TYPE) <= UNITS_PER_WORD) \ 920 : GET_MODE_SIZE(MODE) <= UNITS_PER_WORD) \ 921 ? PARM_BOUNDARY : MAX_PARM_BOUNDARY) 922 923 /* In the 32-bit runtime, arguments larger than eight bytes are passed 924 by invisible reference. As a GCC extension, we also pass anything 925 with a zero or variable size by reference. 926 927 The 64-bit runtime does not describe passing any types by invisible 928 reference. The internals of GCC can't currently handle passing 929 empty structures, and zero or variable length arrays when they are 930 not passed entirely on the stack or by reference. Thus, as a GCC 931 extension, we pass these types by reference. The HP compiler doesn't 932 support these types, so hopefully there shouldn't be any compatibility 933 issues. This may have to be revisited when HP releases a C99 compiler 934 or updates the ABI. */ 935 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ 936 (TARGET_64BIT \ 937 ? ((TYPE) && int_size_in_bytes (TYPE) <= 0) \ 938 : (((TYPE) && (int_size_in_bytes (TYPE) > 8 \ 939 || int_size_in_bytes (TYPE) <= 0)) \ 940 || ((MODE) && GET_MODE_SIZE (MODE) > 8))) 941 942 #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \ 943 FUNCTION_ARG_PASS_BY_REFERENCE (CUM, MODE, TYPE, NAMED) 944 945 946 extern GTY(()) rtx hppa_compare_op0; 947 extern GTY(()) rtx hppa_compare_op1; 948 extern enum cmp_type hppa_branch_type; 949 950 /* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than 951 as assembly via FUNCTION_PROFILER. Just output a local label. 952 We can't use the function label because the GAS SOM target can't 953 handle the difference of a global symbol and a local symbol. */ 954 955 #ifndef FUNC_BEGIN_PROLOG_LABEL 956 #define FUNC_BEGIN_PROLOG_LABEL "LFBP" 957 #endif 958 959 #define FUNCTION_PROFILER(FILE, LABEL) \ 960 ASM_OUTPUT_INTERNAL_LABEL (FILE, FUNC_BEGIN_PROLOG_LABEL, LABEL) 961 962 #define PROFILE_HOOK(label_no) hppa_profile_hook (label_no) 963 void hppa_profile_hook PARAMS ((int label_no)); 964 965 /* The profile counter if emitted must come before the prologue. */ 966 #define PROFILE_BEFORE_PROLOGUE 1 967 968 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 969 the stack pointer does not matter. The value is tested only in 970 functions that have frame pointers. 971 No definition is equivalent to always zero. */ 972 973 extern int may_call_alloca; 974 975 #define EXIT_IGNORE_STACK \ 976 (get_frame_size () != 0 \ 977 || current_function_calls_alloca || current_function_outgoing_args_size) 978 979 /* Output assembler code for a block containing the constant parts 980 of a trampoline, leaving space for the variable parts.\ 981 982 The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM 983 and then branches to the specified routine. 984 985 This code template is copied from text segment to stack location 986 and then patched with INITIALIZE_TRAMPOLINE to contain 987 valid values, and then entered as a subroutine. 988 989 It is best to keep this as small as possible to avoid having to 990 flush multiple lines in the cache. */ 991 992 #define TRAMPOLINE_TEMPLATE(FILE) \ 993 { \ 994 if (!TARGET_64BIT) \ 995 { \ 996 fputs ("\tldw 36(%r22),%r21\n", FILE); \ 997 fputs ("\tbb,>=,n %r21,30,.+16\n", FILE); \ 998 if (ASSEMBLER_DIALECT == 0) \ 999 fputs ("\tdepi 0,31,2,%r21\n", FILE); \ 1000 else \ 1001 fputs ("\tdepwi 0,31,2,%r21\n", FILE); \ 1002 fputs ("\tldw 4(%r21),%r19\n", FILE); \ 1003 fputs ("\tldw 0(%r21),%r21\n", FILE); \ 1004 if (TARGET_PA_20) \ 1005 { \ 1006 fputs ("\tbve (%r21)\n", FILE); \ 1007 fputs ("\tldw 40(%r22),%r29\n", FILE); \ 1008 fputs ("\t.word 0\n", FILE); \ 1009 fputs ("\t.word 0\n", FILE); \ 1010 } \ 1011 else \ 1012 { \ 1013 fputs ("\tldsid (%r21),%r1\n", FILE); \ 1014 fputs ("\tmtsp %r1,%sr0\n", FILE); \ 1015 fputs ("\tbe 0(%sr0,%r21)\n", FILE); \ 1016 fputs ("\tldw 40(%r22),%r29\n", FILE); \ 1017 } \ 1018 fputs ("\t.word 0\n", FILE); \ 1019 fputs ("\t.word 0\n", FILE); \ 1020 fputs ("\t.word 0\n", FILE); \ 1021 fputs ("\t.word 0\n", FILE); \ 1022 } \ 1023 else \ 1024 { \ 1025 fputs ("\t.dword 0\n", FILE); \ 1026 fputs ("\t.dword 0\n", FILE); \ 1027 fputs ("\t.dword 0\n", FILE); \ 1028 fputs ("\t.dword 0\n", FILE); \ 1029 fputs ("\tmfia %r31\n", FILE); \ 1030 fputs ("\tldd 24(%r31),%r1\n", FILE); \ 1031 fputs ("\tldd 24(%r1),%r27\n", FILE); \ 1032 fputs ("\tldd 16(%r1),%r1\n", FILE); \ 1033 fputs ("\tbve (%r1)\n", FILE); \ 1034 fputs ("\tldd 32(%r31),%r31\n", FILE); \ 1035 fputs ("\t.dword 0 ; fptr\n", FILE); \ 1036 fputs ("\t.dword 0 ; static link\n", FILE); \ 1037 } \ 1038 } 1039 1040 /* Length in units of the trampoline for entering a nested function. */ 1041 1042 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 52) 1043 1044 /* Length in units of the trampoline instruction code. */ 1045 1046 #define TRAMPOLINE_CODE_SIZE (TARGET_64BIT ? 24 : (TARGET_PA_20 ? 32 : 40)) 1047 1048 /* Minimum length of a cache line. A length of 16 will work on all 1049 PA-RISC processors. All PA 1.1 processors have a cache line of 1050 32 bytes. Most but not all PA 2.0 processors have a cache line 1051 of 64 bytes. As cache flushes are expensive and we don't support 1052 PA 1.0, we use a minimum length of 32. */ 1053 1054 #define MIN_CACHELINE_SIZE 32 1055 1056 /* Emit RTL insns to initialize the variable parts of a trampoline. 1057 FNADDR is an RTX for the address of the function's pure code. 1058 CXT is an RTX for the static chain value for the function. 1059 1060 Move the function address to the trampoline template at offset 36. 1061 Move the static chain value to trampoline template at offset 40. 1062 Move the trampoline address to trampoline template at offset 44. 1063 Move r19 to trampoline template at offset 48. The latter two 1064 words create a plabel for the indirect call to the trampoline. 1065 1066 A similar sequence is used for the 64-bit port but the plabel is 1067 at the beginning of the trampoline. 1068 1069 Finally, the cache entries for the trampoline code are flushed. 1070 This is necessary to ensure that the trampoline instruction sequence 1071 is written to memory prior to any attempts at prefetching the code 1072 sequence. */ 1073 1074 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 1075 { \ 1076 rtx start_addr = gen_reg_rtx (Pmode); \ 1077 rtx end_addr = gen_reg_rtx (Pmode); \ 1078 rtx line_length = gen_reg_rtx (Pmode); \ 1079 rtx tmp; \ 1080 \ 1081 if (!TARGET_64BIT) \ 1082 { \ 1083 tmp = memory_address (Pmode, plus_constant ((TRAMP), 36)); \ 1084 emit_move_insn (gen_rtx_MEM (Pmode, tmp), (FNADDR)); \ 1085 tmp = memory_address (Pmode, plus_constant ((TRAMP), 40)); \ 1086 emit_move_insn (gen_rtx_MEM (Pmode, tmp), (CXT)); \ 1087 \ 1088 /* Create a fat pointer for the trampoline. */ \ 1089 tmp = memory_address (Pmode, plus_constant ((TRAMP), 44)); \ 1090 emit_move_insn (gen_rtx_MEM (Pmode, tmp), (TRAMP)); \ 1091 tmp = memory_address (Pmode, plus_constant ((TRAMP), 48)); \ 1092 emit_move_insn (gen_rtx_MEM (Pmode, tmp), \ 1093 gen_rtx_REG (Pmode, 19)); \ 1094 \ 1095 /* fdc and fic only use registers for the address to flush, \ 1096 they do not accept integer displacements. We align the \ 1097 start and end addresses to the beginning of their respective \ 1098 cache lines to minimize the number of lines flushed. */ \ 1099 tmp = force_reg (Pmode, (TRAMP)); \ 1100 emit_insn (gen_andsi3 (start_addr, tmp, \ 1101 GEN_INT (-MIN_CACHELINE_SIZE))); \ 1102 tmp = force_reg (Pmode, \ 1103 plus_constant (tmp, TRAMPOLINE_CODE_SIZE - 1)); \ 1104 emit_insn (gen_andsi3 (end_addr, tmp, \ 1105 GEN_INT (-MIN_CACHELINE_SIZE))); \ 1106 emit_move_insn (line_length, GEN_INT (MIN_CACHELINE_SIZE)); \ 1107 emit_insn (gen_dcacheflush (start_addr, end_addr, line_length)); \ 1108 emit_insn (gen_icacheflush (start_addr, end_addr, line_length, \ 1109 gen_reg_rtx (Pmode), \ 1110 gen_reg_rtx (Pmode))); \ 1111 } \ 1112 else \ 1113 { \ 1114 tmp = memory_address (Pmode, plus_constant ((TRAMP), 56)); \ 1115 emit_move_insn (gen_rtx_MEM (Pmode, tmp), (FNADDR)); \ 1116 tmp = memory_address (Pmode, plus_constant ((TRAMP), 64)); \ 1117 emit_move_insn (gen_rtx_MEM (Pmode, tmp), (CXT)); \ 1118 \ 1119 /* Create a fat pointer for the trampoline. */ \ 1120 tmp = memory_address (Pmode, plus_constant ((TRAMP), 16)); \ 1121 emit_move_insn (gen_rtx_MEM (Pmode, tmp), \ 1122 force_reg (Pmode, plus_constant ((TRAMP), 32))); \ 1123 tmp = memory_address (Pmode, plus_constant ((TRAMP), 24)); \ 1124 emit_move_insn (gen_rtx_MEM (Pmode, tmp), \ 1125 gen_rtx_REG (Pmode, 27)); \ 1126 \ 1127 /* fdc and fic only use registers for the address to flush, \ 1128 they do not accept integer displacements. We align the \ 1129 start and end addresses to the beginning of their respective \ 1130 cache lines to minimize the number of lines flushed. */ \ 1131 tmp = force_reg (Pmode, plus_constant ((TRAMP), 32)); \ 1132 emit_insn (gen_anddi3 (start_addr, tmp, \ 1133 GEN_INT (-MIN_CACHELINE_SIZE))); \ 1134 tmp = force_reg (Pmode, \ 1135 plus_constant (tmp, TRAMPOLINE_CODE_SIZE - 1)); \ 1136 emit_insn (gen_anddi3 (end_addr, tmp, \ 1137 GEN_INT (-MIN_CACHELINE_SIZE))); \ 1138 emit_move_insn (line_length, GEN_INT (MIN_CACHELINE_SIZE)); \ 1139 emit_insn (gen_dcacheflush (start_addr, end_addr, line_length)); \ 1140 emit_insn (gen_icacheflush (start_addr, end_addr, line_length, \ 1141 gen_reg_rtx (Pmode), \ 1142 gen_reg_rtx (Pmode))); \ 1143 } \ 1144 } 1145 1146 /* Perform any machine-specific adjustment in the address of the trampoline. 1147 ADDR contains the address that was passed to INITIALIZE_TRAMPOLINE. 1148 Adjust the trampoline address to point to the plabel at offset 44. */ 1149 1150 #define TRAMPOLINE_ADJUST_ADDRESS(ADDR) \ 1151 if (!TARGET_64BIT) (ADDR) = memory_address (Pmode, plus_constant ((ADDR), 46)) 1152 1153 /* Emit code for a call to builtin_saveregs. We must emit USE insns which 1154 reference the 4 integer arg registers and 4 fp arg registers. 1155 Ordinarily they are not call used registers, but they are for 1156 _builtin_saveregs, so we must make this explicit. */ 1157 1158 #define EXPAND_BUILTIN_SAVEREGS() hppa_builtin_saveregs () 1159 1160 /* Implement `va_start' for varargs and stdarg. */ 1161 1162 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \ 1163 hppa_va_start (valist, nextarg) 1164 1165 /* Implement `va_arg'. */ 1166 1167 #define EXPAND_BUILTIN_VA_ARG(valist, type) \ 1168 hppa_va_arg (valist, type) 1169 1170 /* Addressing modes, and classification of registers for them. 1171 1172 Using autoincrement addressing modes on PA8000 class machines is 1173 not profitable. */ 1174 1175 #define HAVE_POST_INCREMENT (pa_cpu < PROCESSOR_8000) 1176 #define HAVE_POST_DECREMENT (pa_cpu < PROCESSOR_8000) 1177 1178 #define HAVE_PRE_DECREMENT (pa_cpu < PROCESSOR_8000) 1179 #define HAVE_PRE_INCREMENT (pa_cpu < PROCESSOR_8000) 1180 1181 /* Macros to check register numbers against specific register classes. */ 1182 1183 /* These assume that REGNO is a hard or pseudo reg number. 1184 They give nonzero only if REGNO is a hard reg of the suitable class 1185 or a pseudo reg currently allocated to a suitable hard reg. 1186 Since they use reg_renumber, they are safe only once reg_renumber 1187 has been allocated, which happens in local-alloc.c. */ 1188 1189 #define REGNO_OK_FOR_INDEX_P(REGNO) \ 1190 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)) 1191 #define REGNO_OK_FOR_BASE_P(REGNO) \ 1192 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)) 1193 #define REGNO_OK_FOR_FP_P(REGNO) \ 1194 (FP_REGNO_P (REGNO) || FP_REGNO_P (reg_renumber[REGNO])) 1195 1196 /* Now macros that check whether X is a register and also, 1197 strictly, whether it is in a specified class. 1198 1199 These macros are specific to the HP-PA, and may be used only 1200 in code for printing assembler insns and in conditions for 1201 define_optimization. */ 1202 1203 /* 1 if X is an fp register. */ 1204 1205 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X))) 1206 1207 /* Maximum number of registers that can appear in a valid memory address. */ 1208 1209 #define MAX_REGS_PER_ADDRESS 2 1210 1211 /* Recognize any constant value that is a valid address except 1212 for symbolic addresses. We get better CSE by rejecting them 1213 here and allowing hppa_legitimize_address to break them up. We 1214 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */ 1215 1216 #define CONSTANT_ADDRESS_P(X) \ 1217 ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ 1218 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ 1219 || GET_CODE (X) == HIGH) \ 1220 && (reload_in_progress || reload_completed || ! symbolic_expression_p (X))) 1221 1222 /* Include all constant integers and constant doubles, but not 1223 floating-point, except for floating-point zero. 1224 1225 Reject LABEL_REFs if we're not using gas or the new HP assembler. 1226 1227 ?!? For now also reject CONST_DOUBLES in 64bit mode. This will need 1228 further work. */ 1229 #ifndef NEW_HP_ASSEMBLER 1230 #define NEW_HP_ASSEMBLER 0 1231 #endif 1232 #define LEGITIMATE_CONSTANT_P(X) \ 1233 ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \ 1234 || (X) == CONST0_RTX (GET_MODE (X))) \ 1235 && (NEW_HP_ASSEMBLER || TARGET_GAS || GET_CODE (X) != LABEL_REF) \ 1236 && !(TARGET_64BIT && GET_CODE (X) == CONST_DOUBLE) \ 1237 && !(TARGET_64BIT && GET_CODE (X) == CONST_INT \ 1238 && !(HOST_BITS_PER_WIDE_INT <= 32 \ 1239 || (INTVAL (X) >= (HOST_WIDE_INT) -32 << 31 \ 1240 && INTVAL (X) < (HOST_WIDE_INT) 32 << 31) \ 1241 || cint_ok_for_move (INTVAL (X)))) \ 1242 && !function_label_operand (X, VOIDmode)) 1243 1244 /* Subroutine for EXTRA_CONSTRAINT. 1245 1246 Return 1 iff OP is a pseudo which did not get a hard register and 1247 we are running the reload pass. */ 1248 1249 #define IS_RELOADING_PSEUDO_P(OP) \ 1250 ((reload_in_progress \ 1251 && GET_CODE (OP) == REG \ 1252 && REGNO (OP) >= FIRST_PSEUDO_REGISTER \ 1253 && reg_renumber [REGNO (OP)] < 0)) 1254 1255 /* Optional extra constraints for this machine. Borrowed from sparc.h. 1256 1257 For the HPPA, `Q' means that this is a memory operand but not a 1258 symbolic memory operand. Note that an unassigned pseudo register 1259 is such a memory operand. Needed because reload will generate 1260 these things in insns and then not re-recognize the insns, causing 1261 constrain_operands to fail. 1262 1263 `R' is used for scaled indexed addresses. 1264 1265 `S' is the constant 31. 1266 1267 `T' is for floating-point loads and stores. */ 1268 #define EXTRA_CONSTRAINT(OP, C) \ 1269 ((C) == 'Q' ? \ 1270 (IS_RELOADING_PSEUDO_P (OP) \ 1271 || (GET_CODE (OP) == MEM \ 1272 && (memory_address_p (GET_MODE (OP), XEXP (OP, 0))\ 1273 || reload_in_progress) \ 1274 && ! symbolic_memory_operand (OP, VOIDmode) \ 1275 && !(GET_CODE (XEXP (OP, 0)) == PLUS \ 1276 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\ 1277 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT))))\ 1278 : ((C) == 'R' ? \ 1279 (GET_CODE (OP) == MEM \ 1280 && GET_CODE (XEXP (OP, 0)) == PLUS \ 1281 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT \ 1282 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT) \ 1283 && (move_operand (OP, GET_MODE (OP)) \ 1284 || memory_address_p (GET_MODE (OP), XEXP (OP, 0))\ 1285 || reload_in_progress)) \ 1286 : ((C) == 'T' ? \ 1287 (GET_CODE (OP) == MEM \ 1288 /* Floating-point loads and stores are used to load \ 1289 integer values as well as floating-point values. \ 1290 They don't have the same set of REG+D address modes \ 1291 as integer loads and stores. PA 1.x supports only \ 1292 short displacements. PA 2.0 supports long displacements \ 1293 but the base register needs to be aligned. \ 1294 \ 1295 The checks in GO_IF_LEGITIMATE_ADDRESS for SFmode and \ 1296 DFmode test the validity of an address for use in a \ 1297 floating point load or store. So, we use SFmode/DFmode \ 1298 to see if the address is valid for a floating-point \ 1299 load/store operation. */ \ 1300 && memory_address_p ((GET_MODE_SIZE (GET_MODE (OP)) == 4 \ 1301 ? SFmode \ 1302 : DFmode), \ 1303 XEXP (OP, 0)) \ 1304 && !(GET_CODE (XEXP (OP, 0)) == LO_SUM \ 1305 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \ 1306 && REG_OK_FOR_BASE_P (XEXP (XEXP (OP, 0), 0))\ 1307 && GET_CODE (XEXP (XEXP (OP, 0), 1)) == UNSPEC\ 1308 && GET_MODE (XEXP (OP, 0)) == Pmode) \ 1309 && !(GET_CODE (XEXP (OP, 0)) == PLUS \ 1310 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\ 1311 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT)))\ 1312 : ((C) == 'U' ? \ 1313 (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 63) \ 1314 : ((C) == 'A' ? \ 1315 (GET_CODE (OP) == MEM \ 1316 && GET_CODE (XEXP (OP, 0)) == LO_SUM \ 1317 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \ 1318 && REG_OK_FOR_BASE_P (XEXP (XEXP (OP, 0), 0)) \ 1319 && GET_CODE (XEXP (XEXP (OP, 0), 1)) == UNSPEC \ 1320 && GET_MODE (XEXP (OP, 0)) == Pmode) \ 1321 : ((C) == 'S' ? \ 1322 (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 31) : 0)))))) 1323 1324 1325 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 1326 and check its validity for a certain class. 1327 We have two alternate definitions for each of them. 1328 The usual definition accepts all pseudo regs; the other rejects 1329 them unless they have been allocated suitable hard regs. 1330 The symbol REG_OK_STRICT causes the latter definition to be used. 1331 1332 Most source files want to accept pseudo regs in the hope that 1333 they will get allocated to the class that the insn wants them to be in. 1334 Source files for reload pass need to be strict. 1335 After reload, it makes no difference, since pseudo regs have 1336 been eliminated by then. */ 1337 1338 #ifndef REG_OK_STRICT 1339 1340 /* Nonzero if X is a hard reg that can be used as an index 1341 or if it is a pseudo reg. */ 1342 #define REG_OK_FOR_INDEX_P(X) \ 1343 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER)) 1344 /* Nonzero if X is a hard reg that can be used as a base reg 1345 or if it is a pseudo reg. */ 1346 #define REG_OK_FOR_BASE_P(X) \ 1347 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER)) 1348 1349 #else 1350 1351 /* Nonzero if X is a hard reg that can be used as an index. */ 1352 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 1353 /* Nonzero if X is a hard reg that can be used as a base reg. */ 1354 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 1355 1356 #endif 1357 1358 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 1359 that is a valid memory address for an instruction. 1360 The MODE argument is the machine mode for the MEM expression 1361 that wants to use this address. 1362 1363 On the HP-PA, the actual legitimate addresses must be 1364 REG+REG, REG+(REG*SCALE) or REG+SMALLINT. 1365 But we can treat a SYMBOL_REF as legitimate if it is part of this 1366 function's constant-pool, because such addresses can actually 1367 be output as REG+SMALLINT. 1368 1369 Note we only allow 5 bit immediates for access to a constant address; 1370 doing so avoids losing for loading/storing a FP register at an address 1371 which will not fit in 5 bits. */ 1372 1373 #define VAL_5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x10 < 0x20) 1374 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X)) 1375 1376 #define VAL_U5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x20) 1377 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X)) 1378 1379 #define VAL_11_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x400 < 0x800) 1380 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X)) 1381 1382 #define VAL_14_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x2000 < 0x4000) 1383 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X)) 1384 1385 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 1386 { \ 1387 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \ 1388 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \ 1389 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \ 1390 && REG_P (XEXP (X, 0)) \ 1391 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \ 1392 goto ADDR; \ 1393 else if (GET_CODE (X) == PLUS) \ 1394 { \ 1395 rtx base = 0, index = 0; \ 1396 if (REG_P (XEXP (X, 0)) \ 1397 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \ 1398 base = XEXP (X, 0), index = XEXP (X, 1); \ 1399 else if (REG_P (XEXP (X, 1)) \ 1400 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \ 1401 base = XEXP (X, 1), index = XEXP (X, 0); \ 1402 if (base != 0) \ 1403 if (GET_CODE (index) == CONST_INT \ 1404 && ((INT_14_BITS (index) \ 1405 && (((MODE) != DImode \ 1406 && (MODE) != SFmode \ 1407 && (MODE) != DFmode) \ 1408 /* The base register for DImode loads and stores \ 1409 with long displacements must be aligned because \ 1410 the lower three bits in the displacement are \ 1411 assumed to be zero. */ \ 1412 || ((MODE) == DImode \ 1413 && (!TARGET_64BIT \ 1414 || (INTVAL (index) % 8) == 0)) \ 1415 /* Similarly, the base register for SFmode/DFmode \ 1416 loads and stores with long displacements must \ 1417 be aligned. \ 1418 \ 1419 FIXME: the ELF32 linker clobbers the LSB of \ 1420 the FP register number in PA 2.0 floating-point \ 1421 insns with long displacements. This is because \ 1422 R_PARISC_DPREL14WR and other relocations like \ 1423 it are not supported. For now, we reject long \ 1424 displacements on this target. */ \ 1425 || (((MODE) == SFmode || (MODE) == DFmode) \ 1426 && (TARGET_SOFT_FLOAT \ 1427 || (TARGET_PA_20 \ 1428 && !TARGET_ELF32 \ 1429 && (INTVAL (index) \ 1430 % GET_MODE_SIZE (MODE)) == 0))))) \ 1431 || INT_5_BITS (index))) \ 1432 goto ADDR; \ 1433 if (! TARGET_SOFT_FLOAT \ 1434 && ! TARGET_DISABLE_INDEXING \ 1435 && base \ 1436 && ((MODE) == SFmode || (MODE) == DFmode) \ 1437 && GET_CODE (index) == MULT \ 1438 && GET_CODE (XEXP (index, 0)) == REG \ 1439 && REG_OK_FOR_BASE_P (XEXP (index, 0)) \ 1440 && GET_CODE (XEXP (index, 1)) == CONST_INT \ 1441 && INTVAL (XEXP (index, 1)) == ((MODE) == SFmode ? 4 : 8))\ 1442 goto ADDR; \ 1443 } \ 1444 else if (GET_CODE (X) == LO_SUM \ 1445 && GET_CODE (XEXP (X, 0)) == REG \ 1446 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ 1447 && CONSTANT_P (XEXP (X, 1)) \ 1448 && (TARGET_SOFT_FLOAT \ 1449 /* We can allow symbolic LO_SUM addresses\ 1450 for PA2.0. */ \ 1451 || (TARGET_PA_20 \ 1452 && !TARGET_ELF32 \ 1453 && GET_CODE (XEXP (X, 1)) != CONST_INT)\ 1454 || ((MODE) != SFmode \ 1455 && (MODE) != DFmode))) \ 1456 goto ADDR; \ 1457 else if (GET_CODE (X) == LO_SUM \ 1458 && GET_CODE (XEXP (X, 0)) == SUBREG \ 1459 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\ 1460 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\ 1461 && CONSTANT_P (XEXP (X, 1)) \ 1462 && (TARGET_SOFT_FLOAT \ 1463 /* We can allow symbolic LO_SUM addresses\ 1464 for PA2.0. */ \ 1465 || (TARGET_PA_20 \ 1466 && !TARGET_ELF32 \ 1467 && GET_CODE (XEXP (X, 1)) != CONST_INT)\ 1468 || ((MODE) != SFmode \ 1469 && (MODE) != DFmode))) \ 1470 goto ADDR; \ 1471 else if (GET_CODE (X) == LABEL_REF \ 1472 || (GET_CODE (X) == CONST_INT \ 1473 && INT_5_BITS (X))) \ 1474 goto ADDR; \ 1475 /* Needed for -fPIC */ \ 1476 else if (GET_CODE (X) == LO_SUM \ 1477 && GET_CODE (XEXP (X, 0)) == REG \ 1478 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ 1479 && GET_CODE (XEXP (X, 1)) == UNSPEC \ 1480 && (TARGET_SOFT_FLOAT \ 1481 || (TARGET_PA_20 && !TARGET_ELF32) \ 1482 || ((MODE) != SFmode \ 1483 && (MODE) != DFmode))) \ 1484 goto ADDR; \ 1485 } 1486 1487 /* Look for machine dependent ways to make the invalid address AD a 1488 valid address. 1489 1490 For the PA, transform: 1491 1492 memory(X + <large int>) 1493 1494 into: 1495 1496 if (<large int> & mask) >= 16 1497 Y = (<large int> & ~mask) + mask + 1 Round up. 1498 else 1499 Y = (<large int> & ~mask) Round down. 1500 Z = X + Y 1501 memory (Z + (<large int> - Y)); 1502 1503 This makes reload inheritance and reload_cse work better since Z 1504 can be reused. 1505 1506 There may be more opportunities to improve code with this hook. */ 1507 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \ 1508 do { \ 1509 int offset, newoffset, mask; \ 1510 rtx new, temp = NULL_RTX; \ 1511 \ 1512 mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT \ 1513 ? (TARGET_PA_20 && !TARGET_ELF32 ? 0x3fff : 0x1f) : 0x3fff); \ 1514 \ 1515 if (optimize \ 1516 && GET_CODE (AD) == PLUS) \ 1517 temp = simplify_binary_operation (PLUS, Pmode, \ 1518 XEXP (AD, 0), XEXP (AD, 1)); \ 1519 \ 1520 new = temp ? temp : AD; \ 1521 \ 1522 if (optimize \ 1523 && GET_CODE (new) == PLUS \ 1524 && GET_CODE (XEXP (new, 0)) == REG \ 1525 && GET_CODE (XEXP (new, 1)) == CONST_INT) \ 1526 { \ 1527 offset = INTVAL (XEXP ((new), 1)); \ 1528 \ 1529 /* Choose rounding direction. Round up if we are >= halfway. */ \ 1530 if ((offset & mask) >= ((mask + 1) / 2)) \ 1531 newoffset = (offset & ~mask) + mask + 1; \ 1532 else \ 1533 newoffset = offset & ~mask; \ 1534 \ 1535 /* Ensure that long displacements are aligned. */ \ 1536 if (!VAL_5_BITS_P (newoffset) \ 1537 && GET_MODE_CLASS (MODE) == MODE_FLOAT) \ 1538 newoffset &= ~(GET_MODE_SIZE (MODE) -1); \ 1539 \ 1540 if (newoffset != 0 \ 1541 && VAL_14_BITS_P (newoffset)) \ 1542 { \ 1543 \ 1544 temp = gen_rtx_PLUS (Pmode, XEXP (new, 0), \ 1545 GEN_INT (newoffset)); \ 1546 AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\ 1547 push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0, \ 1548 BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, \ 1549 (OPNUM), (TYPE)); \ 1550 goto WIN; \ 1551 } \ 1552 } \ 1553 } while (0) 1554 1555 1556 1557 1558 /* Try machine-dependent ways of modifying an illegitimate address 1559 to be legitimate. If we find one, return the new, valid address. 1560 This macro is used in only one place: `memory_address' in explow.c. 1561 1562 OLDX is the address as it was before break_out_memory_refs was called. 1563 In some cases it is useful to look at this to decide what needs to be done. 1564 1565 MODE and WIN are passed so that this macro can use 1566 GO_IF_LEGITIMATE_ADDRESS. 1567 1568 It is always safe for this macro to do nothing. It exists to recognize 1569 opportunities to optimize the output. */ 1570 1571 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ 1572 { rtx orig_x = (X); \ 1573 (X) = hppa_legitimize_address (X, OLDX, MODE); \ 1574 if ((X) != orig_x && memory_address_p (MODE, X)) \ 1575 goto WIN; } 1576 1577 /* Go to LABEL if ADDR (a legitimate address expression) 1578 has an effect that depends on the machine mode it is used for. */ 1579 1580 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ 1581 if (GET_CODE (ADDR) == PRE_DEC \ 1582 || GET_CODE (ADDR) == POST_DEC \ 1583 || GET_CODE (ADDR) == PRE_INC \ 1584 || GET_CODE (ADDR) == POST_INC) \ 1585 goto LABEL 1586 1587 #define TARGET_ASM_SELECT_SECTION pa_select_section 1588 1589 /* Define this macro if references to a symbol must be treated 1590 differently depending on something about the variable or 1591 function named by the symbol (such as what section it is in). 1592 1593 The macro definition, if any, is executed immediately after the 1594 rtl for DECL or other node is created. 1595 The value of the rtl will be a `mem' whose address is a 1596 `symbol_ref'. 1597 1598 The usual thing for this macro to do is to a flag in the 1599 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified 1600 name string in the `symbol_ref' (if one bit is not enough 1601 information). 1602 1603 On the HP-PA we use this to indicate if a symbol is in text or 1604 data space. Also, function labels need special treatment. */ 1605 1606 #define TEXT_SPACE_P(DECL)\ 1607 (TREE_CODE (DECL) == FUNCTION_DECL \ 1608 || (TREE_CODE (DECL) == VAR_DECL \ 1609 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \ 1610 && (! DECL_INITIAL (DECL) || ! reloc_needed (DECL_INITIAL (DECL))) \ 1611 && !flag_pic) \ 1612 || (TREE_CODE_CLASS (TREE_CODE (DECL)) == 'c' \ 1613 && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings))) 1614 1615 #define FUNCTION_NAME_P(NAME) (*(NAME) == '@') 1616 1617 /* Specify the machine mode that this machine uses 1618 for the index in the tablejump instruction. */ 1619 #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? TImode : DImode) 1620 1621 /* Jump tables must be 32 bit aligned, no matter the size of the element. */ 1622 #define ADDR_VEC_ALIGN(ADDR_VEC) 2 1623 1624 /* Define this as 1 if `char' should by default be signed; else as 0. */ 1625 #define DEFAULT_SIGNED_CHAR 1 1626 1627 /* Max number of bytes we can move from memory to memory 1628 in one reasonably fast instruction. */ 1629 #define MOVE_MAX 8 1630 1631 /* Higher than the default as we prefer to use simple move insns 1632 (better scheduling and delay slot filling) and because our 1633 built-in block move is really a 2X unrolled loop. 1634 1635 Believe it or not, this has to be big enough to allow for copying all 1636 arguments passed in registers to avoid infinite recursion during argument 1637 setup for a function call. Why? Consider how we copy the stack slots 1638 reserved for parameters when they may be trashed by a call. */ 1639 #define MOVE_RATIO (TARGET_64BIT ? 8 : 4) 1640 1641 /* Define if operations between registers always perform the operation 1642 on the full register even if a narrower mode is specified. */ 1643 #define WORD_REGISTER_OPERATIONS 1644 1645 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD 1646 will either zero-extend or sign-extend. The value of this macro should 1647 be the code that says which one of the two operations is implicitly 1648 done, NIL if none. */ 1649 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND 1650 1651 /* Nonzero if access to memory by bytes is slow and undesirable. */ 1652 #define SLOW_BYTE_ACCESS 1 1653 1654 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 1655 is done just by pretending it is already truncated. */ 1656 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 1657 1658 /* We assume that the store-condition-codes instructions store 0 for false 1659 and some other value for true. This is the value stored for true. */ 1660 1661 #define STORE_FLAG_VALUE 1 1662 1663 /* When a prototype says `char' or `short', really pass an `int'. */ 1664 #define PROMOTE_PROTOTYPES 1 1665 #define PROMOTE_FUNCTION_RETURN 1 1666 1667 /* Specify the machine mode that pointers have. 1668 After generation of rtl, the compiler makes no further distinction 1669 between pointers and any other objects of this machine mode. */ 1670 #define Pmode word_mode 1671 1672 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, 1673 return the mode to be used for the comparison. For floating-point, CCFPmode 1674 should be used. CC_NOOVmode should be used when the first operand is a 1675 PLUS, MINUS, or NEG. CCmode should be used when no special processing is 1676 needed. */ 1677 #define SELECT_CC_MODE(OP,X,Y) \ 1678 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \ 1679 1680 /* A function address in a call instruction 1681 is a byte address (for indexing purposes) 1682 so give the MEM rtx a byte's mode. */ 1683 #define FUNCTION_MODE SImode 1684 1685 /* Define this if addresses of constant functions 1686 shouldn't be put through pseudo regs where they can be cse'd. 1687 Desirable on machines where ordinary constants are expensive 1688 but a CALL with constant address is cheap. */ 1689 #define NO_FUNCTION_CSE 1690 1691 /* Define this to be nonzero if shift instructions ignore all but the low-order 1692 few bits. */ 1693 #define SHIFT_COUNT_TRUNCATED 1 1694 1695 /* Compute the cost of computing a constant rtl expression RTX 1696 whose rtx-code is CODE. The body of this macro is a portion 1697 of a switch statement. If the code is computed here, 1698 return it with a return statement. Otherwise, break from the switch. */ 1699 1700 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ 1701 case CONST_INT: \ 1702 if (INTVAL (RTX) == 0) return 0; \ 1703 if (INT_14_BITS (RTX)) return 1; \ 1704 case HIGH: \ 1705 return 2; \ 1706 case CONST: \ 1707 case LABEL_REF: \ 1708 case SYMBOL_REF: \ 1709 return 4; \ 1710 case CONST_DOUBLE: \ 1711 if ((RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)) \ 1712 && OUTER_CODE != SET) \ 1713 return 0; \ 1714 else \ 1715 return 8; 1716 1717 #define ADDRESS_COST(RTX) \ 1718 (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX)) 1719 1720 /* Compute extra cost of moving data between one register class 1721 and another. 1722 1723 Make moves from SAR so expensive they should never happen. We used to 1724 have 0xffff here, but that generates overflow in rare cases. 1725 1726 Copies involving a FP register and a non-FP register are relatively 1727 expensive because they must go through memory. 1728 1729 Other copies are reasonably cheap. */ 1730 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ 1731 (CLASS1 == SHIFT_REGS ? 0x100 \ 1732 : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \ 1733 : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \ 1734 : 2) 1735 1736 1737 /* Provide the costs of a rtl expression. This is in the body of a 1738 switch on CODE. The purpose for the cost of MULT is to encourage 1739 `synth_mult' to find a synthetic multiply when reasonable. */ 1740 1741 #define RTX_COSTS(X,CODE,OUTER_CODE) \ 1742 case MULT: \ 1743 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ 1744 return COSTS_N_INSNS (3); \ 1745 return (TARGET_PA_11 && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT) \ 1746 ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \ 1747 case DIV: \ 1748 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ 1749 return COSTS_N_INSNS (14); \ 1750 case UDIV: \ 1751 case MOD: \ 1752 case UMOD: \ 1753 return COSTS_N_INSNS (60); \ 1754 case PLUS: /* this includes shNadd insns */ \ 1755 case MINUS: \ 1756 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ 1757 return COSTS_N_INSNS (3); \ 1758 return COSTS_N_INSNS (1); \ 1759 case ASHIFT: \ 1760 case ASHIFTRT: \ 1761 case LSHIFTRT: \ 1762 return COSTS_N_INSNS (1); 1763 1764 /* Adjust the cost of branches. */ 1765 #define BRANCH_COST (pa_cpu == PROCESSOR_8000 ? 2 : 1) 1766 1767 /* Handling the special cases is going to get too complicated for a macro, 1768 just call `pa_adjust_insn_length' to do the real work. */ 1769 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \ 1770 LENGTH += pa_adjust_insn_length (INSN, LENGTH); 1771 1772 /* Millicode insns are actually function calls with some special 1773 constraints on arguments and register usage. 1774 1775 Millicode calls always expect their arguments in the integer argument 1776 registers, and always return their result in %r29 (ret1). They 1777 are expected to clobber their arguments, %r1, %r29, and the return 1778 pointer which is %r31 on 32-bit and %r2 on 64-bit, and nothing else. 1779 1780 This macro tells reorg that the references to arguments and 1781 millicode calls do not appear to happen until after the millicode call. 1782 This allows reorg to put insns which set the argument registers into the 1783 delay slot of the millicode call -- thus they act more like traditional 1784 CALL_INSNs. 1785 1786 Note we can not consider side effects of the insn to be delayed because 1787 the branch and link insn will clobber the return pointer. If we happened 1788 to use the return pointer in the delay slot of the call, then we lose. 1789 1790 get_attr_type will try to recognize the given insn, so make sure to 1791 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns 1792 in particular. */ 1793 #define INSN_REFERENCES_ARE_DELAYED(X) (insn_refs_are_delayed (X)) 1794 1795 1796 /* Control the assembler format that we output. */ 1797 1798 /* Output to assembler file text saying following lines 1799 may contain character constants, extra white space, comments, etc. */ 1800 1801 #define ASM_APP_ON "" 1802 1803 /* Output to assembler file text saying following lines 1804 no longer contain unusual constructs. */ 1805 1806 #define ASM_APP_OFF "" 1807 1808 /* Output deferred plabels at the end of the file. */ 1809 1810 #define ASM_FILE_END(FILE) output_deferred_plabels (FILE) 1811 1812 /* This is how to output the definition of a user-level label named NAME, 1813 such as the label on a static function or variable NAME. */ 1814 1815 #define ASM_OUTPUT_LABEL(FILE, NAME) \ 1816 do { assemble_name (FILE, NAME); \ 1817 fputc ('\n', FILE); } while (0) 1818 1819 /* This is how to output a reference to a user-level label named NAME. 1820 `assemble_name' uses this. */ 1821 1822 #define ASM_OUTPUT_LABELREF(FILE,NAME) \ 1823 do { \ 1824 const char *xname = (NAME); \ 1825 if (FUNCTION_NAME_P (NAME)) \ 1826 xname += 1; \ 1827 if (xname[0] == '*') \ 1828 xname += 1; \ 1829 else \ 1830 fputs (user_label_prefix, FILE); \ 1831 fputs (xname, FILE); \ 1832 } while (0) 1833 1834 /* This is how to output an internal numbered label where 1835 PREFIX is the class of label and NUM is the number within the class. */ 1836 1837 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ 1838 {fprintf (FILE, "%c$%s%04d\n", (PREFIX)[0], (PREFIX) + 1, NUM);} 1839 1840 /* This is how to store into the string LABEL 1841 the symbol_ref name of an internal numbered label where 1842 PREFIX is the class of label and NUM is the number within the class. 1843 This is suitable for output with `assemble_name'. */ 1844 1845 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ 1846 sprintf (LABEL, "*%c$%s%04ld", (PREFIX)[0], (PREFIX) + 1, (long)(NUM)) 1847 1848 #define TARGET_ASM_GLOBALIZE_LABEL pa_globalize_label 1849 1850 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \ 1851 output_ascii ((FILE), (P), (SIZE)) 1852 1853 /* This is how to output an element of a case-vector that is absolute. 1854 Note that this method makes filling these branch delay slots 1855 impossible. */ 1856 1857 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 1858 if (TARGET_BIG_SWITCH) \ 1859 fprintf (FILE, "\tstw %%r1,-16(%%r30)\n\tldil LR'L$%04d,%%r1\n\tbe RR'L$%04d(%%sr4,%%r1)\n\tldw -16(%%r30),%%r1\n", VALUE, VALUE); \ 1860 else \ 1861 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE) 1862 1863 /* Jump tables are executable code and live in the TEXT section on the PA. */ 1864 #define JUMP_TABLES_IN_TEXT_SECTION 1 1865 1866 /* This is how to output an element of a case-vector that is relative. 1867 This must be defined correctly as it is used when generating PIC code. 1868 1869 I believe it safe to use the same definition as ASM_OUTPUT_ADDR_VEC_ELT 1870 on the PA since ASM_OUTPUT_ADDR_VEC_ELT uses pc-relative jump instructions 1871 rather than a table of absolute addresses. */ 1872 1873 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ 1874 if (TARGET_BIG_SWITCH) \ 1875 fprintf (FILE, "\tstw %%r1,-16(%%r30)\n\tldw T'L$%04d(%%r19),%%r1\n\tbv %%r0(%%r1)\n\tldw -16(%%r30),%%r1\n", VALUE); \ 1876 else \ 1877 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE) 1878 1879 /* This is how to output an assembler line 1880 that says to advance the location counter 1881 to a multiple of 2**LOG bytes. */ 1882 1883 #define ASM_OUTPUT_ALIGN(FILE,LOG) \ 1884 fprintf (FILE, "\t.align %d\n", (1<<(LOG))) 1885 1886 #define ASM_OUTPUT_SKIP(FILE,SIZE) \ 1887 fprintf (FILE, "\t.blockz %d\n", (SIZE)) 1888 1889 /* This says how to output an assembler line to define a global common symbol 1890 with size SIZE (in bytes) and alignment ALIGN (in bits). */ 1891 1892 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNED) \ 1893 { bss_section (); \ 1894 assemble_name ((FILE), (NAME)); \ 1895 fputs ("\t.comm ", (FILE)); \ 1896 fprintf ((FILE), "%d\n", MAX ((SIZE), ((ALIGNED) / BITS_PER_UNIT)));} 1897 1898 /* This says how to output an assembler line to define a local common symbol 1899 with size SIZE (in bytes) and alignment ALIGN (in bits). */ 1900 1901 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGNED) \ 1902 { bss_section (); \ 1903 fprintf ((FILE), "\t.align %d\n", ((ALIGNED) / BITS_PER_UNIT)); \ 1904 assemble_name ((FILE), (NAME)); \ 1905 fprintf ((FILE), "\n\t.block %d\n", (SIZE));} 1906 1907 /* Store in OUTPUT a string (made with alloca) containing 1908 an assembler-name for a local static variable named NAME. 1909 LABELNO is an integer which is different for each call. */ 1910 1911 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 1912 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \ 1913 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO))) 1914 1915 /* All HP assemblers use "!" to separate logical lines. */ 1916 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!') 1917 1918 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \ 1919 ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^') 1920 1921 /* Print operand X (an rtx) in assembler syntax to file FILE. 1922 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 1923 For `%' followed by punctuation, CODE is the punctuation and X is null. 1924 1925 On the HP-PA, the CODE can be `r', meaning this is a register-only operand 1926 and an immediate zero should be represented as `r0'. 1927 1928 Several % codes are defined: 1929 O an operation 1930 C compare conditions 1931 N extract conditions 1932 M modifier to handle preincrement addressing for memory refs. 1933 F modifier to handle preincrement addressing for fp memory refs */ 1934 1935 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) 1936 1937 1938 /* Print a memory address as an operand to reference that memory location. */ 1939 1940 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 1941 { register rtx addr = ADDR; \ 1942 register rtx base; \ 1943 int offset; \ 1944 switch (GET_CODE (addr)) \ 1945 { \ 1946 case REG: \ 1947 fprintf (FILE, "0(%s)", reg_names [REGNO (addr)]); \ 1948 break; \ 1949 case PLUS: \ 1950 if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \ 1951 offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \ 1952 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \ 1953 offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \ 1954 else \ 1955 abort (); \ 1956 fprintf (FILE, "%d(%s)", offset, reg_names [REGNO (base)]); \ 1957 break; \ 1958 case LO_SUM: \ 1959 if (!symbolic_operand (XEXP (addr, 1), VOIDmode)) \ 1960 fputs ("R'", FILE); \ 1961 else if (flag_pic == 0) \ 1962 fputs ("RR'", FILE); \ 1963 else \ 1964 fputs ("RT'", FILE); \ 1965 output_global_address (FILE, XEXP (addr, 1), 0); \ 1966 fputs ("(", FILE); \ 1967 output_operand (XEXP (addr, 0), 0); \ 1968 fputs (")", FILE); \ 1969 break; \ 1970 case CONST_INT: \ 1971 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, INTVAL (addr)); \ 1972 fprintf (FILE, "(%%r0)"); \ 1973 break; \ 1974 default: \ 1975 output_addr_const (FILE, addr); \ 1976 }} 1977 1978 1979 /* Find the return address associated with the frame given by 1980 FRAMEADDR. */ 1981 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \ 1982 (return_addr_rtx (COUNT, FRAMEADDR)) 1983 1984 /* Used to mask out junk bits from the return address, such as 1985 processor state, interrupt status, condition codes and the like. */ 1986 #define MASK_RETURN_ADDR \ 1987 /* The privilege level is in the two low order bits, mask em out \ 1988 of the return address. */ \ 1989 (GEN_INT (-4)) 1990 1991 /* The number of Pmode words for the setjmp buffer. */ 1992 #define JMP_BUF_SIZE 50 1993 1994 /* Only direct calls to static functions are allowed to be sibling (tail) 1995 call optimized. 1996 1997 This restriction is necessary because some linker generated stubs will 1998 store return pointers into rp' in some cases which might clobber a 1999 live value already in rp'. 2000 2001 In a sibcall the current function and the target function share stack 2002 space. Thus if the path to the current function and the path to the 2003 target function save a value in rp', they save the value into the 2004 same stack slot, which has undesirable consequences. 2005 2006 Because of the deferred binding nature of shared libraries any function 2007 with external scope could be in a different load module and thus require 2008 rp' to be saved when calling that function. So sibcall optimizations 2009 can only be safe for static function. 2010 2011 Note that GCC never needs return value relocations, so we don't have to 2012 worry about static calls with return value relocations (which require 2013 saving rp'). 2014 2015 It is safe to perform a sibcall optimization when the target function 2016 will never return. */ 2017 #define FUNCTION_OK_FOR_SIBCALL(DECL) \ 2018 (DECL \ 2019 && ! TARGET_PORTABLE_RUNTIME \ 2020 && ! TARGET_64BIT \ 2021 && ! TREE_PUBLIC (DECL)) 2022 2023 #define PREDICATE_CODES \ 2024 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \ 2025 {"call_operand_address", {LABEL_REF, SYMBOL_REF, CONST_INT, \ 2026 CONST_DOUBLE, CONST, HIGH, CONSTANT_P_RTX}}, \ 2027 {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \ 2028 {"symbolic_memory_operand", {SUBREG, MEM}}, \ 2029 {"reg_before_reload_operand", {REG, MEM}}, \ 2030 {"reg_or_nonsymb_mem_operand", {SUBREG, REG, MEM}}, \ 2031 {"reg_or_0_or_nonsymb_mem_operand", {SUBREG, REG, MEM, CONST_INT, \ 2032 CONST_DOUBLE}}, \ 2033 {"move_operand", {SUBREG, REG, CONSTANT_P_RTX, CONST_INT, MEM}}, \ 2034 {"reg_or_cint_move_operand", {SUBREG, REG, CONST_INT}}, \ 2035 {"pic_label_operand", {LABEL_REF, CONST}}, \ 2036 {"fp_reg_operand", {REG}}, \ 2037 {"arith_operand", {SUBREG, REG, CONST_INT}}, \ 2038 {"arith11_operand", {SUBREG, REG, CONST_INT}}, \ 2039 {"pre_cint_operand", {CONST_INT}}, \ 2040 {"post_cint_operand", {CONST_INT}}, \ 2041 {"arith_double_operand", {SUBREG, REG, CONST_DOUBLE}}, \ 2042 {"ireg_or_int5_operand", {CONST_INT, REG}}, \ 2043 {"int5_operand", {CONST_INT}}, \ 2044 {"uint5_operand", {CONST_INT}}, \ 2045 {"int11_operand", {CONST_INT}}, \ 2046 {"uint32_operand", {CONST_INT, \ 2047 HOST_BITS_PER_WIDE_INT > 32 ? 0 : CONST_DOUBLE}}, \ 2048 {"arith5_operand", {SUBREG, REG, CONST_INT}}, \ 2049 {"and_operand", {SUBREG, REG, CONST_INT}}, \ 2050 {"ior_operand", {CONST_INT}}, \ 2051 {"lhs_lshift_cint_operand", {CONST_INT}}, \ 2052 {"lhs_lshift_operand", {SUBREG, REG, CONST_INT}}, \ 2053 {"arith32_operand", {SUBREG, REG, CONST_INT}}, \ 2054 {"pc_or_label_operand", {PC, LABEL_REF}}, \ 2055 {"plus_xor_ior_operator", {PLUS, XOR, IOR}}, \ 2056 {"shadd_operand", {CONST_INT}}, \ 2057 {"basereg_operand", {REG}}, \ 2058 {"div_operand", {REG, CONST_INT}}, \ 2059 {"ireg_operand", {REG}}, \ 2060 {"cmpib_comparison_operator", {EQ, NE, LT, LE, LEU, \ 2061 GT, GTU, GE}}, \ 2062 {"movb_comparison_operator", {EQ, NE, LT, GE}}, 2063 2064 /* We need a libcall to canonicalize function pointers on TARGET_ELF32. */ 2065 #define CANONICALIZE_FUNCPTR_FOR_COMPARE_LIBCALL \ 2066 "__canonicalize_funcptr_for_compare" 2067