1 /* tc-riscv.h -- header file for tc-riscv.c. 2 Copyright (C) 2011-2024 Free Software Foundation, Inc. 3 4 Contributed by Andrew Waterman (andrew@sifive.com). 5 Based on MIPS target. 6 7 This file is part of GAS. 8 9 GAS is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 3, or (at your option) 12 any later version. 13 14 GAS is distributed in the hope that it will be useful, 15 but WITHOUT ANY WARRANTY; without even the implied warranty of 16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 GNU General Public License for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with this program; see the file COPYING3. If not, 21 see <http://www.gnu.org/licenses/>. */ 22 23 #ifndef TC_RISCV 24 #define TC_RISCV 25 26 #include "opcode/riscv.h" 27 28 struct frag; 29 struct expressionS; 30 31 #ifndef TARGET_BYTES_BIG_ENDIAN 32 #define TARGET_BYTES_BIG_ENDIAN 0 33 #endif 34 35 #define TARGET_ARCH bfd_arch_riscv 36 37 #define WORKING_DOT_WORD 1 38 #define LOCAL_LABELS_FB 1 39 40 /* Symbols named FAKE_LABEL_NAME are emitted when generating DWARF, so make 41 sure FAKE_LABEL_NAME is printable. It still must be distinct from any 42 real label name. So, append a space, which other labels can't contain. */ 43 #define FAKE_LABEL_NAME RISCV_FAKE_LABEL_NAME 44 /* Changing the special character in FAKE_LABEL_NAME requires changing 45 FAKE_LABEL_CHAR too. */ 46 #define FAKE_LABEL_CHAR RISCV_FAKE_LABEL_CHAR 47 48 #define md_relax_frag(segment, fragp, stretch) \ 49 riscv_relax_frag (segment, fragp, stretch) 50 extern int riscv_relax_frag (asection *, struct frag *, long); 51 52 #define md_section_align(seg,size) (size) 53 #define md_undefined_symbol(name) (0) 54 #define md_operand(x) 55 56 extern bool riscv_frag_align_code (int); 57 #define md_do_align(N, FILL, LEN, MAX, LABEL) \ 58 if ((N) != 0 && !(FILL) && !need_pass_2 && subseg_text_p (now_seg)) \ 59 { \ 60 if (riscv_frag_align_code (N)) \ 61 goto LABEL; \ 62 } 63 64 extern void riscv_handle_align (fragS *); 65 #define HANDLE_ALIGN riscv_handle_align 66 67 #define MAX_MEM_FOR_RS_ALIGN_CODE (3 + 4) 68 69 /* The ISA of the target may change based on command-line arguments. */ 70 #define TARGET_FORMAT riscv_target_format () 71 extern const char * riscv_target_format (void); 72 73 #define md_after_parse_args() riscv_after_parse_args () 74 extern void riscv_after_parse_args (void); 75 76 #define md_parse_long_option(arg) riscv_parse_long_option (arg) 77 extern int riscv_parse_long_option (const char *); 78 79 #define md_pre_output_hook riscv_pre_output_hook () 80 extern void riscv_pre_output_hook (void); 81 #define GAS_SORT_RELOCS 1 82 83 #define md_end riscv_md_end 84 extern void riscv_md_end (void); 85 86 /* Let the linker resolve all the relocs due to relaxation. */ 87 #define tc_fix_adjustable(fixp) 0 88 #define md_allow_local_subtract(l,r,s) 0 89 90 /* Values passed to md_apply_fix don't include symbol values. */ 91 #define MD_APPLY_SYM_VALUE(FIX) 0 92 93 /* Global syms must not be resolved, to support ELF shared libraries. */ 94 #define EXTERN_FORCE_RELOC \ 95 (OUTPUT_FLAVOR == bfd_target_elf_flavour) 96 97 /* Postpone text-section label subtraction calculation until linking, since 98 linker relaxations might change the deltas. */ 99 #define TC_FORCE_RELOCATION_SUB_SAME(FIX, SEG) \ 100 (GENERIC_FORCE_RELOCATION_SUB_SAME (FIX, SEG) \ 101 || ((SEG)->flags & SEC_CODE) != 0) 102 #define TC_FORCE_RELOCATION_SUB_LOCAL(FIX, SEG) 1 103 #define TC_VALIDATE_FIX_SUB(FIX, SEG) 1 104 #define TC_FORCE_RELOCATION_LOCAL(FIX) 1 105 #define DIFF_EXPR_OK 1 106 107 struct riscv_fix 108 { 109 int source_macro; 110 }; 111 112 #define TC_FIX_TYPE struct riscv_fix 113 #define TC_INIT_FIX_DATA(FIX) (FIX)->tc_fix_data.source_macro = -1 114 115 extern void riscv_pop_insert (void); 116 #define md_pop_insert() riscv_pop_insert () 117 118 #define TARGET_USE_CFIPOP 1 119 120 #define tc_cfi_frame_initial_instructions riscv_cfi_frame_initial_instructions 121 extern void riscv_cfi_frame_initial_instructions (void); 122 123 #define tc_regname_to_dw2regnum tc_riscv_regname_to_dw2regnum 124 extern int tc_riscv_regname_to_dw2regnum (char *); 125 126 #define DWARF2_DEFAULT_RETURN_COLUMN X_RA 127 128 /* Even on RV64, use 4-byte alignment, as F registers may be only 32 bits. */ 129 #define DWARF2_CIE_DATA_ALIGNMENT -4 130 131 #define elf_tc_final_processing riscv_elf_final_processing 132 extern void riscv_elf_final_processing (void); 133 134 /* Adjust debug_line after relaxation. */ 135 #define DWARF2_USE_FIXED_ADVANCE_PC 1 136 137 #define md_parse_name(name, exp, mode, c) \ 138 riscv_parse_name (name, exp, mode) 139 bool riscv_parse_name (const char *, struct expressionS *, enum expr_mode); 140 141 #define md_finish riscv_md_finish 142 #define CONVERT_SYMBOLIC_ATTRIBUTE riscv_convert_symbolic_attribute 143 144 extern void riscv_md_finish (void); 145 extern int riscv_convert_symbolic_attribute (const char *); 146 147 /* Set mapping symbol states. */ 148 #define md_cons_align(nbytes) riscv_mapping_state (MAP_DATA, 0, 0) 149 void riscv_mapping_state (enum riscv_seg_mstate, int, bool); 150 151 /* Define target segment type. */ 152 #define TC_SEGMENT_INFO_TYPE struct riscv_segment_info_type 153 struct riscv_segment_info_type 154 { 155 enum riscv_seg_mstate map_state; 156 /* The current mapping symbol with architecture string. */ 157 symbolS *arch_map_symbol; 158 }; 159 160 /* Define target fragment type. */ 161 #define TC_FRAG_TYPE struct riscv_frag_type 162 struct riscv_frag_type 163 { 164 symbolS *first_map_symbol, *last_map_symbol; 165 }; 166 167 #define TC_FRAG_INIT(fragp, max_bytes) riscv_init_frag (fragp, max_bytes) 168 extern void riscv_init_frag (struct frag *, int); 169 170 #define obj_adjust_symtab() riscv_adjust_symtab () 171 extern void riscv_adjust_symtab (void); 172 173 void riscv_elf_copy_symbol_attributes (symbolS *, symbolS *); 174 #define OBJ_COPY_SYMBOL_ATTRIBUTES(DEST, SRC) \ 175 riscv_elf_copy_symbol_attributes (DEST, SRC) 176 177 #endif /* TC_RISCV */ 178