xref: /netbsd-src/sys/arch/epoc32/include/intr.h (revision a96f7a9e21730245a99af446732ddb5c0acdca62)
1 /*	$NetBSD: intr.h,v 1.4 2021/09/24 08:07:40 skrll Exp $	*/
2 
3 /*
4  * Copyright (c) 2001, 2003 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed for the NetBSD Project by
20  *	Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 #ifndef	_EPOC32_INTR_H_
39 #define	_EPOC32_INTR_H_
40 
41 #ifdef _KERNEL
42 
43 /* Interrupt priority "levels". */
44 #define	IPL_NONE	0	/* nothing */
45 #define	IPL_SOFTCLOCK	1	/* timeouts */
46 #define	IPL_SOFTBIO	2	/* block I/O */
47 #define	IPL_SOFTNET	3	/* software network interrupt */
48 #define	IPL_SOFTSERIAL	4	/* software serial interrupt */
49 #define	IPL_VM		5	/* memory allocation */
50 #define	IPL_SCHED	6	/* clock interrupt */
51 #define	IPL_HIGH	7	/* everything */
52 
53 #define	NIPL		8
54 
55 /* Interrupt sharing types. */
56 #define	IST_NONE	0	/* none */
57 #define	IST_PULSE	1	/* pulsed */
58 #define	IST_EDGE	2	/* edge-triggered */
59 #define	IST_LEVEL	3	/* level-triggered */
60 
61 #define	__NEWINTR	/* enables new hooks in cpu_fork()/cpu_switch() */
62 
63 #define ARM_IRQ_HANDLER	_C_LABEL(epoc32_irq_handler)
64 
65 #ifndef _LOCORE
66 
67 #include <sys/queue.h>
68 
69 #define PIC_MAXSOURCES		16
70 #define PIC_MAXMAXSOURCES	16
71 
72 #define	_splraise	pic_splraise
73 #define	_spllower	pic_spllower
74 #define	splx		pic_splx
75 
76 #include <arm/pic/picvar.h>
77 
78 typedef uint8_t ipl_t;
79 typedef struct {
80 	ipl_t _ipl;
81 } ipl_cookie_t;
82 
83 static inline ipl_cookie_t
makeiplcookie(ipl_t ipl)84 makeiplcookie(ipl_t ipl)
85 {
86 
87 	return (ipl_cookie_t){._ipl = ipl};
88 }
89 
90 static inline int
splraiseipl(ipl_cookie_t icookie)91 splraiseipl(ipl_cookie_t icookie)
92 {
93 
94 	return _splraise(icookie._ipl);
95 }
96 
97 #define	spl0()		_spllower(IPL_NONE)
98 
99 #include <sys/spl.h>
100 
101 #endif /* ! _LOCORE */
102 
103 #endif /* _KERNEL */
104 
105 #endif	/* _EPOC32_INTR_H_ */
106