| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FixupSetCC.cpp | 114 Register ZeroReg = MRI->createVirtualRegister(RC); runOnMachineFunction() local
|
| H A D | X86FrameLowering.cpp | 960 ZeroReg = InProlog ? X86::RCX : MRI.createVirtualRegister(RegClass), emitStackProbeInlineWindowsCoreCLR64() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEInstrInfo.cpp | 87 unsigned Opc = 0, ZeroReg = 0; in copyPhysReg() local
|
| H A D | MipsAsmPrinter.cpp | 140 unsigned ZeroReg = Subtarget->isGP64bit() ? Mips::ZERO_64 : Mips::ZERO; emitPseudoIndirectBranch() local
|
| H A D | MipsSEISelDAGToDAG.cpp | 85 unsigned DstReg = 0, ZeroReg = 0; in replaceUsesWithZeroReg() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 4371 copyGPRRegTuple(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,DebugLoc DL,unsigned DestReg,unsigned SrcReg,bool KillSrc,unsigned Opcode,unsigned ZeroReg,llvm::ArrayRef<unsigned> Indices) const copyGPRRegTuple() argument
5882 canCombine(MachineBasicBlock & MBB,MachineOperand & MO,unsigned CombineOpc,unsigned ZeroReg=0,bool CheckZeroReg=false) canCombine() argument
5915 canCombineWithMUL(MachineBasicBlock & MBB,MachineOperand & MO,unsigned MulOpc,unsigned ZeroReg) canCombineWithMUL() argument
6057 __anon454b61350f02(int Opcode, int Operand, unsigned ZeroReg, MachineCombinerPattern Pattern) getMaddPatterns() argument
6991 unsigned BitSize, OrrOpc, ZeroReg; genAlternativeCodeSequence() local
7053 unsigned SubOpc, ZeroReg; genAlternativeCodeSequence() local
7101 unsigned BitSize, OrrOpc, ZeroReg; genAlternativeCodeSequence() local
[all...] |
| H A D | AArch64ExpandPseudoInsts.cpp | 224 expandCMP_SWAP(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,unsigned LdarOp,unsigned StlrOp,unsigned CmpOp,unsigned ExtendImm,unsigned ZeroReg,MachineBasicBlock::iterator & NextMBBI) expandCMP_SWAP() argument
|
| H A D | AArch64FastISel.cpp | 383 unsigned ZeroReg = (VT == MVT::i64) ? AArch64::XZR : AArch64::WZR; materializeInt() local
4925 unsigned ZeroReg = (VT == MVT::i64) ? AArch64::XZR : AArch64::WZR; selectSDiv() local
|
| H A D | AArch64ISelDAGToDAG.cpp | 3630 unsigned ZeroReg; tryShiftAmountMod() local
3650 unsigned ZeroReg; tryShiftAmountMod() local
|
| H A D | AArch64ISelLowering.cpp | 20615 unsigned ZeroReg; replaceZeroVectorStore() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 950 SDValue ZeroReg = DAG.getRegister(Subtarget.getZeroRegister(), MVT::i8); LowerINLINEASM() local
1931 Register ZeroReg = MRI.createVirtualRegister(&AVR::GPR8RegClass); insertMultibyteShift() local
[all...] |
| H A D | AVRExpandPseudoInsts.cpp | 459 Register ZeroReg = MI.getOperand(2).getReg(); in expand() local
1494 Register ZeroReg = MI.getOperand(3).getReg(); in expandROLBRd() local
|
| /freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | GIMatchTableExecutorImpl.h | 1054 uint16_t ZeroReg = readU16(); executeMatchTable() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 550 auto ZeroReg = MRI.createVirtualRegister(&ARM::GPRRegClass); selectCmp() local
|
| H A D | ARMFastISel.cpp | 1476 unsigned ZeroReg = fastMaterializeConstant(Zero); in SelectCmp() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVInstructionSelector.cpp | 1104 Register ZeroReg = buildZerosVal(ResType, I); selectSelect() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64LegalizerInfo.cpp | 1491 Register ZeroReg = legalizeIntrinsic() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 2782 unsigned ZeroReg = IsAddress ? ABI.GetNullPtr() : ABI.GetZeroReg(); in loadImmediate() local
4259 unsigned ZeroReg; in expandDivRem() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 2083 MCRegister ZeroReg; onlyFoldImmediate() local
|
| H A D | PPCISelDAGToDAG.cpp | 6299 SDValue ZeroReg = Select() local
|
| H A D | PPCISelLowering.cpp | 12049 unsigned ZeroReg = is64bit ? PPC::ZERO8 : PPC::ZERO; EmitPartwordAtomicBinary() local
13082 Register ZeroReg = is64bit ? PPC::ZERO8 : PPC::ZERO; EmitInstrWithCustomInserter() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 8693 Register ZeroReg = MRI.createVirtualRegister(RI.getBoolRC()); convertNonUniformLoopRegion() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 2155 Register ZeroReg; applyCombineUnmergeZExtToZExt() local
|