xref: /netbsd-src/sys/dev/pci/wcfbreg.h (revision 1876b99ebad332355e9ccf7709bcb9f72e799170)
1 /*	$NetBSD: wcfbreg.h,v 1.2 2012/10/09 21:59:19 macallan Exp $ */
2 
3 /*-
4  * Copyright (c) 2010 Michael Lorenz
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26  * POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 /*
30  * register definitions for 3Dlabs Wildcat
31  * mostly from OpenBSD's ifb driver
32  */
33 
34 #ifndef WCFBREG_H
35 #define WCFBREG_H
36 
37 #define WC_IFB_ENGINE		0x8000
38 #define WC_JFB_ENGINE		0x6000
39 
40 #define WC_COMPONENT_SELECT	0x8040
41 #define WC_STATUS		0x8044
42 	#define WC_STATUS_DONE	0x00000004
43 #define WC_RESOLUTION		0x8070
44 #define WC_CONFIG		0x8074	/* log2(stride) in 0x00ff0000 */
45 #define WC_FB32_ADDR0		0x8078
46 #define WC_FB32_ADDR1		0x807c
47 #define WC_FB8_ADDR0		0x8080
48 #define WC_FB8_ADDR1		0x8084
49 #define WC_FB32_UNKNOWN		0x8088
50 #define WC_FB8_UNKNOWN1		0x808c
51 #define WC_FB8_UNKNOWN2		0x8090
52 
53 /* standard ternary ROP in <<16 */
54 #define WC_ROP_CLEAR	0x00000000
55 #define WC_ROP_COPY	0x00330000
56 #define WC_ROP_XOR	0x00cc0000
57 #define WC_ROP_SET	0x00ff0000
58 
59 #define WC_CMAP_INDEX	0x80bc
60 #define WC_CMAP_DATA	0x80c0
61 
62 #define WCFB_COORDS(x, y)	((y) << 16 | (x))
63 /* blitter directions */
64 #define WC_BLT_DIR_BACKWARDS_Y	(0x08 | 0x02)
65 #define WC_BLT_DIR_BACKWARDS_X	(0x04 | 0x01)
66 
67 /*
68  * 80e4 DPMS state register
69  * States ``off'' and ``suspend'' need chip reprogramming before video can
70  * be enabled again.
71  */
72 #define	WC_DPMS_STATE		0x80e4
73 	#define	WC_DPMS_OFF			0x00000000
74 	#define	WC_DPMS_SUSPEND			0x00000001
75 	#define	WC_DPMS_STANDBY			0x00000002
76 	#define	WC_DPMS_ON			0x00000003
77 
78 #endif
79 
80 #define WC_XVR1200	0x10443d3d
81 
82