| /llvm-project/llvm/lib/IR/ |
| H A D | AutoUpgrade.cpp | 1656 unsigned VecWidth = Ty->getPrimitiveSizeInBits(); upgradeX86VPERMT2Intrinsics() local
2003 unsigned VecWidth = CI.getType()->getPrimitiveSizeInBits(); upgradeAVX512MaskToSelect() local
2468 unsigned VecWidth = OpTy->getPrimitiveSizeInBits(); upgradeX86IntrinsicCall() local
2489 unsigned VecWidth = OpTy->getPrimitiveSizeInBits(); upgradeX86IntrinsicCall() local
2513 unsigned VecWidth = OpTy->getPrimitiveSizeInBits(); upgradeX86IntrinsicCall() local
3706 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); upgradeX86IntrinsicCall() local
3779 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); upgradeX86IntrinsicCall() local
3808 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); upgradeX86IntrinsicCall() local
3844 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); upgradeX86IntrinsicCall() local
3874 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); upgradeX86IntrinsicCall() local
[all...] |
| H A D | Verifier.cpp | 6150 unsigned VecWidth = VecTy->getElementCount().getKnownMinValue(); visitIntrinsicCall() local
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| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonTargetTransformInfo.cpp | 181 unsigned VecWidth = VecTy->getPrimitiveSizeInBits().getFixedValue(); in getMemoryOpCost() local
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| H A D | HexagonSubtarget.cpp | 205 if (VecWidth != 8 * HwLen && VecWidth != 16 * HwLen) in isHVXVectorType() local
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| H A D | HexagonISelLowering.cpp | 2686 if (VecWidth == 64 && ValWidth == 32) { in extractVector() local
2735 unsigned VecWidth = VecTy.getSizeInBits(); extractVectorPred() local
2790 unsigned VecWidth = VecTy.getSizeInBits(); insertVector() local
3827 unsigned VecWidth = Subtarget.getVectorLength() * 8; findRepresentativeClass() local
[all...] |
| H A D | HexagonISelLoweringHVX.cpp | 469 unsigned VecWidth = VecTy.getSizeInBits(); in getPreferredHvxVectorAction() local
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InterleavedAccess.cpp | 173 DL.getTypeSizeInBits(VecWidth) >= in decompose() local
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| H A D | X86ISelDAGToDAG.cpp | 421 getExtractVEXTRACTImmediate(SDNode * N,unsigned VecWidth,const SDLoc & DL) getExtractVEXTRACTImmediate() argument
429 getInsertVINSERTImmediate(SDNode * N,unsigned VecWidth,const SDLoc & DL) getInsertVINSERTImmediate() argument
437 getPermuteVINSERTCommutedImmediate(SDNode * N,unsigned VecWidth,const SDLoc & DL) getPermuteVINSERTCommutedImmediate() argument
[all...] |
| H A D | X86MCInstLower.cpp | 1612 printZeroUpperMove(const MachineInstr * MI,MCStreamer & OutStreamer,int SclWidth,int VecWidth,const char * ShuffleComment) printZeroUpperMove() argument
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| H A D | X86ISelLowering.cpp | 54753 unsigned VecWidth = SrcVecVT.getSizeInBits(); combineToFPTruncExtElt() local
[all...] |
| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCTargetTransformInfo.cpp | 1025 unsigned VecWidth = DataType->getPrimitiveSizeInBits(); hasActiveVectorLength() local
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMTargetTransformInfo.cpp | 1117 unsigned VecWidth = DataTy->getPrimitiveSizeInBits(); isLegalMaskedLoad() local
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| /llvm-project/clang/lib/CodeGen/ |
| H A D | CodeGenFunction.cpp | 1296 if (const auto *VecWidth = CurFuncDecl->getAttr<MinVectorWidthAttr>()) StartFunction() local
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| H A D | CGBuiltin.cpp | 14018 unsigned VecWidth = Ty->getPrimitiveSizeInBits(); EmitX86Ternlog() local
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| /llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCasts.cpp | 417 unsigned VecWidth = VecType->getPrimitiveSizeInBits(); in foldVecTruncToExtElt() local
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| /llvm-project/clang/lib/Sema/ |
| H A D | SemaDeclAttr.cpp | 3225 uint32_t VecWidth; handleMinVectorWidthAttr() local
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| /llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | LoopVectorize.cpp | 509 InnerLoopVectorizer(Loop * OrigLoop,PredicatedScalarEvolution & PSE,LoopInfo * LI,DominatorTree * DT,const TargetLibraryInfo * TLI,const TargetTransformInfo * TTI,AssumptionCache * AC,OptimizationRemarkEmitter * ORE,ElementCount VecWidth,ElementCount MinProfitableTripCount,unsigned UnrollFactor,LoopVectorizationLegality * LVL,LoopVectorizationCostModel * CM,BlockFrequencyInfo * BFI,ProfileSummaryInfo * PSI,GeneratedRTChecks & RTChecks) InnerLoopVectorizer() argument
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| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 12663 unsigned VecWidth = VT.getSizeInBits(); isConstantSplat() local
|