| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXReplaceImageHandles.cpp | 96 unsigned VecSize = in processInstr() local
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| H A D | NVPTXISelDAGToDAG.cpp | 2101 unsigned VecSize; in tryLoadParam() local
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| H A D | NVPTXAsmPrinter.cpp | 170 unsigned VecSize = in lowerImageHandleOperand() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVExtract.cpp | 161 unsigned VecSize = HRI.getRegSizeInBits(VecRC) / 8; in runOnMachineFunction() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86ShuffleDecode.cpp | 478 unsigned VecSize = NumElts * ScalarBits; in DecodeVPERMILPMask() local
500 unsigned VecSize = NumElts * ScalarBits; in DecodeVPERMIL2PMask() local
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| /netbsd-src/external/gpl3/binutils/dist/gprofng/src/ |
| H A D | vec.h | 32 #define VecSize(x) ((x) ? (x)->size() : 0) macro
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| /netbsd-src/external/gpl3/binutils.old/dist/gprofng/src/ |
| H A D | vec.h | 32 #define VecSize(x) ((x) ? (x)->size() : 0) macro
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 1211 SIInstrInfo::getIndirectGPRIDXPseudo(unsigned VecSize, in getIndirectGPRIDXPseudo()
1254 static unsigned getIndirectVGPRWriteMovRelPseudoOpc(unsigned VecSize) { in getIndirectVGPRWriteMovRelPseudoOpc()
1275 static unsigned getIndirectSGPRWriteMovRelPseudo32(unsigned VecSize) { in getIndirectSGPRWriteMovRelPseudo32()
1296 static unsigned getIndirectSGPRWriteMovRelPseudo64(unsigned VecSize) { in getIndirectSGPRWriteMovRelPseudo64()
1312 SIInstrInfo::getIndirectRegWriteMovRelPseudo(unsigned VecSize, unsigned EltSize, in getIndirectRegWriteMovRelPseudo()
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| H A D | SIISelLowering.cpp | 5399 unsigned VecSize = VecVT.getSizeInBits(); in lowerINSERT_VECTOR_ELT() local
5476 unsigned VecSize = VecVT.getSizeInBits(); in lowerEXTRACT_VECTOR_ELT() local
10094 unsigned VecSize = EltSize * NumElem; in shouldExpandVectorDynExt() local
10187 unsigned VecSize = VecVT.getSizeInBits(); in performExtractVectorEltCombine() local
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| H A D | AMDGPUISelDAGToDAG.cpp | 2780 unsigned VecSize = Src.getValueSizeInBits(); in SelectVOP3PMods() local
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| H A D | AMDGPURegisterBankInfo.cpp | 3756 unsigned VecSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping() local
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| H A D | AMDGPUInstructionSelector.cpp | 2697 unsigned VecSize = VecTy.getSizeInBits(); in selectG_INSERT_VECTOR_ELT() local
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| H A D | AMDGPULegalizerInfo.cpp | 1402 const unsigned VecSize = VecTy.getSizeInBits(); in AMDGPULegalizerInfo() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineVectorOps.cpp | 1033 int VecSize = in isShuffleEquivalentToSelect() local
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/CodeGen/ |
| H A D | TargetInfo.cpp | 1058 unsigned VecSize = Context.getTypeSize(VT); in isX86VectorTypeForVectorCall() local
5860 unsigned VecSize = getContext().getTypeSize(VT); in isHomogeneousAggregateBaseType() local
6854 unsigned VecSize = getContext().getTypeSize(VT); in isHomogeneousAggregateBaseType() local
8394 uint64_t VecSize = T.hasFeature("hvx-length64b") ? 64*8 : 128*8; in classifyReturnType() local
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/Sema/ |
| H A D | SemaType.cpp | 2558 Optional<llvm::APSInt> VecSize = SizeExpr->getIntegerConstantExpr(Context); in BuildVectorType() local
7873 unsigned VecSize = static_cast<unsigned>(SveVectorSizeInBits.getZExtValue()); in HandleArmSveVectorBitsTypeAttr() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/IR/ |
| H A D | Constants.cpp | 1303 unsigned VecSize = V.size(); in getTypeForElements() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 4688 unsigned VecSize = DstTy.getSizeInBits(); in selectInsertElt() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 6642 const unsigned VecSize = 16; in CC_AIX() local
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/AST/ |
| H A D | ExprConstant.cpp | 2672 unsigned VecSize = Info.Ctx.getTypeSize(VecTy); in EvalAndBitcastToAPInt() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 11299 unsigned VecSize = DL.getTypeSizeInBits(VecTy); in isLegalInterleavedAccessType() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 19581 unsigned VecSize = DL.getTypeSizeInBits(VecTy); in isLegalInterleavedAccessType() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 29352 unsigned VecSize = VT.getSizeInBits(); in LowerHorizontalByteSum() local
46079 unsigned VecSize = ExtOp0.getValueSizeInBits(); in combineStore() local
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