/freebsd-src/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXReplaceImageHandles.cpp | 1761 unsigned VecSize = in processInstr() local
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H A D | NVPTXISelDAGToDAG.cpp | 2029 unsigned VecSize; tryLoadParam() local
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H A D | NVPTXAsmPrinter.cpp | 177 unsigned VecSize = lowerImageHandleOperand() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonVExtract.cpp | 161 unsigned VecSize = HRI.getRegSizeInBits(VecRC) / 8; in runOnMachineFunction() local
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/freebsd-src/contrib/llvm-project/clang/lib/CodeGen/Targets/ |
H A D | Hexagon.cpp | 148 uint64_t VecSize = T.hasFeature("hvx-length64b") ? 64*8 : 128*8; in classifyReturnType() local
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H A D | ARM.cpp | 731 unsigned VecSize = getContext().getTypeSize(VT); isHomogeneousAggregateBaseType() local
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H A D | AArch64.cpp | 493 unsigned VecSize = getContext().getTypeSize(VT); isHomogeneousAggregateBaseType() local
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H A D | X86.cpp | 67 unsigned VecSize = Context.getTypeSize(VT); in isX86VectorTypeForVectorCall() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86ShuffleDecode.cpp | 479 unsigned VecSize = NumElts * ScalarBits; in DecodeVPERMILPMask() local 501 unsigned VecSize = NumElts * ScalarBits; in DecodeVPERMIL2PMask() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMBaseInfo.h | 437 VecSize = 3 << VecSizeShift, enumerator
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIInstrInfo.cpp | 1398 getIndirectGPRIDXPseudo(unsigned VecSize,bool IsIndirectSrc) const getIndirectGPRIDXPseudo() argument 1457 getIndirectVGPRWriteMovRelPseudoOpc(unsigned VecSize) getIndirectVGPRWriteMovRelPseudoOpc() argument 1486 getIndirectSGPRWriteMovRelPseudo32(unsigned VecSize) getIndirectSGPRWriteMovRelPseudo32() argument 1515 getIndirectSGPRWriteMovRelPseudo64(unsigned VecSize) getIndirectSGPRWriteMovRelPseudo64() argument 1531 getIndirectRegWriteMovRelPseudo(unsigned VecSize,unsigned EltSize,bool IsSGPR) const getIndirectRegWriteMovRelPseudo() argument [all...] |
H A D | SIISelLowering.cpp | 6776 unsigned VecSize = VecVT.getSizeInBits(); lowerINSERT_VECTOR_ELT() local 6856 unsigned VecSize = VecVT.getSizeInBits(); lowerEXTRACT_VECTOR_ELT() local 13030 unsigned VecSize = EltSize * NumElem; shouldExpandVectorDynExt() local 13083 unsigned VecSize = VecVT.getSizeInBits(); performExtractVectorEltCombine() local [all...] |
H A D | AMDGPUISelDAGToDAG.cpp | 2951 unsigned VecSize = Src.getValueSizeInBits(); SelectVOP3PMods() local [all...] |
H A D | AMDGPURegisterBankInfo.cpp | 4284 unsigned VecSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); getInstrMapping() local
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H A D | AMDGPUInstructionSelector.cpp | 3174 unsigned VecSize = VecTy.getSizeInBits(); selectG_INSERT_VECTOR_ELT() local
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H A D | AMDGPULegalizerInfo.cpp | 1728 const unsigned VecSize = VecTy.getSizeInBits(); AMDGPULegalizerInfo() local
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/freebsd-src/contrib/llvm-project/clang/lib/Sema/ |
H A D | SemaType.cpp | 2774 std::optional<llvm::APSInt> VecSize = BuildVectorType() local 8554 unsigned VecSize = static_cast<unsigned>(SveVectorSizeInBits.getZExtValue()); HandleArmSveVectorBitsTypeAttr() local 8645 unsigned VecSize = static_cast<unsigned>(RVVVectorSizeInBits.getZExtValue()); HandleRISCVRVVVectorBitsTypeAttr() local [all...] |
H A D | SemaExpr.cpp | 12360 const llvm::ElementCount VecSize = checkSizelessVectorShift() local 12375 const llvm::ElementCount VecSize = checkSizelessVectorShift() local 13602 const llvm::ElementCount VecSize = Context.getBuiltinVectorTypeInfo(VTy).EC; GetSignedSizelessVectorType() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineVectorOps.cpp | 1185 int VecSize = isShuffleEquivalentToSelect() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64TargetTransformInfo.cpp | 1741 size_t VecSize = Vec.size(); SimplifyValuePattern() local
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H A D | AArch64ISelLowering.cpp | 15517 unsigned VecSize = 128; getNumInterleavedAccesses() local 15564 unsigned VecSize = DL.getTypeSizeInBits(VecTy); isLegalInterleavedAccessType() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/IR/ |
H A D | Constants.cpp | 1277 unsigned VecSize = V.size(); getTypeForElements() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 5390 unsigned VecSize = DstTy.getSizeInBits(); selectInsertElt() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 6858 const unsigned VecSize = 16; CC_AIX() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 21602 unsigned VecSize = DL.getTypeSizeInBits(VecTy); isLegalInterleavedAccessType() local
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