| /freebsd-src/contrib/llvm-project/clang/lib/AST/ |
| H A D | ASTStructuralEquivalence.cpp | 972 if (!IsStructurallyEquivalent(Context, Vec1->getSizeExpr(), in IsStructurallyEquivalent() local
945 const auto *Vec1 = cast<DependentSizedExtVectorType>(T1); IsStructurallyEquivalent() local
957 const auto *Vec1 = cast<DependentVectorType>(T1); IsStructurallyEquivalent() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | EarlyCSE.cpp | 1012 auto *Vec1 = dyn_cast<ConstantVector>(Mask1); in isNonTargetIntrinsicMatch() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 1898 SDValue Vec1 = IntermedVals[0].first; ExpandBVWithShuffles() local
2013 SDValue Vec1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value1); ExpandBUILD_VECTOR() local
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| H A D | SelectionDAG.cpp | 12087 SDValue Vec1 = getBuildVector(VT1, dl, Scalars1); UnrollVectorOp() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAGHVX.cpp | 2637 SDValue Vec1 = N->getOperand(1); in selectShuffle() local
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| H A D | HexagonISelLoweringHVX.cpp | 1880 SDValue Vec1 = DAG.getNode(ISD::SPLAT_VECTOR, dl, ResTy, in LowerHvxCttz() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Bitcode/Reader/ |
| H A D | BitcodeReader.cpp | 5216 Value *Vec1, *Vec2, *Mask; parseFunctionBody() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 6998 SDValue Vec1 = SVN->getOperand(VecIdx1); lowerVECTOR_SHUFFLE() local
14146 SDValue Vec1 = Op1.getOperand(0); performFMACombine() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | SLPVectorizer.cpp | 455 Value *Vec1 = nullptr; isFixedVectorShuffle() local
10876 Value *Vec1 = nullptr; processBuildVector() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 13584 SDValue Vec1 = Op.getOperand(1); LowerINSERT_SUBVECTOR() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 48110 SDValue Vec1 = N1.getOperand(0); combineBitOpWithMOVMSK() local
[all...] |