| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeTypesGeneric.cpp | 254 EVT ValueVT = LD->getValueType(0); in ExpandRes_NormalLoad() local
463 EVT ValueVT = St->getValue().getValueType(); in ExpandOp_NormalStore() local
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| H A D | FunctionLoweringInfo.cpp | 380 for (EVT ValueVT : ValueVTs) { CreateRegs() local
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| H A D | SelectionDAGBuilder.cpp | 166 /// bits are known to be zero (ISD::AssertZext) or sign extended from ValueVT in getCopyFromParts() argument
339 getCopyFromPartsVector(SelectionDAG & DAG,const SDLoc & DL,const SDValue * Parts,unsigned NumParts,MVT PartVT,EVT ValueVT,const Value * V,SDValue InChain,std::optional<CallingConv::ID> CallConv) getCopyFromPartsVector() argument
512 EVT ValueVT = Val.getValueType(); getCopyToParts() local
644 EVT ValueVT = Val.getValueType(); widenVectorToPartType() local
690 EVT ValueVT = Val.getValueType(); getCopyToPartsVector() local
847 for (EVT ValueVT : ValueVTs) { RegsForValue() local
879 EVT ValueVT = ValueVTs[Value]; getCopyFromRegs() local
9150 EVT ValueVT = OpInfo.ConstraintVT; getRegistersForValue() local
[all...] |
| H A D | LegalizeVectorTypes.cpp | 6612 EVT ValueVT = StVal.getValueType(); WidenVecOp_MSTORE() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFrameLowering.cpp | 81 for (EVT ValueVT : ValueVTs) in getLocalForStackObject() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.cpp | 153 EVT ValueVT = LD->getValueType(0); INITIALIZE_PASS() local
476 EVT ValueVT = Value.getValueType(); SelectIndexedStore() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 6195 MVT ValueVT = Node->getSimpleValueType(0); Select() local
6292 MVT ValueVT = Value.getSimpleValueType(); Select() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 1555 EVT ValueVT = Val.getValueType(); splitValueIntoRegisterParts() local
1567 joinRegisterPartsIntoValue(SelectionDAG & DAG,const SDLoc & DL,const SDValue * Parts,unsigned NumParts,MVT PartVT,EVT ValueVT,std::optional<CallingConv::ID> CC) const joinRegisterPartsIntoValue() argument
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| /freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 4345 joinRegisterPartsIntoValue(SelectionDAG & DAG,const SDLoc & DL,const SDValue * Parts,unsigned NumParts,MVT PartVT,EVT ValueVT,std::optional<CallingConv::ID> CC) joinRegisterPartsIntoValue() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 19846 EVT ValueVT = Val.getValueType(); splitValueIntoRegisterParts() local
19899 joinRegisterPartsIntoValue(SelectionDAG & DAG,const SDLoc & DL,const SDValue * Parts,unsigned NumParts,MVT PartVT,EVT ValueVT,std::optional<CallingConv::ID> CC) const joinRegisterPartsIntoValue() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 4444 EVT ValueVT = Val.getValueType(); splitValueIntoRegisterParts() local
4459 joinRegisterPartsIntoValue(SelectionDAG & DAG,const SDLoc & DL,const SDValue * Parts,unsigned NumParts,MVT PartVT,EVT ValueVT,std::optional<CallingConv::ID> CC) const joinRegisterPartsIntoValue() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 21488 EVT ValueVT = Value.getValueType(); performSTORECombine() local
21577 EVT ValueVT = Value->getValueType(0); performMSTORECombine() local
[all...] |