| /llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MIPatternMatch.h | 143 std::optional<ValueAndVReg> &ValReg; member
151 inline GCstAndRegMatch m_GCst(std::optional<ValueAndVReg> &ValReg) { in m_GCst() argument
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86SelectionDAGInfo.cpp | 78 unsigned ValReg; EmitTargetCodeForMemset() local
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| H A D | X86FastISel.cpp | 689 if (ValReg in X86FastEmitStore() local
479 X86FastEmitStore(EVT VT,unsigned ValReg,X86AddressMode & AM,MachineMemOperand * MMO,bool Aligned) X86FastEmitStore() argument
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| /llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchExpandAtomicPseudoInsts.cpp | 339 insertSext(const LoongArchInstrInfo * TII,DebugLoc DL,MachineBasicBlock * MBB,Register ValReg,Register ShamtReg) insertSext() argument
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMAsmPrinter.cpp | 2039 Register ValReg = MI->getOperand(1).getReg(); emitInstruction() local
2105 Register ValReg = MI->getOperand(1).getReg(); emitInstruction() local
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| /llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVExpandAtomicPseudoInsts.cpp | 428 MachineBasicBlock *MBB, Register ValReg, in insertSext()
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| /llvm-project/llvm/unittests/CodeGen/GlobalISel/ |
| H A D | PatternMatchTest.cpp | 709 std::optional<ValueAndVReg> ValReg; TEST_F() local
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| /llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 1284 extendRegister(Register ValReg,const CCValAssign & VA,unsigned MaxSizeBits) extendRegister() argument
[all...] |
| H A D | LegalizerHelper.cpp | 4548 Register ValReg = LdStMI.getReg(0); reduceLoadStoreWidth() local
8055 Register ValReg = MI.getOperand(ValRegIndex).getReg(); lowerReadWriteRegister() local
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| /llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64LegalizerInfo.cpp | 1708 Register ValReg = MI.getOperand(0).getReg(); legalizeLoadStore() local
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| H A D | AArch64InstructionSelector.cpp | 2894 Register ValReg = LdSt.getReg(0); select() local
2918 const Register ValReg = LdSt.getReg(0); select() local
[all...] |
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 1616 Register ValReg = MI.getOperand(3).getReg(); selectDSOrderedIntrinsic() local
3127 Register ValReg = MI.getOperand(2).getReg(); selectG_INSERT_VECTOR_ELT() local
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| H A D | AMDGPULegalizerInfo.cpp | 3086 Register ValReg = MI.getOperand(0).getReg(); legalizeLoad() local
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