Searched defs:VOffset (Results 1 – 8 of 8) sorted by relevance
| /llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCCodeEmitter.cpp | 723 unsigned VOffset = 0; getMachineOpValue() local
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 3210 Register VOffset = MI.getOperand(4 + OpOffset).getReg(); selectBufferLoadLds() local
3333 Register VOffset; selectGlobalLoadLds() local
4445 if (Register VOffset = matchZeroExtendFromS32(*MRI, PtrBaseOffset)) { selectGlobalSAddr() local
4469 Register VOffset = MRI->createVirtualRegister(&AMDGPU::VGPR_32RegClass); selectGlobalSAddr() local
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| H A D | AMDGPULegalizerInfo.cpp | 5838 Register VOffset = MI.getOperand(3 + OpOffset).getReg(); legalizeBufferStore() local
5892 buildBufferLoad(unsigned Opc,Register LoadDstReg,Register RSrc,Register VIndex,Register VOffset,Register SOffset,unsigned ImmOffset,unsigned Format,unsigned AuxiliaryData,MachineMemOperand * MMO,bool IsTyped,bool HasVIndex,MachineIRBuilder & B) buildBufferLoad() argument
5949 Register VOffset = MI.getOperand(3 + OpOffset).getReg(); legalizeBufferLoad() local
6184 Register VOffset = MI.getOperand(4 + OpOffset).getReg(); legalizeBufferAtomic() local
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| H A D | SIRegisterInfo.cpp | 1388 __anon3580b4530302(Register SGPRBase, Register TmpVGPR, int64_t VOffset) buildSpillLoadStore() argument
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| H A D | AMDGPUISelDAGToDAG.cpp | 1765 SelectGlobalSAddr(SDNode * N,SDValue Addr,SDValue & SAddr,SDValue & VOffset,SDValue & Offset) const SelectGlobalSAddr() argument
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| H A D | AMDGPURegisterBankInfo.cpp | 1364 Register VOffset; applyMappingSBufferLoad() local
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| H A D | SIISelLowering.cpp | 9712 SDValue VOffset = Op.getOperand(5 + OpOffset); LowerINTRINSIC_VOID() local
9814 SDValue VOffset; LowerINTRINSIC_VOID() local
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 41407 int VOffset = V.getOpcode() == X86ISD::PSHUFLW ? 0 : 4; combineTargetShuffle() local
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