Searched defs:VOffset (Results 1 – 8 of 8) sorted by relevance
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonMCCodeEmitter.cpp | 723 unsigned VOffset = 0; in getMachineOpValue() local
|
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUInstructionSelector.cpp | 3252 Register VOffset = MI.getOperand(4 + OpOffset).getReg(); selectBufferLoadLds() local 3375 Register VOffset; selectGlobalLoadLds() local 4474 if (Register VOffset = matchZeroExtendFromS32(*MRI, PtrBaseOffset)) { selectGlobalSAddr() local 4498 Register VOffset = MRI->createVirtualRegister(&AMDGPU::VGPR_32RegClass); selectGlobalSAddr() local [all...] |
H A D | AMDGPULegalizerInfo.cpp | 5634 Register VOffset = MI.getOperand(3 + OpOffset).getReg(); legalizeBufferStore() local 5688 buildBufferLoad(unsigned Opc,Register LoadDstReg,Register RSrc,Register VIndex,Register VOffset,Register SOffset,unsigned ImmOffset,unsigned Format,unsigned AuxiliaryData,MachineMemOperand * MMO,bool IsTyped,bool HasVIndex,MachineIRBuilder & B) buildBufferLoad() argument 5745 Register VOffset = MI.getOperand(3 + OpOffset).getReg(); legalizeBufferLoad() local 5978 Register VOffset = MI.getOperand(4 + OpOffset).getReg(); legalizeBufferAtomic() local [all...] |
H A D | SIRegisterInfo.cpp | 1379 __anon41e09e720302(Register SGPRBase, Register TmpVGPR, int64_t VOffset) buildSpillLoadStore() argument
|
H A D | AMDGPUISelDAGToDAG.cpp | 1742 SelectGlobalSAddr(SDNode * N,SDValue Addr,SDValue & SAddr,SDValue & VOffset,SDValue & Offset) const SelectGlobalSAddr() argument
|
H A D | AMDGPURegisterBankInfo.cpp | 1364 Register VOffset; applyMappingSBufferLoad() local
|
H A D | SIISelLowering.cpp | 9544 SDValue VOffset = Op.getOperand(5 + OpOffset); LowerINTRINSIC_VOID() local 9646 SDValue VOffset; LowerINTRINSIC_VOID() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 40549 int VOffset = V.getOpcode() == X86ISD::PSHUFLW ? 0 : 4; combineTargetShuffle() local [all...] |